Matrixed Mixer

This invention relates generally to radio frequency circuits and more particularly to frequency conversion circuits such as mixers and multipliers.

As is known in the art, frequency conversion circuits provide an output signal in response to an input signal having a frequency which is higher than or lower than the frequency of the input signal.

Radio frequency mixer circuits are widely employed in so-called superhetrodyne receivers which include in addition to the mixer an intermediate frequency (IF) amplifier tuned to a predetermined frequency provided from the mixer and a frequency detector which is fed the amplified signal from the IF amplifier. Generally, superhetrodyne receivers also include an input broadband amplifier which amplifies an input radio frequency signal typically received from an antenna, for example, and a local oscillator signal source. The received, amplified input signal and local oscillator signal are each fed to the mixer circuit to provide in response thereto an output signal including a pair of frequency components equal to the sum of and difference between the frequencies of the input signal and the local oscillator signal. Typically, the sum frequency component signal is filtered from the output signal and the difference frequency component signal is fed to the IF amplifier.

There are several types of mixers known in the art. One type of mixer is the so-called single-ended mixer which includes a non-linear device such as a transistor or a diode which is fed by the input signal and the local oscillator signal. In response, an output signal is provided having the sum and difference pair of frequencies .vertline..omega..sub.RF .+-..omega..sub.LO .vertline.. One problem with this type of mixer is that the single-ended mixer provides undesired output frequency components such as the original input signal frequency .omega..sub.RF, local oscillator signal frequency .omega..sub.LO, and harmonics of the original input signals, as well as, products of the harmonics of the original input signals (M.omega..sub.LO .+-.N.omega..sub.RF). Filtering or suppression of these signals is generally required. Moreover, with such a mixer, there is no isolation between the LO and RF signals which in certain applications is a problem.

A second type of mixers is a so-called singly balanced mixer which generally includes a pair of single-ended mixers and a 3 dB hybrid coupler. The inputs of the coupler are fed by the input signal and local oscillator signal and outputs of the hybrid are coupled to the input of each single-ended mixer. The output of the mixer elements are combined in a common junction to provide the output IF signal. One of the problems with singly-balanced mixers is the relative difficulty in fabricating the 3 dB hybrid coupler, and in particular, fabricating a 3 dB hybrid coupler which is broadband. Furthermore, it is difficult to fabricate a hybrid coupler as an integrated circuit.

A third type of mixer is the so-called doubly balanced mixer. The doubly-balanced mixer generally includes two singly balanced mixers each fed by the local oscillator signal having a 180.degree. differential phase shift provided by a hybrid coupler or balun and one of a pair of input signals. The outputs of each balanced mixer are combined together by an IF hybrid coupler. One problem with doubly-balanced mixers is that the couplers or baluns are generally difficult to fabricate as monolithic integrated circuits. Accordingly, the double balanced mixer is not easily fabricated as a monolithic integrated circuit. A second problem with a double balanced mixer is the relatively narrow frequency bandwidth of operation due to the presence of couplers and the baluns.

One type of mixer which overcomes some of these problems as well as others is described in U.S. Pat. No. 4,662,000, by Tajima et al., and assigned to the assignee of the present invention. In the above-mentioned patent, a distributed mixer including a plurality of successively coupled dualgate field effect transistors is described.

The above-mentioned patent provides a circuit which overcomes many of the problems mentioned above concerning single-ended, balanced, and double balanced mixers and provides a technique in which relatively large bandwidth is achieved. However, the use of dual-gate field effect transistors typically increases the noise figure of a mixer, since dual-gate transistors tend to having higher noise figures than single gate transistors. In many applications, the higher noise figure of the mixer would not pose a serious problem. Moreover, in such applications, RF signals may be fed by low noise amplifiers to reduce the effect of the mixer noise figure on a final output, IF signal.

Nevertheless, it would be desirable to reduce the number of circuits employed in fabricating mixers and receivers. In particular, it would desirable to eliminate the LO amplifier, input RF amplifier, as well as, output IF amplifier or at least significantly reduced their requirements. Moreover, in certain applications, such as electronic warfare surveillance applications, it is necessary to prevent radiation of the LO signal through the antenna. This requirement necessitates high isolation between LO and RF terminals in particular in the direction LO to RF. In certain instances, isolation requirements beyond -90 dB may be required. Such an isolation specification is not easily achieved with known techniques.

A further problem with many known mixers is that such mixers tend to have low conversion efficiency. This characteristic increases the power requirement for the LO signal, source, and IF amplifiers. Again, reduction of such requirements would be desirable.

In accordance with the present invention, a radio frequency, frequency conversion circuit, having a first input terminal and an output terminal includes a first propagation network having a first end coupled to the input terminal and a first plurality of field effect transistors having input electrodes and output electrodes, with the input electrodes being successively coupled by said first propagation network. A second propagation network successively couples the output electrodes of said first plurality of field effect transistors. A first plurality of non-linear elements each having an input electrode and an output electrode have the input electrodes thereof successively coupled by the second propagation network, and a third propagation network having a first end connected to the output terminal successively couples said output electrodes of each of the plurality of non-linear elements to the output terminal. With this particular arrangement, the first plurality of field effect transistors in combination with the first propagation network and the second propagation network provide a distributed amplifier which may be used to amplify an input RF signal fed thereto. The plurality of non-linear elements being coupled between the second propagation network and the third propagation network form provide a distributed frequency conversion circuit matrixed with the distributed amplifier. By sharing the second propagation network, the size and hence cost of the circuit is reduced while permitting one of the input signals to be amplified by the amplifier. Furthermore, elimination of a propagation network which results by having the pluralities of transistors and non-linear elements share a common line, reduces losses and improves noise figure.

In accordance with a further aspect of the invention, the circuit includes a second input terminal coupled to the second input transmission line, over which a local oscillator signal is fed. With such an arrangement, a mixer circuit is provided having all of the advantages described above.

Further, if the inherent reactances of each one of the field effect transistors and non-linear elements of the circuit are taken into consideration when designing the propagation networks of the circuit, a broadband RF matrixed mixer circuit is provided using distributed circuit principles.

In accordance with a still further aspect of the present invention, a matrixed mixer has first and second input terminals and an output terminal, and includes an input propagation network having a first end coupled to a first one of the input terminal and a first plurality of field effect transistors having input electrodes and output electrodes, with the input electrodes being successively coupled by said input propagation network. An intermediate propagation network successively couples the output electrodes of said first plurality of field effect transistors. The mixer further includes a second plurality of field effect transistors each having an input electrode and an output electrode, and a second input propagation network having a first end coupled to the second input terminal. The input electrodes of the second plurality of FETS are successively coupled by the second input propagation network. The output electrodes of the second plurality of field effect transistors are also successively coupled by the intermediate propagation network. A first plurality of non-linear elements each having an input electrode and an output electrode have the input electrodes thereof successively coupled by the intermediate propagation network. A output propagation network having a first end connected to the output terminal is used to successively couple the output electrodes of the plurality of non-linear elements to the output terminal. With this particular arrangement, a matrix mixer having an amplifier for the input RF signal and an amplifier for the input LO signal is provided. This particular arrangement will provide the advantages mentioned above for the prior arrangement and, furthermore, provides relatively good isolation between the RF and LO signal terminals.

In accordance with a still further aspect of the present invention, each one of the input signals r.f. and LO are fed through at least two matrixed stages of distributed amplification. With this particular arrangement, amplification of the input signals is significantly increased since each input signal is amplified by action of the additive gain associated with the distributed portions of the corresponding amplifier, as well as, the multiplicative gain resulting from matrixing at least a pair of said amplifier stages.

In accordance with a still further aspect of the present invention, a matrixed mixer includes a first matrixed amplifier comprised of at least one stage of distributed amplification for an input RF signal, and a second, amplifier comprised of at least one stage of distributed amplification for a local oscillator signal. The mixer further includes a plurality of non-linear elements, such as dual-gate field effect transistors, each having first and second input electrodes and an output electrode. An output propagation network from the last stage of each one of the matrixed amplifiers is used to successively couple each correspondingly one of said input electrodes of the plurality of dual-gate field effect transistors. A third output propagation network is used to successively couple each output electrode of the plurality of dual-gate field effect transistors to the output terminal. With this particular arrangement, RF and LO matrixed preamplifiers may be optimized for low noise and high power operation. Matrixing such a pair of amplifiers with a dual-gate transistor mixer will improve LO to RF isolation due to the high gate to gate isolation of the dual-gate FET. Moreover, the noise figure of such a circuit will be relatively good compared to prior dual-gate based mixers, since each pre-amplifier stage may be designed for low noise operation.

In a preferred embodiment, each of said amplifier stages is a matrix amplifier to increase gain and power impartial to each signal and thus improve conversion efficiency of the mixer.

In accordance with a still further aspect of the present invention, a matrixed mixer includes an input propagation network, and a plurality of non-linear elements having input electrodes successively coupled by the input propagation network. An intermediate propagation network is provided to successively couple output electrodes of the non-linear elements. The mixer further includes second plurality of field effect transistors, have the input electrodes thereof successively coupled by the intermediate propagation network. An output propagation network comprised of a plurality of phase advance line sections is used to successively couple output electrodes of the plurality of field effect transistors. With this particular arrangement, by selection of the gains of the second plurality of field effect transistors as well as the bandwidth characteristics of the intermediate and output propagation networks, a distributed mixer matrixed with a transversal filter is provided. Such an arrangement will provide high suppression of spurious signals and reduce harmonic saturation of succeeding linear circuits.

In accordance with a still further aspect of the present invention, a double down-converter includes a first input propagation network and a second input propagation network. A first plurality of non-linear elements have input electrodes thereof successively coupled by the first input propagation network, and the output electrodes thereof successively coupled by the second input propagation network. A second plurality of non-linear elements has input electrodes thereof successively coupled by the second input propagation network and has output electrodes thereof successively coupled by a third or output propagation network. An input RF signal is fed to the first input propagation network. A first local oscillator signal is fed to the first input terminal of the network and a second local oscillator signal is fed to a second input terminal of the network. A pair of different IF conversions are provided. With such an arrangement, a circuit is provided having multiple frequency conversions which can be an up conversion or a down conversion or some combination thereof. That is, such a circuit would be desirable in certain receivers to reduce spurrious IF responses. This is also useful in receivers requiring a relatively low IF frequency, since conversion to a low IF frequency is facilitated by multiple down conversions rather than a relatively large single down conversion. This arrangement also enables amplification between down conversions by matrixing an amplifier between the first and second pluralities of non-linear elements.

The foregoing features of this invention, as well as the invention itself, may be more fully understood from the following detailed description of the drawings, in which:

FIG. 1 is a schematic representation of a matrix mixer in accordance with a first aspect of the present invention;

FIG. 1A is a schematic of a portion of the circuit of FIG. 1;

FIG. 2 is a schematic representation of a matrix mixer having RF and LO preamplification in accordance with a further aspect of the present invention;

FIG. 3 is a schematic representation of a matrix mixer having multiple amplification stages for both RF and LO signals in accordance with a still further aspect of the present invention;

FIG. 4 is a schematic diagram of a matrix mixer having RF and LO matrix preamplifiers each matrixed with a plurality of dual-gate field effect transistors;

FIG. 5 is a schematic representation of a matrix mixer according to FIG. 1 having an alternate technique for providing high RF to LO isolation and LO preamplification;

FIG. 6 is a schematic representation of a matrixed mixer, having a transversal filter for IF filtering; and

FIG. 7 is a schematic representation of a double downconverter in accordance with a further aspect of the present invention.

Referring now to FIG. 1, a matrix frequency conversion circuit, here a mixer 10 is shown to include an input propagation network 11 here comprised of transmission line sections T.sub.1,1 -T.sub.1,5. Here each one of said transmission line sections and all transmission line sections to be described herein, unless otherwise noted, are microstrip transmission line sections. Such sections connected together provide a microstrip transmission line. However, other types of propagation line media such as coplanar waveguide and, as well as, lumped element propagation networks, for example, may alternatively be used. Moreover, each one of the transistors described herein are metal semiconductor field effect transistors (MESFET). Other transistor types may alternatively be used. Such circuits to be described are also preferrable, provided as monolithic microwave integrated circuits on semiconductor material, such as gallium arsenide or other suitable semiconductor materials.

One end of input propagation network 11, that is one end of transmission line section T.sub.1,1 is coupled through a D.C. blocking capacitor C to an input terminal 11a which is fed an input signal RF from source V.sub.RF. The succeeding end of the input propagation network 11 here at transmission line section T.sub.1,5 is coupled to a termination/bias terminal 11b of the circuit 10. Terminal 11b is connected to a conventional gate bias/RF termination network 23 as shown, which is here a ladder network. Such a network is described in U.S. Pat. No. 4,662,000 incorporated herein by reference. Other gate bias arrangements, such as external biasing may alternatively be used. The mixer 10 is shown to further include a plurality of field effect transistors FET 1,1-FET 1,4 having gate electrodes (G), drain electrodes (D), and source electrodes (S). Generally, the gate electrodes are successively coupled by the input propagation network 11 and the source electrodes are connected to a common RF and D.C. reference potential.

The mixer 10 further includes an intermediate propagation network 13 comprised of transmission line sections T.sub.5,1-T.sub.5,5, having a first end of here transmission line section T.sub.5,1 connected to terminal 13a and a succeeding end, here transmission line section T.sub.5,5 connected to terminal 13b, as shown. If circuit 10 were a frequency multiplier (not shown) then said intermediate transmission line 13 would be terminated at terminals 13a and 13b in matching load impedances to prevent reflections as is known in the art. For the arrangement shown here terminal 13a is coupled to a filter 19 which prevents reflections on line 13 and feed-through from line 13 but which permits an LO signal to be coupled to intermediate line 13. Further, at terminal 13b drain bias is also fed to the transistors FET 1,1 to FET 1,4. A circuit which provides drain bias and termination is shown and is a conventional ladder network 25 of the type referred to in the above U.S. Patent, for example.

The matrix mixer is shown to further include a second plurality of field effect transistors FET 5,1-FET 5,4 which here are operated in a non-linear mode. Propagation network 13 also provides an input propagation network to successively couple input electrodes, here gates, of the non-linear elements FET 5,1-FET 5,4 as shown. The non-linear elements FET 5,1 -FET 5,4 are here metal semiconductor field effect transistors although other types of non-linear elements, such as diodes, may alternatively be used. The non-linear elements FET 5,1-FET 5,4 in addition to having input electrodes or gate electrodes successively coupled by the intermediate line 13, have output electrodes or drain electrodes successively coupled by third propagation network 17 comprised of transmission line sections T.sub.6,1 -T.sub.6,5 which is coupled between terminals 17a and 17b, as shown. Gate bias is provided to the second plurality of transistors by disposing D.C. blocking capacitors C.sub.1 -C.sub.4 between the gate electrodes and the intermediate propagation network 13, and pull-up resistors R between a gate bias line (not shown) and the gate electrode as shown. Here the capacitors are relatively large valve capacitors to provide a minimal change in input impedance to each transistor.

Here terminal 17b provides the output or IF port for the mixer 10, and terminal 17a is terminated in a matching characteristic impedance provided by drain bias network 27, as is generally known from the above patent.

Alternative bias arrangements are described in U.S. Pat. No. 5,021,743 by Chu et al. incorporated herein by reference and assigned to the assignee of the present invention. Provision would be made to insure that each stage is biased to operate in its intended mode. That is FET 1,1-FET 1,4 are generally biased to operate in a linear application mode, whereas FET 5,1-FET 5,4 are biased to operate nonlinearly and thus maximize mixing of the pair of signals. Alternatively, if the circuit is a multiplier, then FET 1,1-FET 1,4 are biased non-linearly to generate harmonics of the input signal.

Each of the transmission line sections T.sub.1,1 -T.sub.1,5 have a characteristic impedance in accordance with the intrinsic reactance between gate and source electrodes of the field effect transistors FET 1,1 to FET 1,5 to provide a network having a requisite input impedance characteristic as is commonly known for distributed amplifiers and as explained in the above-mentioned patent. Similarly, transmission line 13 comprises transmission line sections T.sub.5,1 -T.sub.5,5 has the characteristic impedance thereof selected in accordance with the input capacitance of transistors FET 5,1-FET 5,4 and the output impedance of transistors FET 1,1 FET 1,4 to provide a network having an overall selected characteristic impedance. The last or here third propagation network 17 also has transmission line sections T.sub.6,1 -T.sub.6,5 having a characteristic impedance in accordance with the reactance of the output electrodes of FET 5,1-FET 5,4 to provide a network having a requisite output impedance characteristic. Such arrangement provides a broadband matrix mixer 10.

In operation, an input signal here V.sub.RF is fed to the mixer 10. Such signal, for example, may be a received signal from an antenna of a radar system (not shown). Signal V.sub.RF is fed to terminal 11a and propagates along transmission lines T.sub.1,1 -T.sub.1,5, towards terminal 11b where a residual portion is absorbed to prevent reflection of the signal back to the input. Successive portions of said signal V.sub.RF1 -V.sub.RF4 are coupled from the network 11 by the gate electrodes of field effect transistors FET 1,1-FET 1,4. Amplified versions of said successively coupled signals appear at the outputs or drain electrodes of each of the transistors FET 1,1 FET 1,4, as is commonly known in the distributed amplifier art and are coupled to the intermediate propagation network 13 inducting sections T.sub.5,1 -T.sub.5,4.

Referring also to FIG. 1A, signal portion V.sub.RF1 ' here representative of each one of said signal portions V.sub.RF1 '-V.sub.RF4 ' (FIG. 1) propagates along line 13 in one of three directions. A first portion V.sub.RF1a ' of said signal V.sub.RF1 ' propagates towards terminal 13a, a second portion V.sub.RF1b ' of said signal propagates towards terminal 13b, and a third portion V.sub.RF1c ' of said signal is fed to one of the matrixed mixer elements FET 5,1-FET 5,4 here the gate of element FET 5,1. A second input signal here a local oscillator signal V.sub.LO provided typically from a tunable local oscillator provided in the system (not shown) is fed through filter 19 which isolates the local oscillator from the signal V.sub.RF and is coupled to terminal 13a of circuit 10, as shown. Such local oscillator signal V.sub.LO also propagates along transmission lines T.sub.5,1 -T.sub.5,5 towards terminal 13b where it is terminated in a characteristic impedance provided by the network 25 (FIG. 1). Successive portions of said signal V.sub.LO1 -V.sub.LO4 are also coupled to the matrix mixer elements FET 5,1-FET 5,4 as are signal portions V.sub.RF1 -V.sub.RF4. Such pairs of signals (V.sub.RF1c, V.sub.LO1 and so forth) are fed to the respective non-linear elements FET 5,1-FET 5,4 and produce output signals V.sub.1 -V.sub.4 having signal frequency components .vertline.N.omega..sub.RF +M.omega..sub.LO .vertline., where M, N are integers between 1 and infinity. Such signal portion V.sub.1 -V.sub.4 are coupled to the output terminal 17b by a third propagation network 17 comprised of transmission line sections T.sub.6,1 -T.sub.6,5, as shown.

With the arrangement shown in FIG. 1, the input signal V.sub.RF is amplified by the field effect transistors FET 1,1-FET 1,4, thereby increasing the input signal level fed to the mixer elements FET 5,1-FET 5,4, and thus increasing the conversion efficiency of the matrix mixer 10. Moreover, the presence of the single-gate electrode field effect transistors FET 1,1-FET 1,4 between the network 13 and the input terminal 12 provides a high degree of isolation of the local oscillator signal V.sub.LO from the input terminal 12 of the network 10, thereby preventing radiation of a significant portion of the LO signal.

Referring now to FIG. 2, an alternate embodiment of a matrix mixer 20 is shown to include the input propagation network 11 coupled between input terminal 11a and terminal 11b, the first plurality of field effect transistors FET 1,1-FET 1,4, the intermediate propagation network 13 coupled between terminals 13a and 13b comprised of transmission line sections T.sub.5,1 -T.sub.5,5, the plurality of non-linear elements FET 5,1-FET 5,4, and the output propagation network 17 comprised of transmission line sections T.sub.6,1 -T.sub.6,5 coupled between terminals 17a and 17b, as shown and generally described in conjunction with FIG. 1. Matrixed mixer 20 here further includes a LO preamplifier comprised of a second input propagation network 12 coupled between terminals 12a and 12b and comprised of transmission line sections T.sub.3,1 -T.sub.3,5, and a second plurality of field effect transistors here FET 3,1-FET 3,4 having gate electrodes (G) successively coupled by said transmission line sections T.sub.3,1 -T.sub.3,4 between the terminals 12a and 12b, as shown. The transistors FET 3,1-FET 3,4 also have drain electrodes (D) or output electrodes successively coupled by the intermediate propagation network 13 as also shown. Operation of mixer 20 is similar to that described above in conjunction with FIG. 1 with respect to the input voltage signal V.sub.RF. Here, however, the input voltage signal V.sub.LO is also distributively amplified by the field effect transistors FET 3,1-FET 3,4 and matrixedly fed to the mixer elements FET 5,1-FET 5,4. Thus, voltage signal V.sub.LO is fed to terminal 12a and propagates along transmission line T.sub.3,1 -T.sub.3,5 with successive portions of said signals V.sub.LO1 -V.sub.1O4 being fed to the gate electrodes of transistors FET 3,1-FET 3,4 producing output signals V.sub.L1 -V.sub.L4 which are successively coupled by the propagation network 13. Thus signals V.sub.L1 -V.sub.L4 and V.sub.R1 -V.sub.R4 are fed to the plurality of matrix mixer elements FET 5,1-FET 5,4 and provide the output signals V.sub.1 -V.sub.4, as otherwise generally described in conjunction with FIGS. 1 and 1A. Generally, the output electrodes of transistors FET 1,1 -FET 1,4 are connected with those of FET 3,1-FET 3,4 are at common junctions along the intermediate propagation network 13.

The advantages of the circuit described in conjunction with FIG. 2 in addition to the advantages achieved by the circuit shown in FIG. 1 are that the local oscillator signal V.sub.LO is also amplified by the mixer, thus increasing the conversion efficiency of the mixer particularly for low level input (V.sub.RF) signals. This arrangement also provides relatively high RF to LO isolation and alleviates the need for a filter 19 at the input of the local oscillator terminal 13a as shown in the embodiment of FIG. 1.

In general, all of the embodiments described herein have optional drain electrode transmission line sections T.sub.D1,1, -T.sub.D1,4 and T.sub.D5,1 -T.sub.D5,4, as shown which facilitates circuit layout and optimizes electrical characteristics as is generally known. Such lines, however, are referred to only in conjunction with FIG. 2.

Referring now to FIG. 3, a further embodiment of the matrix mixer 30 is shown to include here two stages of input signal (V.sub.RF) distributed/matrix amplification and two stages of input signal (V.sub.LO) distributed/matrix amplification. The mixer 30 includes the input propagation network 11, first plurality of field effect transistors FET 1,1-FET 1,4, the second plurality of field effect transistors FET 3,1-FET 3,4, second input propagation network 12, the intermediate propagation network 13, matrix mixer elements FET 5,1-FET 5,5, and the output propagation network 17, as generally described in conjunction with FIGS. 1 and 2. Here an additional stage of amplification is provided by transistors FET 2,1-FET 2,4 having input or gate electrodes successively coupled by a second intermediate propagation network 14 comprised of transmission line sections T.sub.2,1 -T.sub.2,5. A second stage of local oscillator signal amplification (V.sub.LO) is provided by field effect transistors FET 4,1-FET 4,4 which have gate electrodes successively connected by a third intermediate propagation network 15 comprised of transmission line sections T.sub.4,1 -T.sub.4,4 as also shown. The output electrodes of the second stage of the RF amplifier, here the drain electrodes of transistors FET 2,1-FET 2,4, as well as, the output electrodes of the second stage of the local oscillator amplifier, that is the drain electrodes of transistors FET 4,1-FET 4,4 are coupled to the first intermediate transmission line network 13 comprised of transmission line sections T.sub.5,1 -T.sub.5,5 as generally described in conjunction with FIG. 1.

Here operation of the mixer 30 is substantially identical to that described in conjunction with FIG. 2, except that each input signal V.sub.RF and V.sub.LO is amplified both by the additive gain provided by the distributed amplifiers and the multiplicative gain provided by matrixing the pair of distributed amplifiers.

Matrixed distributed amplifiers are described in an article entitled "The Matrix Amplifier High Gain Module for Multioctive Frequency Bands" by Niclas et al., IEEE Transactions on Microwave Theory and Techniques, MTT Vol. 35, No. 3, March 1987, pp. 296-306.

Mixer 30 here thus includes a pair of matrixed amplifiers 32a, 32b, as shown. Amplifier 32a is used to provide multiplicative and additive gain to signal V.sub.RF, whereas amplifier 32b is used to provide multiplicative and additive gain to signal V.sub.LO. Amplifiers 32a, 32b are connected to a common propagation network 13 and matrixed with the non-linear elements FET 5,1-FET 5,4 to provide the mixer 30 as shown.

Referring now to FIG. 4, a further alternate embodiment of a matrix mixer 40 is shown to include the pair of matrix amplifiers 32a, 32b for signals V.sub.RF, V.sub.LO respectively, as generally described in conjunction with FIG. 3. Here, however, said amplifiers 32a, 32b are coupled to one of a pair of intermediate propagation networks 13 (as generally described above) and 13'. Here network 13 is comprised of transmission line sections T.sub.5,1 -T.sub.5,3 as mentioned and network 13' is comprised of transmission line sections T.sub.5,1' -T.sub.5,3'.

Here mixer 40 is shown having only two successively coupled elements in each stage thereof. However, more than two of such elements as shown in the preceding figures may alternatively be used.

Here said pair of matrixed amplifiers 32a, 32b are matrixed to a plurality of mixer elements, here said mixer elements being dual-gate field effect transistors (DFET 1-DFET 2) each having a pair of input or gate electrodes G.sub.1, G.sub.2, an output or drain electrode D, and a reference or source electrode S. Here gate electrodes G.sub.1 are successively coupled by the first intermediate propagation network 13, and gate electrodes G.sub.2 are successively coupled by the second intermediate propagation network 13', as shown. Thus, signals V.sub.RF and V.sub.LO are fed separately to the dual-gate field effect transistors. The drains of the dual-gate field effect transistors DFET 1- DFET 2 are successively coupled by the output propagation network 17 comprised of transmission line sections T.sub.6,1 -T.sub.6,3 as also shown. Due to the high degree of gate to gate isolation afforded by the dual-gate FET, the degree of isolation between the output terminal 17b and either one of the input terminals 12, as well as, the isolation between either pair of input terminals 11a, 12a will be relatively high and in particular such a circuit would be well suited for mixer applications requiring a high degree of LO to RF isolation.

Referring now to FIG. 5, an alternate embodiment of a matrix mixer 50 having RF and LO distributed amplification, but having a simpler layout than that described in conjunction with FIG. 2 is shown to include the mixer 10 of FIG. 1, and a distributed amplifier 51 used to amplify the local signal V.sub.LO. Amplifier 51 includes an input propagation network comprised of transmission line sections T.sub.1 -T.sub.4 and an output propagation network comprised of transmission line sections T.sub.5 -T.sub.7 with the end of transmission line T.sub.7 being connected to terminal 13a and the transmission line section T.sub.5,1 of the network 13, as generally described in conjunction with FIG. 1. A plurality of here three field effect transistors FET 1 -FET 3 are used to successively couple portions of the input signal fed along transmission line sections T.sub.1 -T.sub.4 to the respective field effect transistors FET 1-FET 3 producing output signals which are successively coupled, and propagate along transmission line sections T.sub.5 -T.sub.8 towards the transmission line section T.sub.5,1 at terminal 17a, as will now be generally understood.

Thus, an amplified version of the local oscillator signal V.sub.LO is fed to the matrix mixer 10 of FIG. 1. This particular arrangement obviates the need for a filter at the input terminal of the mixer of FIG. 1 to isolate the RF signal from the LO signal and, furthermore, provides gain to the LO signal, thus, increasing the conversion efficiency of the mixer 50. This arrangement may be easier to implement as a monolithic microwave integrated circuit than the implementation shown in FIG. 2, since there is no need for crossovers to couple the LO amplifier stage and the RF amplifier stage to the matrix mixer elements.

Referring now to FIG. 6, a further embodiment of a matrix mixer 60 is shown to include the matrix mixer non-linear elements FET 5,1-FET 5,3 as generally described above in conjunction with FIGS. 1-5 being fed by composite signals RF, LO which may be provided, for example, from matrixed amplifiers configured, as generally described in conjunction with FIGS. 1-5 or may be fed by other means. The mixer input network 13 is matrixed with a transversal filter 65 comprised of the output propagation network 17, as generally described in conjunction with FIGS. 1-5, and a second output propagation network 65 here a phase advance, lumped element network comprised of series connected capacitors and shunt connected inductors, as generally shown. The transversal elements of the transversal filter are here provided by field effect transistors FET X,1 -FET X,3, said transistors having selective weights or gains which when IF signals are fed thereto provide in combination with the network 17 and the network 65 a predetermined passband characteristic. Thus, this arrangement may be used to provide mixer 60 with a well-defined IF passband.

Preferred examples of transversal filters suitable for use as the transversal filter 65 in the matrix mixer 60 of FIG. 6 are described in U.S. Pat. No. 5,021,756 by Tajima et al. incorporated herein by reference and assigned to the assignee of the present invention. The use of the transversal filter matrixed with the matrix amplifier provides compact IF filtering, which suppresses spurious signals and minimize harmonic saturation at succeeding linear circuits.

Referring now to FIG. 7, a further alternate embodiment of the present invention, a multiple downconverter 70, which provides a plurality of intermediate frequency signal conversions to input signal V.sub.RF by using a corresponding plurality of different, local oscillator signals V.sub.LOa and V.sub.LOb is shown. Such a circuit 70 is commonly employed in receivers requiring multiple down-conversions. Multiple downconversions are often used to reduce spurrious signals in the IF band. Alternatively, multiple down conversions are often used to efficiently convert to a relatively low IF frequency.

Here signal V.sub.RF1, V.sub.RF2 is matrixly fed to the first plurality of mixer elements FET 5,1-FET 5,2 as generally described in conjunction with FIGS. 1-6. Such signals V.sub.RF1, V.sub.RF2 are successively coupled to the intermediate propagation network 13, as also generally described above.

A first local oscillator signal here V.sub.LO1 is fed to terminal 13a and is coupled to the intermediate propagation network 13. Said signals V.sub.RF and V.sub.LO are down converted by transistors FET 5,1-FET 5,2 to provide a first conversion .vertline..omega..sub.RF .+-..omega..sub.LOa .vertline. providing a first IF frequency .omega..sub.IF1.

The output electrodes of transistors FET 5,1-FET 5,2 are successively coupled by network 17, as generally described above. Here, however, network 17 also serves to successively couple the input or gate electrodes of a succeeding stage of matrix mixer elements here FET 6,1-FET 6,2 as shown. Generally both ends of line 17 are terminated in a matching impedence. The IF signals are fed to the second matrixed mixer stage. A second signal V.sub.LOb is also fed to the inputs of mixer elements FET 6,1 to FET 6,2. In response a second frequency conversion .vertline..omega..sub.IF .+-..omega..sub.LOb .vertline. is provided at terminal 18b to provide the second IF frequency signal .omega..sub.IF2. Terminal 18a is here terminated in a matching impedance as in FIG. 1. Alternatively, one or more stages of distributed amplification may be disposed between the matrixed mixer stages.

Having described preferred embodiments of the invention, it will now become apparent to one of skill in the art that other embodiments incorporating their concepts may be used. It is felt, therefore, that these embodiments should not be limited to disclosed embodiments, but rather should be limited only by the spirit and scope of the appended claims.