Switched Mode Power Supply Controller Having a Stand-by State Using a Frequency Divided Burst Mode

The present invention relates to a power supply device adapted for various electric or electronic instruments and more particularly to a switching mode power supply controller having two-output-levels minimize the power consumption without the use of a relay circuit in a stand-by site by reducing the level of one of the output voltages of the power supply controller.

In general, the conventional instruments employing the switching mode power supply control the switching frequency or the pulse width to provide constant output voltages, for example, +124, +24 and +16 V, to the corresponding output terminals, respectively. In the stand-by state for which a master switch of the switching mode power supply is in ON-state, the switching mode power supply provides the power only to the necessary parts, for example, a microcomputer and the like and the output voltages for the other parts are cut off by a relay circuit.

On the other hand, if the system does not include the relay circuit, the output voltages are controlled by an ON/OFF switching operation of transistors in accordance with an input supply voltage however, there remain many difficulties when a power supply device having many output terminals to be cut off for the power in the stand-by state. In addition, if none of the output voltages are cut off except the input supply voltage, unnecessary power is consumed in the stand-by state.

It is an object of the present invention to provide a switching mode power supply controller having two-output-level which lowers the output voltages of the switching mode power supply, except the input supply voltage, in the stand-by state to minimize the power consumption for the stand-by state, while providing normal output voltages in the operation state.

According to the present invention, there is provided a switching mode power supply controller having two-output-levels, including a switching mode power supply circuit which provides output voltages by driving a transformer using a switching transistor in response to an input square wave, further comprising: a frequency-dividing circuit connected to an input terminal for receiving the square wave, for changing the frequency of the square wave from f to f/N, a controlling circuit connected to the frequency-dividing circuit for controlling the output voltages of the frequency-dividing circuit in accordance to a power control signal of a microcomputer; and a switching circuit connected to a primary coil of the transformer for controlling the output voltages of the switching mode power supply circuit according to the operation of the frequency-dividing circuit.

These and other objects, features, and advantages of the present invention will become more apparent from the following description for the preferred embodiments taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a circuit diagram of a switching mode power supply controller having two-output-levels according to the present invention.

The present invention will now be described in more detail with reference to the accompanying drawings.

FIG. 1 shows a circuit of a switching mode power supply controller having two-output-levels. A switching transistor Q1 is connected to a first smoothing circuit 1 which smooths an applied square wave P1 from an input terminal. Conversely, a primary coil of a transformer T1 is connected to a bridge-type rectifier BD1, while its secondary coil is connected to a second smoothing circuit 2 which is operated by the driving of the transistor Q1.

The second smoothing circuit 2 consists of bridge-type rectifiers BD2 to BD4 and smoothing capacitors C1 to C3, and three output terminals U1 to U3, that is, output terminals for output voltages, such as +124 V, +24 V and +16 V. Also, a +5 V regulator 3 is connected to the +16 V output terminal U3. On the other hand, a frequency-dividing circuit 10 is connected to an input terminal.

In the frequency-dividing circuit 10, a divide-by-N counter 11 for changing the frequency of a square wave P1 from an input terminal from f1 to f1/N is connected to a digital delay part 12 for delaying the square wave signal during a reset time of a microcomputer 21, and two switching transistors Q2 and Q4 are connected to the digital delay part 12.

Subsequently, a controlling circuit 20 is connected to the frequency-dividing circuit 10 to control it in accordance with a power control signal of the microcomputer 21. The controlling circuit 20 consists of two switching transistors Q3 and Q5 which are driven by the power control signal of the microcomputer 21 and a +5 V regulator 22 connected to an emitter of the transistor Q3. Finally, a switching circuit 30, which controls output voltages according to the operation of the frequency-dividing circuit 10, is connected between the primary coil of the transformer T1 and the +125 V output terminal U1.

In the switching circuit 30, an output voltage of a comparator CP1, which compares a voltage V5 induced from the transformer T1 according to the driving of the transistor Q1 with a reference voltage Vref applied from a bridge-type rectifier BD1, is applied to the control terminal of a switch SW1 through a diode D2 and thus the switch SW1 is switched according to the operation state of the comparator CP1. Also, another terminal of the switch SW1 is connected to the +16 V output terminal U3 and a regulator 3.

To explain the operation of the present invention in detail, it is as follows. The input square wave P1 is smoothed by the first smoothing circuit 1 and this smoothed signal is applied to the base of a transistor Q1 to drive the transistor Q1. Also, the DC voltage is supplied to the transformer T1 through the bridge-type rectifier BD1. According to the driving of the transistor Q1, therefore, the output voltage appears at the terminals U1 to U3 through the bridge-type rectifiers BD2 to BD4 and the capacitors C1 to C3 connected to the secondary coil of the transformer T1. The output voltage 16 V at the terminal U 3 is applied to the +5 V regulator 3 and the output voltage of the +5 V regulator 3 is provided to the microcomputer 21.

On the other hand, the microcomputer 21 provides the power control signal of high level in a stand-by state, while in the normal operation state it provides the power control signal of low level. Thus, the transistor Q5 is turned on by the high level signal provided from the microcomputer 21 in the stand-by state and the transistors Q3 and Q4 are turned off since the level at the collector of the transistor Q5 becomes low. At this time, the high level voltage at the collector of the transistor Q4 is not passed through the diode D1, by the off-state operation of the diode D1 and thus it has no effect on the transistor Q2.

On the other hand, the frequency of the square wave P1 is reduced from f1 to f1/N by the divide-by-N counter 11 and an output signal of the divided-by-N counter 11 is applied to the base of the transistor Q2 after it is delayed by the digital delay part 12 until the microcomputer 21 is reset. In the stand-by state, thus, the frequency f1 of the square wave P1 is divided by a factor of N so that the output voltages of the transformer T1 are dropped, that is, the voltages at the output terminals U1 to U3 are reduced to +125/N V, +24/N V and +16/N V, respectively.

In other words, in the stand-by state, the output voltages of the switching mode power supply are lowered by the ratio 1/N. Then, these lowered voltages correspond to a feedback voltage. As such, the voltage V5 which is applied from the transformer T1 to the inverting terminal of the comparator CP1 is downed from V5 to V5/N since the transformer T1 is driven with the reduced frequency of f1/N by the transistor Q1.

On the other hand, to the non-inverting terminal of the comparator CP1, the DC reference voltage Vref is applied from the bridge-type rectifier BD1. Then, the comparator CP1 compares the DC reference voltage Vref with the voltage V5 induced from the transformer T1. At this time, if the voltage V5 is changed to V5/N, the comparator CP1 turns on the switch SW1 to provide the output voltage at the terminal U1 to the other terminal U3. Thus, the output voltage at the terminal U3 is also lowered by 1/N since the voltage at the terminal U1 is lowered by 1/N. That is, in the stand-by state, both voltages at the output terminals U3 and U4 are lowered so that the microcomputer 21 is not driven. In order to drive the microcomputer 21 in the stand-by state, therefore, higher voltage is required.

The switch SW1 is turned on to provide the higher voltage of the terminal U1 to the terminal U3 and thus the regulator 3 provides a normal voltage V4 to the microcomputer 21 so that the microcomputer 21 is maintained during the stand-by state. Thus, when the output voltages of the switching mode power supply are lowered, the microcomputer 21 can maintain the stand-by state since the lowered output voltages are superposed by the switch SW1 and the superposed voltage is applied to the MICOM 21 through the regulator 3.

Next, the normal operation state, when the power is turned on in the stand-by state, will be described. If the power is in ON-state the power control signal of the microcomputer 21 is changed to low level and thus the transistor Q5 is turned off so that the transistor Q4 is turned on in order to go to low level at the collector of the transistor Q4 for the purpose of forming an open-circuit of the transistor Q2. During an off-state switching operation of the transistor Q2, the divided f1/N square wave pulse P1 of the divided-by-N counter 11 has no effect on the transistor Q1 and this means that the divide-by-N operation is stopped and the square wave P1 is directly applied to the base of the transistor Q1 through the first smoothing circuit 1.

Also, the transistor Q3 is turned on for an off-state operation of the transistor Q5, and thus the voltage at the output terminal U3 is applied to the regulator 22 to provide a normal operation voltage to a system (not shown). Since the transistor Q1 is driven by the original frequency f1 of the square wave pulse, P1, the voltage V5 applied to the inverting terminal of the comparator CP1 is divided-by-N and not appeared and this voltage V5 causes the switch SW1 to be cut off in response to the resulted value out of comparing the voltage V5 with the reference voltage Vref. Thus, the comparator CP1 provides the lower level output and thus the switch SW1 is turned off. Thus, when the switching mode power supply is in the normal state, normal rate voltages such as +125 V, +24 V and +16 V are outputted from the corresponding output terminals U1, U2 and U3, respectively so as to be in a normal operation of system.

As mentioned hereinabove, the present invention according to the electric or/and electronic instruments employing the switching mode power supply maintains the other downed output voltages, except the stand-by state voltage for the microcomputer 21, in the stand-by state and provides the normal output voltages in power-on state to minimize the power consumption by reducing the unnecessary power at the stand-by state.

The invention is in no way limited to the embodiment described hereinabove. Various modification of the disclosed embodiment as well as other embodiments of the invention will become apparent to persons skilled in the art upon reference to the description of the invention. It is therefore contemplated that the appended claims will cover any such modifications or embodiments as fall within the true scope of the invention.