US 5,075,818 AGrant
Semiconductor-Type Laminated Ceramic Capacitor With a Grain Boundary-Insulated Structure and a Method for Producing the Same
Issue Date:1991-12-24
•20 Claims
•2 Drawing Sheets
Abstract
A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure made of SrTiO.sub.3 as the main component, comprising the functions of a conventional capacitor which absorbs low voltage noises and high frequency noises, and a varistor when high voltage noises and electrostatic charges invade, wherein simultaneous sintering of the materials of the ceramic capacitor together with the materials of inner electrodes has been made possible in the manufacturing process. A material to be made semiconducting is added to the main component of SrTiO.sub.3 with an excess in Ti, the materials of Mn--Si, which are converted to MnO.sub.2 and SiO.sub.2 in the sintering process are also added to the main component.
Metadata
Assignee
- Matsushita Electric Industrial Co., Ltd.
Inventors
- Iwao Ueno
- Yasuo Wakahata
- Kimio Kobayashi
- Kaori Okamoto
- Akihiro Takami
Application Information
Application Number:US 8522227
Filing Date:1990-09-28
Priority Date:1989-02-16
Art Unit:211
Classifications
IPC:
H01G 412H01G 700C04B 3546
Field of Search:
36150129320-322135;13625.42
Patent Drawings (2 sheets)
Description
Technical Field
The present invention relates to a semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure and a method for producing the same, and more particularly to a ceramic capacitor which absorbs low voltage noises and high frequency noises under the normal operational conditions as a capacitor, works as a varistor against invading high voltage loads such as pulses and electrostatic charges, thereby protecting built-in semiconductors and electronic equipment from being damaged by abnormal voltage loads such as noises, pulses and electrostatic charges arising from surrounding electronic equipment, wherein characteristics of said ceramic capacitor being stable to temperature changes.
Background Art
Recently, semiconductor elements such as IC and LSI are widely used in electronic devices and equipment to realize multifunctional applications of the equipment and to make the equipment light, small and handy. However, the use of many semiconductor elements makes the electronic device less resistant to disturbance from electric noises. The conventional method to protect the electronic devices from invading electric noises is to integrate by-pass capacitors such as film capacitor, laminated ceramic capacitor and semiconductor ceramic capacitor into the power line of IC and LSI. These capacitors display excellent performances to absorb low voltage noises and high frequency noises. They are, however, so impotent to high voltage pulses and electrostatic charges that mulfunctionings of the equipment, break-down of semiconductors and/or capacitors themselves occur frequently when the electronic equipment is invaded by high voltage pulses or electrostatic charges. Therefore, these technical problems in the conventional capacitors should be improved.
A new type capacitor, which has sufficient resistance and excellent absorbing ability to pulses as well as good noise absorbing ability and stability to temperature and frequency changes, was developed and disclosed in Japanese Laid-Open Patent Publication No. 57-27001 and Japanese Laid-Open Patent Publication No. 57-35303 etc., wherein varistor functions were added to a ceramic capacitor made of SrTiO.sub.3 series of ceramic materials and the capacitor was defined as "a semiconductor type ceramic capacitor having varistor functions" (hereinafter referred to as a ceramic capacitor with varistor functions). This ceramic capacitor with varistor functions works as a varistor when high voltage pulses and electrostatic charges invade while it absorbs low voltage noises and high frequency noises as a conventional capacitor, thereby protecting the electronic equipment and built-in semiconductors from abnormal high voltage noises, pulses and electrostatic charges generated by surrounding electronic equipment and devices, and providing wide application fields of the capacitor.
Since the electronic parts are made more sophisticated, lighter and smaller, and more handy, ceramic capacitors with varistor functions are also required to be smaller but higher in performance. The effective electrode area of the conventional single-plate type ceramic capacitor with varistor functions will be, however, decreased when the capacitor is miniaturized, resulting in the reduction of electric capacitance and hence inferior reliability of the capacitor. A capacitor having laminated structure of the electrode is devised to solve the aforementioned problem, wherein the effective electrode area is expected to be increased. However, the ceramic capacitor with varistor functions is conventionally manufactured by a process comprising a step of coating the surface of a SrTiO.sub.3 type semiconductor element with oxides, followed by a thermal diffusion process to form an electric insulating layer in the grain boundaries. It is recognized to be very difficult to manufacture "a laminate type ceramic capacitor having varistor functions" (hereinafter referred to as a laminated ceramic capacitor with varistor functions) by sintering the material of the ceramic capacitor simultaneously with the material of an inner electrode, though conventional laminated ceramic capacitors made from a BaTiO.sub.3 series of materials are manufactured by this process.
As a method to overcome the problem of simultaneous formation of a material of laminated ceramic capacitor with varistor functions by sintering the material of the ceramic capacitor together with the material of inner electrode, the following method for manufacturing a laminated ceramic capacitor with varistor functions is developed and provided, using methods as are disclosed in Japanese Laid-Open Patent Publication No. 54-53248 and Japanese Laid-Open Patent Publication No. 54-53250, comprising the steps of: printing a pattern corresponding to the inner electrode by using ceramic paste enriched in organic binder on the surface of the ceramic substrate; forming a porous sheet corresponding to the pattern of the inner electrode by sintering; and impregnating the porous sheet with electrically conducting metals under the appropriate pressure, or alternatively a step of forming a pattern for the inner electrode by a gilding or fusion method. These processes, however, involve many difficulties to be overcome and they are as yet far from practical applications.
Japanese Laid-Open Patent Publication No. 59-215701 provides a method comprising the manufacturing steps of: forming a raw sheet made of ceramic powder calcinated in a non-oxidizing atmosphere; printing a pattern of the inner electrode by using an electric conductive paste mixed with a thermal diffusion material on the surface of the raw sheet, said thermal diffusion material having the ability to form electric insulating layers in the grain boundaries; and sintering said raw sheet in an oxidizing atmosphere. Another method disclosed in Japanese Laid-Open Patent Publication No. 63-219115 comprises the manufacturing steps of: forming a raw sheet made of semiconductive ceramic powder as a main component, said main component being mixed with oxide to form an insulating layer and/or diffusion material containing a glass material; laminating said raw sheets with a plurality of inner electrode sheets mutually one by one; and sintering said laminated sheets in air or in an oxidizing atmosphere. In the above-discussed two manufacturing methods, however, sintering is performed at a relatively low temperature of 1000.degree.-1200.degree. C. Therefore, the capacitor elements thus formed are not made from a perfect sintered body of ceramic powder wherein grain boundaries are scarcely contacted with their faces. The ceramic capacitors obtained entail the shortcomings comprising: relatively small electric capacitance; small value of the voltage non-linearity coefficient .alpha. which is a representative characteristic of a capacitor having varistor functions; instability of varistor voltage; and inferior reliability as a capacitor. The manufacturing method disclosed in the latter invention, Japanese Laid-Open Patent Publication No. 63-219115, involves the step of adding a glass material to the ceramic powder which entails a problem of glassy phase deposits in the grain boundaries, whereby said electric characteristics tends to be poor and the capacitor element is not recognized as reliable. The manufacturing process is considered to be far from practical.
Concerning laminated capacitors having varistor functions, voltage non-linear laminated capacitor elements made of ZnO, Fe.sub.2 O.sub.3 and TiO.sub.2 series of ceramic materials have been provided in Japanese Laid-Open Patent Publication No. 58-23921. Capacitance of capacitor elements of this type are, however, very small and they involve the deficiencies in that they display little effect on the electric noises with voltage of below the varistor region or to high frequency noises, while they have excellent ability to absorb pulses and electrostatic charges of relatively high voltage.
Disclosure of the Invention
Although many attempts have been made and the technical results are provided in the prior art concerning the compositions and manufacturing methods of various kinds of laminated ceramic capacitors with varistor functions, they involve deficiencies and shortcomings with regards to the manufacturing process itself or to the performances of the capacitor elements manufactured. None of them are considered to be practical as yet, and novelties in compositions and manufacturing methods of laminated ceramic capacitors with varistor functions are expected to be developed.
The present invention with respect to the above has an objective to provide a semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure made of the materials of SrTiO.sub.3 type ceramics as main component and a method for producing the same, providing the functions of: a conventional capacitor to absorb low voltage noises and high frequency noises; a varistor when high voltage pulses and electrostatic charges invade to the circuit; and a capacitor having characteristics of being stable with regard to temperature variations, wherein the capacitor element is manufactured by simultaneous sintering of the materials of the ceramic capacitor together with the inner electrode materials.
The present invention, which overcomes the deficiencies and shortcomings of the prior art, provides a semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at the edge of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprise a material of the composition of SrTiO.sub.3 containing excess Ti to make the final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3 Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to the ceramic material to make their relative molar content in the range from 0.05 to 2.0%; and Mn and Si are also included in the ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0 mol %.
Generally speaking, a ceramic material having a composition of SrTiO.sub.3 is made semiconductive by a forced reduction process or, after adding an accelerating agent to make the material semiconductive, by a sintering process in the reducing atmosphere. The process to make the material semiconductive, however, may remain incomplete according to the nature of the agent used. When the amount of Sr or Ti is made slightly excess out of the stoichiometric ratio of SrTiO.sub.3, the lattice defects in the crystal of the ceramics will increase, thereby accelerating the material to be semiconductive. In addition, the ceramic material is made semiconductive advantageously by adding Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 (hereinafter referred to as first components) since these compounds control the atomic valency.
Next, Mn and Si (hereinafter referred to as second components) are the essential compounds to form a laminated structure and the absence of one of these two compounds will result in the incomplete formation of a lamellar structure. As mentioned above, manufacturing of laminated ceramic capacitors with varistor functions using a SrTiO.sub.3 series was considered to be difficult in the prior art. The first reason depends on the fact that the material for the ceramic capacitor with varistor functions displays a different nature and behavior with the material of the inner electrode during the sintering and re-oxidation processes. The former materials require a reducing atmosphere in the sintering process while the latter materials made of metals expand in volume by occluding hydrogen gas in the reducing atmosphere. Furthermore, the latter material is oxidized into a metal oxide and tends to block re-oxidation of the former material during the re-oxidation process in air.
Formation of a ceramic capacitor element with varistor functions by using the former material, which is the second reason why the process is difficult, involves a process of surface diffusion comprising the steps of: making the material semiconductive by sintering in the reducing atmosphere; covering the surface of the ceramic sheets with metal oxides with high electric resistance (i.e., MnO.sub.2, CuO.sub.2, Bi.sub.2 O.sub.3, Co.sub.2 O.sub.3) followed by re-oxidation in the air; and insulating grain boundaries by selective diffusion of the metal oxides. However, in the structure of the capacitor element laminated by the ceramic plate and inner electrode material mutually one by one, diffusion of metal oxides into grain boundaries is technically difficult.
The inventors of the present invention discovered the following facts through ardent studies.
First, a ceramic capacitor with varistor functions was readily manufactured by adding the second components as well as the first components into the ceramic material of SrTiO.sub.3 having an excess in Ti, and by sintering the material in the reducing atmosphere followed by a re-oxidation process. Spreading of metal oxide paste with high electric resistance over the surface of the ceramic plates was found to be needless to form insulating grain boundaries. The experimental facts are interpreted as follows; the second component added, together with an excess of Ti, forms a liquid phase comprised of Mn, Si and Ti ternary oxide systems at a relatively low temperature during the sintering process. The liquid phase enhances sintering of grains while the oxides melt and segregate in the grain boundaries. Re-oxidation of the capacitor element, in the boundaries of which a liquid phase comprised of Mn, Si and Ti ternary oxide systems is formed, in the air completes the formation of an insulating metal oxide film comprising segregated ternary oxides of Mn, Si and Ti in the grain boundaries, thereby producing readily a ceramic capacitor with varistor functions having a structure with a grain boundary insulation layer. Excess Ti was found to prevent oxidation of the inner electrode as well as diffusion of metal oxides into the inner electrode. For this reason the ceramic material of SrTiO.sub.3 with an excess of Ti was used in the present invention.
Second, the material SrTiO.sub.3, having an excess in Ti, to which the second component was added, was made semiconductive by sintering in a nitrogen atmosphere as well as in the reducing atmosphere. This finding can be partly interpreted by the same reasoning, as is described in the discussions of the first experiment, that the material forms a liquid phase at a relatively low temperature. The Mn added not only forms a liquid phase but also acts as an atomic valence control agent. In playing as an atomic valence control agent, the ionic valence of Mn ion is +2 or +4 and its electronic state is unstable and liable to be excited, thereby increasing the sinterability. This is the reason the ceramic material is readily made semiconductive through a sintering process in a nitrogen atmosphere by adding Mn ion as a second component.
Third, the raw material formed into the laminated capacitor sheets was calcinated in air before being subjected to the sintering process. This treatment prevented the product, a laminated ceramic capacitor with varistor functions, from the troubles of; breakage in electric connections in inner electrodes, de-lamination of the ceramic sheets, cracking in the ceramic sheets, a decrease in sintering density and nonuniformity in the sintered body etc. Furthermore, electric characteristics and reliability in performances of the capacitor such as capacitance, voltage non-linearity coefficient .alpha. and varistor voltage was also largely improved.
According to the present invention, with respect to the above, a laminated ceramic capacitor with varistor functions, comprising the manufacturing steps of sintering the material of the ceramic capacitor with varistor functions together with the material of the inner electrode simultaneously, is readily manufactured.
Brief Description of the Drawings
FIG. 1 is an exploded perspective view to explain the examples of the present invention, showing laminated raw sheets and the pattern of the inner electrode paste printed on said raw sheet.
FIG. 2 is a partially cutaway view of the laminated ceramic capacitor with varistor functions obtained from the examples of the present invention.
FIG. 3 is a flow sheet showing the process to manufacture the laminated ceramic capacitor with varistor functions to explain the examples of the present invention.
Best Mode for Carrying Out the Invention
Details of the present invention will be described hereinafter with reference to the examples.
Example 1
Powders of TiO.sub.2 were added to the powder material of SrTiO.sub.3 of mean particle size of 0.5 .mu.m or less and purity of 98% or more, adjusting the molar ratio of Sr/Ti. The first component, Nb.sub.2 O.sub.5, and second components, MnO.sub.2 and SiO.sub.2 (the relative molar content of the two compounds are made equal, respectively), were weighed and mixed with the material described above, as are shown in Tables 1-15. The mixed powder was ground and mixed in a wet state by using a ball mill and, after drying, the ground powder was subjected to a calcination process by heating at 600.degree.-1200.degree. C. in air. The calcinated powder was ground again to make a mean particle size of 0.5 .mu.m or less, providing the powder for the starting material of a laminated ceramic capacitor with varistor functions. The finely powdered starting material was dispersed in an organic solvent together with an organic binder such as a butyral resin compound forming a slurry. The slurry was next subjected to the formation of a raw sheet with a thickness of about 50 .mu.m by using the method of Dr. Blade, and the sheet was cut into a predetermined size.
A pattern of inner electrode paste 2 containing Pd was printed by a screen printing technique corresponding to the predetermined size, as is shown in FIG. 1, on the raw sheet 1 formed by the above-described method. As is apparent from FIG. 1, inner electrode pastes 2 are not printed on the uppermost and lowermost part of the raw sheet 1a in the laminated capacitor material. The pattern of inner electrode paste 2 on the intermediate part of the laminated raw sheets 1 reaches to the one edge of the sheet, and the edges are distributed alternatively one by one in the opposite (different) directions in the laminates as is known. The raw sheets 1a were disposed on the uppermost and lowermost parts and raw sheets 1 printed the above inner electrode pastes thereon were laminated therebetween, a plurality of these sheet pairs were pressed and compacted with a heat treatment. The pressed sheets were then calcinated and degreased by heating at 600.degree.-1250.degree. C. in air. The calcinated sheets were next subjected to sintering by heating at 1200.degree.-1350.degree. C. in a reducing atmosphere, followed by re-oxidation by heating at 900.degree.-1250.degree. C. in air.
As shown in FIG. 2, outer electrode paste containing Ag was painted on the edges of the sheets where terminals of inner electrodes 2a were exposed alternatively and the silver paste was baked by heating at 800.degree. C. for 15 minutes in air, thereby completing a ceramic capacitor 4 with varistor functions, comprising a plurality of inner electrode 2a on the surface of the grain boundary insulated semiconductor type ceramic sheets, the terminals of said inner electrodes 2a reaching to each of opposite edge of the sheet alternatively one by one; and outer electrodes 3 at opposite edges of the semiconductor type ceramic sheets, said outer electrodes being connected electrically to the terminals of said inner electrodes 2a exposed at the edges of the sheets alternatively.
Size of the laminated ceramic capacitor of this example, abbreviated as Type 5.5, is 5.70 mm in width, 5.00 mm in length and 2.00 mm in thickness. The capacitor is composed of 10 effective sheets on which a pattern of inner electrodes is printed, and non-effective sheets on which the pattern of inner electrode is not printed, wherein both type of sheets are laminated alternatively one by one. FIG. 3 shows a manufacturing process flow sheet of the present invention.
According to the laminated ceramic capacitor with varistor functions thus manufactured, electrical characteristics such as capacitance, tan .delta., varistor voltage, voltage non-linearity coefficient .alpha., equivalent series resistance (ESR), capacitance-temperature rate of change and temperature coefficient of varistor voltage are listed in Tables 1-15. The experimental conditions for sample preparations were; 1200.degree. C., 2 hours for calcination and degreasing in the air; 1300.degree. C., 2 hours for sintering in the reducing atmosphere of N.sub.2 :H.sub.2 =99:1; and 1100.degree. C., 1 hour for re-oxidation.
Each electrical characteristic was obtained under the following experimental conditions.
Capacitance was measured at 1.0 V, 1.0 KHz.
Varistor voltage V.sub.0.1mA was measured at 0.1 mA.
voltage non-linearity coefficient .alpha. was calculated from the values of varistor voltage measured at 0.1 mA and 1.0 mA, respectively, using the following equation
Equivalent series resistance (ESR) is defined as resistance at resonance frequency measured at 1.0 V.
Capacitance-temperature rate of change (.DELTA.C/C) was calculated from the values measured at -25.degree. C. and 85.degree. C., respectively.
Temperature coefficient of varistor voltage (.DELTA.V/V) was calculated from the values measured at 25.degree. C. and 50.degree. C., respectively.
Next, the data listed in Tables 1-15 show the effect of the ratio of Sr/Ti and the effect of the amount of added second component, MnO.sub.2 and SiO.sub.2, to the characteristics of the capacitor.
The samples marked by the symbol * in the tables are listed for comparison and they are not included in the range of claims in the present invention. The sintered bodies marked by the symbol * possess small capacitance, small value of voltage non-linearity coefficient .alpha., which is a representative characteristic of varistors, and large value of equivalent series resistance (ESR). A capacitor having the above-discussed characteristics can not display the performances both of a normal capacitor, which absorbs low voltage noises and high frequency noises, and of a varistor which absorbs high voltage pulses and electrostatic charges at the same time. The capacitor has a relatively large capacitance-temperature rate of variation and varistor voltage temperature coefficient, whereby making reliability and electric characteristics of the capacitor liable to be affected by temperature change. Therefore, these samples are not suited for the use of a ceramic capacitor with varistor functions which protect electronic devices and equipment from being damaged by abnormal voltage such as noises, pulses and electrostatic charge generated by surrounding electronic equipment. Other samples which are not marked in the tables, on the other hand, possess large capacitance, large value of voltage non-linearity coefficient .alpha. and small equivalent series resistance (ESR). A capacitor having these characteristics displays the performances both of a normal capacitor, which absorbs low voltage noises and high frequency noises, and of a varistor which absorbs high voltage pulses and electrostatic charges. This capacitor has relatively small capacitance-temperature rate of variation and varistor voltage temperature coefficient, thereby making reliability and electric characteristics of the capacitor hardly liable to be affected by temperature change. Therefore, these samples are well suited for the use of a ceramic capacitor with varistor functions which protects electronic devices and equipment from being damaged by abnormal voltage such as noises, pulses and electrostatic charge generated by surrounding electronic equipment.
In the present invention, the molar ratio of Sr/Ti in the ceramic material of SrTiO.sub.3 is controlled because, when the ratio is greater than 1.00, the amount of Sr will be in excess relative to the amount of Ti, thereby preventing the formation of the liquid phase composed of Mn, Si and Ti ternary oxide system. A grain boundary insulated structure of the ceramics is difficult to be formed with the above-mentioned composition and, moreover, oxidation and diffusion of the materials of the inner electrode occur, resulting in poor electric characteristics and reliability. On the other hand, when the molar ratio of Sr/Ti is less than 0.95, the sintered body obtained will be porous and sintering density decreases. Powder materials of its mean particle size for the starting material of laminated ceramic capacitor with varistor functions was defined to be 0.5 .mu.m or less because, when a powder of mean particle size more than 0.5 .mu.m or is used, the particles tend to coagulate in the slurry, thereby the surface of raw sheets formed by using such non-uniform slurry becomes gritty and not smooth. Sintering density and packing density of the sintered body obtained are small and the sintered body is difficult to make semiconductive, thereby electric characteristics of the ceramic capacitor tends to be unstable.
Next, the total amount of the second components added, MnO.sub.2 and SiO.sub.2, are also controlled because, when combined relative molar content of the second component is less than 0.2%, the effect of the added material is hardly reflected in the formation of the liquid phase composed of Mn, Si and Ti ternary oxide system. Grain boundary insulated structure of the ceramics is difficult to form, thereby sintering density of the ceramic capacitor obtained is decreased and electric characteristics tend to be poor. On the other hand, when the relative molar content of the second component added exceeds 5.0%, the amount of metal oxides with high electric resistance segregating in the grain boundaries increases and electric characteristics of the ceramic capacitor also degrades.
The process of calcination and degreasing by heating the raw sheet at 600.degree.-1250.degree. C. in the air is most important in the method of formation of a laminated ceramic capacitor with varistor functions in the present invention. Most of the electric characteristics and reliability of the ceramic capacitor with varistor functions manufactured are determined during this process. The purposes of the process are to enhance adhesive force between the material of the ceramic capacitor with varistor functions and the material of the inner electrodes, and to adjust sintering density, uniformity in the texture of the sintered body, and mean grain size of the crystal particles in the grain boundary insulated, semiconductor type ceramics of laminated ceramic capacitor with varistor functions manufactured. The rate of temperature increase was adjusted to 200.degree. C./H or less in the degreasing and calcination process because the slower the temperature increase was, the more desirable results were obtained after the degreasing and calcination process.
The temperature for degreasing and calcination in the air is limited between 600.degree. and 1250.degree. C. When the temperature is lower than 600.degree. C., the process is not effective enough while, when the temperature for calcination exceeds 1250.degree. C., electric characteristics and reliability of the capacitor will be largely decreased for the following reasons;
(1) The ceramic capacitor with varistor functions is sintered instead of being calcinated by heating at this high temperature range. When the capacitor sintered previously in air is subjected to sintering in the reducing atmosphere or in the nitrogen atmosphere, the sintered body shrinks rapidly and is attacked by concentrated stress, thereby producing de-lamination and cracks in the laminated ceramic capacitor with varistor functions.
(2) Oxidation of Ni as well as sintering of the ceramic capacitor with varistor functions will proceed at the same time when Ni is used as a material for the inner electrode. The sintered body reacts with Ni followed by the diffusion of Ni, resulting in breaking of the inner electrodes, de-lamination and formation of cracks in the laminated ceramic capacitor with varistor functions.
(3) Sintering in the liquid phase of Mn, Si and Ti ternary oxide system proceed rapidly under the sintering condition at high temperature over 1250.degree. C. and the growth of grains is accelerated, thereby largely decreasing sintering density and packing density.
(4) The sintered body treated in the above-mentioned manner is difficult to make semiconductive by the sintering process in a reducing or nitrogen atmosphere afterward.
The laminated ceramic capacitor with varistor functions thus manufactured has larger capacitance and displays more excellent temperature and frequency characteristics than the capacitor disclosed in aforementioned Japanese Laid-Open Patent Publication No. 58-23921. The ceramic capacitor in the present invention is manufactured by laminating ceramic capacitor materials with varistor functions which possesses both functions of a normal capacitor, which absorbs noises, and of a varistor which absorbs pulses and electrostatic charge, while the above-mentioned capacitor in the prior art is simply made of piled varistor material which shows prominent absorbing ability for surge current. The laminated ceramic capacitor with varistor functions in the present invention is apparently distinct from that in the prior art in its functions and uses.
Example 2
It was found from Example 1 that the amount of added second component, the combined amount of MnO.sub.2 and SiO.sub.2, should be in the range of a relative molar content of 0.2-5.0%. A laminated ceramic capacitor with varistor functions was manufactured by using a similar method as was described in Example 1, except that the molar ratio of MnO.sub.2 and SiO.sub.2, the second components, was changed variously. The Sr/Ti ratio was fixed to 0.97, and a relative molar content of Nb.sub.2 O.sub.5 added as first component was fixed to 1.0%. The results are listed in Table 16.
As are apparent from the experimental results in Table 16, both Mn and Si which convert into MnO.sub.2 and SiO.sub.2 in the sintering process are required for manufacturing the laminated ceramic capacitor with varistor functions and the absence of one of the two compounds does not result in the formation of the same. The liquid phase composed of Mn, Si and Ti ternary oxide system is only allowed to form in the presence of the above-mentioned two compounds. A capacitor element having a grain boundary insulated structure is formed readily when the liquid phase of Mn, Si and Ti ternary oxide system segregates among grain boundaries and is made insulating by re-oxidization.
MnO.sub.2 is preferably added in slight excess to obtain a capacitor of desirable electric characteristics such as capacitance, voltage non-linearity factor .alpha. and ESR.
Example 3
A laminated ceramic capacitor was manufactured according to the methods described in Examples 1 and 2, except that the added amounts of the first components which serve as a valency controlling agent were changed variously, i.e. Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2. The ratio of Sr/Ti was fixed to 0.97, while the combined relative molar content of the second components was fixed to 1.0% for MnO.sub.2 and 1.0% for SiO.sub.2, the total amount of which was fixed to 2.0%. The results are described in Tables 17-25.
As are apparent from the results described in Tables 17-25, the amounts of the first components added are controlled because, when the relative molar contents of the first components are less than 0.05%, the effects of the additives are not enough to make the material semiconductive. When the combined relative molar contents of the first components exceed 2.0%, the material is depressed to be semiconductive, thereby preventing the capacitor from having desired electric characteristics and decreasing sintering density.
Addition of Nb.sub.2 O.sub.5 or Ta.sub.2 O.sub.5 as a first component seemed to result in better electric characteristics of the capacitor than the cases when V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 was added.
Effects of mixed composition of first components to the electric characteristics of the capacitor were studied in several cases. Addition of two kinds or more of first components to the ceramic material displayed slight appreciable effect to the electric characteristics of the capacitor compared to the cases when one component was added to the material, as are shown in Table 25. Addition of Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5, however, seemed to be more effective to manufacture a capacitor of better electric characteristics than addition of other components. As sample No. 214 shows, simultaneous addition of Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5 resulted in better electric characteristics.
When mean particle size of the starting material was larger than 0.5 .mu.m, addition of first components tended to be ineffective, therefore it was confirmed that mean particle size of the starting material should be 0.5 .mu.m or less.
Example 4
In aforementioned examples Pd was used as a material of the inner electrode. A laminated ceramic capacitor with varistor functions was manufactured by using a similar method as described in Examples 1 to 3, except that Au, Pt, Rh or Ni was used as a material of inner electrode. The ratio of Sr/Ti was fixed to 0.97, while relative molar contents of first components, 0.5% for Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5, respectively, and those of second components, 1.0% for MnO.sub.2 and SiO.sub.2, respectively, were also fixed. The results are listed in Table 26.
As are shown in Table 26, it was confirmed that at least one or more kinds of metals of Au, Pt, Rh, Pd and Ni, or alloys or compositions thereof, could be used for the material of the inner electrodes, each of them having identical effect as electrode material. When Ni is used for inner electrode material, compositions of Pd to Ni or use of SrTiO.sub.3 slightly excess in Ti is recommended since Ni is prone to be oxidized at relatively low temperature.
It was also confirmed that compositions of metals other than those described in the examples of the present invention could be used advantageously for the material of inner electrode.
In the examples of the present invention, powders of TiO.sub.2 are added and mixed to the powder material of SrTiO.sub.3 to prepare SrTiO.sub.3 with an excess of Ti. Needless to say, however, carbonate, hydroxide of Ti or organic Ti compounds are also used advantageously for the preparation of same starting material.
In the examples of the present invention, SrTiO.sub.3 was used as powder material. Needless to say, however, powder material of SrTiO.sub.3 prepared from the materials of SrO or SrCO.sub.3 and TiO.sub.2 is used successfully for manufacturing the capacitor elements of identical characteristics.
As for MnO.sub.2 and SiO.sub.2 as second components, carbonates or hydroxides of them are also effective for the preparation of the starting material. With respect to Mn, however, use of MnCO.sub.3 was, confirmed to be more appropriate for manufacturing a capacitor element with stable characteristics and good mass productivity, because particle size distribution of the compound is fine and uniform and the compound is readily pyrolyzed.
In aforementioned examples, the sintering process was performed in a reducing atmosphere of the composition of N.sub.2 :H.sub.2 =99:1. When H.sub.2 concentration in the atmosphere is increased, the following phenomena are observed with regard to both the material of the inner electrodes and the material of the ceramic capacitor with varistor functions;
(1) Electrode material is expanded by occluding H.sub.2 gas.
(2) The material of the ceramic capacitor with varistor functions is facilitated to be semiconductive.
These phenomena entail the problems in laminated ceramic capacitors with varistor functions with respect to electric and mechanical characteristics, comprising; breaking of electrical connections in inner electrodes, de-lamination of ceramic sheets, occurrence of cracking in ceramic sheets and incomplete re-oxidation of ceramic materials. Consequently, when sintering is performed in an atmosphere in which H.sub.2 concentration is increased, it is preferable for manufacturing a ceramic capacitor with desirable characteristics that the sintering temperature range is made a little lower (1200.degree.-1300.degree. C.). On the contrary, a ceramic capacitor with varistor functions is rather difficult to be made semiconductive when it is sintered in N.sub.2 atmosphere or in an atmosphere containing a smaller amount of H.sub.2 gas. Therefore, the material is preferably sintered in a little higher temperature range (1300.degree. C.-1450.degree. C.). H.sub.2 concentration relative to N.sub.2 is most preferably in the range of 99.5:0.5.ltoreq.N2:H.sub.2 .ltoreq.95:5.
In above-mentioned examples, mixed powder was calcinated in the air. The calcination process performed in N.sub.2 atmosphere was confirmed, however, to be advantageous also.
With regard to the re-oxidation process, the material was re-oxidized at a predetermined temperature of 1100.degree. C. in the above examples. The temperature range of 900.degree.-1250.degree. C. is also advantageous for re-oxidation to manufacture a capacitor element with desirable characteristics. When re-oxidation is performed at a highest temperature of 1200.degree. C. or more, however, the duration of high temperature should be as short as possible. Otherwise, not only the materials in grain boundaries but also crystal grains are oxidized and made insulating. When Ni is used for inner electrode material, prolonged heating at 1200.degree. C. or more for re-oxidation will oxidize metallic Ni itself. Therefore, the duration of heating time at higher temperatures for re-oxidation should carefully be kept as short as possible.
Ag was used for the material of outer electrode in the examples described above. However, Pd, Ni, Cu and Zn were confirmed to be used advantageously for the same purpose. The material for the outer electrode comprises at least one or more kinds of metals of Pd, Ag, Ni, Cu and Zn, and alloys or compositions of them. When Pd or Ag is used for the material of the outer electrode, an appreciable polarization is observed in varistor voltage because the metals have difficulty in making ohmic contact with the capacitor element. However, the basic characteristics of the capacitor are not influenced at all by polarization.
Mean particle size of the powder material of a laminated ceramic capacitor with varistor functions manufactured by the method disclosed in the above examples was approximately in the range of 2.0-3.0 .mu.m. When calcination is achieved by heating at 1300.degree. C. or higher in air, sintering of liquid phase of Mn, Si and Ti ternary oxide system is accelerated and consequently growth of grains is enhanced, thereby increasing mean grain size up to twice or more. Increased mean grain size entails many problems comprising: decreasing in sintering density and packing density, decreasing in voltage non-linearity coefficient .alpha., decreasing in equivalent series resistance (ESR) and dispersing in electric characteristics. The ceramic capacitor thus manufactured would be poor in electric characteristics and reliability, thereby making the capacitor inappropriate to practical uses.
The capacitor element thus obtained comprises the advantages of; large capacitance and voltage non-linearity coefficient .alpha., small varistor voltage and equivalent series resistance (ESR), and excellent temperature and frequency characteristics, whereby absorbing low voltage noises and high frequency noises as a function of an ordinary capacitor, absorbing high voltage pulses and electrostatic charges as a function of a varistor, and responding quickly to invading abnormal voltages such as noises, pulses and electrostatic charges. The capacitor is expected to replace various uses of conventional capacitors such as film, laminated ceramic and semiconductor capacitors. Moreover, the laminated ceramic capacitor with varistor functions of the present invention is smaller in size and larger in capacitance compared to a conventional single plate type ceramic capacitor with varistor functions, thereby wide range of applications as mounting parts in circuit cards are also expected.
In aforementioned examples, a laminated ceramic capacitor with varistor functions composed of grain boundary insulated, semiconductor type ceramic was described, said ceramic being composed of SrTiO.sub.3 in which excess Ti is contained so as to adjust the molar ratio of Sr to Ti in he range of 0.95.ltoreq.Sr/Ti<1.00, wherein a first component such as Nb.sub.2 O.sub.5 and/or Ta.sub.2 O.sub.5 are added in relative molar content of 0.05-2.0%, and the combined second components of Mn and Si, converting in molecular weight of MnO.sub.2 and SiO.sub.2 respectively, are added in relative molar content of 0.2-5.0%. According to the present invention, further improvements in characteristics of the capacitor elements made of grain boundary insulated, semiconductor type ceramic are expected, wherein third and fourth components are added still more to the ceramic material.
Detailed examples are described hereinafter.
Example 5
Na.sub.2 SiO.sub.3 is added as a third component in this example and the effects will be described in further detail with reference to the example.
A laminated ceramic capacitor with varistor functions was manufactured by using similar methods as described in Examples 1 to 4, except that the amount of added third component, Na.sub.2 SiO.sub.3, was adjusted and changed variously. The ratio of Si/Ti was fixed to 0.97; the relative contents of first components added, and Ta.sub.2 O.sub.5, were fixed to 0.5%, respectively, while those of combined second components, MnO.sub.2 and SiO.sub.2 was fixed to 1.0%, respectively. The results are listed in Table 27.
As are described in Table 27, the capacitance-temperature rate of variation and varistor voltage temperature coefficient are improved by adding a third component, Na.sub.2 SiO.sub.3, Na.sub.2 SiO.sub.3 works as a carrier to diffuse the liquid phase of Mn, Si and Ti ternary oxide system uniformly in the grain boundaries, thereby forming distinct interfaces among the semiconductor crystal region and high resistance grain boundary region. When relative molar content of the third component added, Na.sub.2 SiO.sub.3, is less than 0.05%, the effects of the additive is not clear and few improvements in capacitance-temperature rate of variation and varistor voltage temperature coefficient are observed. When relative molar content of the third component is over 2.0%, Na.sub.2 SiO.sub.3 which serves as a carrier will be in excess in grain boundaries, whereby decreasing capacitance and voltage non-linearity coefficient .alpha., increasing equivalent series resistance (ESR), decreasing sintering density and degrading mechanical strength.
A mixture of Na.sub.2 O and SiO.sub.2 can also be used as third components instead of Na.sub.2 SiO.sub.3. Since Na.sub.2 O is a very unstable compound and decomposes readily during sintering process, it is liable to scatter or diffuse into the atmosphere, leaving few Na atoms in the sintered body manufactured. Moreover, it was confirmed that migration of partially ionized Na.sup.+1 ions under the load of high temperature and high voltage entails degradation of capacitor characteristics. The effects of added Na ion is provided advantageously by adding the ion in the form of a compound with SiO.sub.2.
It was confirmed that Na ion should be added to the material in the form of a compound of Na.sub.2 SiO.sub.3.
Example 6
Next, an example where NaAlO.sub.2 is added as the third component will be described. A laminated ceramic capacitor with varistor functions was manufactured by using similar methods as described in Examples 1 to 4, except that the amount of added third component, NaAlO.sub.2, was adjusted and changed variously as is described in Example 5. The ratio of Sr/Ti was fixed to 0.97; the relative contents of first components added, Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5, were fixed to 0.5%, respectively, while those of the combined second components, MnO.sub.2 and SiO.sub.2 was fixed to 1.0%, respectively. The results are listed in Table 27.
As are described in Table 28, the first advantage of adding a third component, NaAlO.sub.2, to the ceramic material is, just like the addition of Na.sub.2 SiO.sub.3 described in Example 5, that it improves the capacitance-temperature rate of change and varistor voltage temperature coefficient. Na atoms in added NaAlO.sub.2 work as carriers to diffuse the liquid phase of Mn, Si and Ti ternary oxide system homogeneously into grain boundaries, thereby forming distinct interfaces among semiconductive crystal grains and grain boundaries of high electric resistance.
Second, voltage non-linearity coefficient .alpha. increases and equivalent series resistance (ESR) decreases by adding NaAlO.sub.2, because Al atoms in NaAlO.sub.2 are solubilized in a solid state into the crystal lattice, thereby decreasing the electric resistance of crystal grains. When relative molar content of added NaAlO.sub.2 is less than 0.05%, characteristics of the capacitor are not influenced desirably by the additive; giving no improvements in capacitance-temperature rate of change and varistor temperature coefficient, not increasing voltage non-linearity coefficient .alpha., and not decreasing equivalent series resistance (ESR). On the other hand, when relative molar content of the additive exceeds 4.0%, which means it exceeds the saturated solubility in the crystal lattice, excess NaAlO.sub.2 segregates in the grain boundaries, thereby increasing electric resistance of grain boundaries and hence decreasing capacitance and voltage non-linearity coefficient .alpha. rapidly, increasing equivalent series resistance (ESR), decreasing sintering density and mechanical strength of the capacitor.
Mixture of Na.sub.2 O and Al.sub.2 O.sub.3 can also be used as third component instead of NaAlO.sub.2. Since Na.sub.2 O is a very unstable compound and decomposes readily during the sintering process, it is liable to scatter or diffuse into the atmosphere, leaving few Na atoms in the finished sintered body. Moreover, it was confirmed that migration of partially ionized Na.sup.+1 ions under the load of high temperature and high voltage entails degradation of capacitor characteristics. The effects of added Na ion is provided advantageously by adding the ion in the form of a compound of NaAlO.sub.2.
It was confirmed that Na ion should be added to the material in the form of a compound of NaAlO.sub.2.
Example 7
An example where Li.sub.2 SiO.sub.3 is added as a third component will be described. A laminated ceramic capacitor with varistor functions was manufactured by using similar methods as described in Examples 1 to 4, except that the amount of added third component, Li.sub.2 SiO.sub.3, was adjusted and changed variously as is described in Examples 5 and 6. The ratio of Sr/Ti was fixed to 0.97; the relative contents of the first component added, Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5, were fixed to 0.5%, respectively, while those of combined second components, MnO.sub.2 and SiO.sub.2 were fixed to 1.0%, respectively. The results are shown in Table 29.
As are described in Table 29, by adding a third component, Li.sub.2 SiO.sub.3, to the ceramic material, just like Examples 5 and 6, the capacitance-temperature rate of change and varistor voltage temperature coefficient are improved. Added Li.sub.2 SiO.sub.3 works as a carrier to diffuse the liquid phase of Mn, Si and Ti ternary oxide system homogeneously into grain boundaries, thereby forming distinct interfaces among semiconductive crystal grains and grain boundaries of high electric resistance. When relative molar content of added Li.sub.2 SiO.sub.3 is less than 0.05%, characteristics of the capacitor are not influenced desirably by the additive, giving no improvements in the capacitance-temperature rate of change and varistor temperature coefficient. On the other hand, when relative molar content of the additive exceeds 2.0%, the amount of carrier Li.sub.2 SiO.sub.3 increases, thereby decreasing capacitance and voltage non-linearity coefficient .alpha., increasing equivalent series resistance (ESR), and decreasing sintering density and mechanical strength of the capacitor.
A mixture of Li.sub.2 O and SiO.sub.2 can also be used as a third component instead of Li.sub.2 SiO.sub.3. Since Li.sub.2 O is a very unstable compound and decomposes readily during the sintering process, it is liable to scatter or diffuse into the atmosphere, leaving few Li atoms in the finished sintered body. Moreover, it was confirmed that migration of partially ionized Li.sup.+1 ions under the load of high temperature and high voltage entails degradation of capacitor characteristics. The effects of added Li ions are provided advantageously by adding the ion in the form of a compound of Li and SiO.sub.2.
Thus, Li ion should be added to the material in the form of a compound of Li.sub.2 SiO.sub.3.
Example 8
Next, an example where LiAlO.sub.2 is added as third component will be described. A laminated ceramic capacitor with varistor functions was manufactured by using similar methods as described in Examples 1 to 4, except that the amount of added third component, LiAlO.sub.2, was adjusted and changed variously as is described in Examples 5 to 7. The ratio of Sr/Ti was fixed to 0.97; the relative contents of the first component added, Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5 were fixed to 0.5%, respectively, while those of combined second components, MnO.sub.2 and SiO.sub.2 were fixed to 1.0%, respectively. The results are listed in Table 30.
As are described in Table 30, the first advantage of adding third component, LiAlO.sub.2, to the ceramic material is, just like the addition of the third component described in Examples 5 to 7, that it improves the capacitance-temperature rate of change and varistor voltage temperature coefficient. Li atoms in added LiAlO.sub.2 work as carriers to diffuse the liquid phase of Mn, Si and Ti ternary oxide system homogeneously into grain boundaries, thereby forming distinct interfaces among semiconductive crystal grains and grain boundaries of high electric resistance.
Second, the voltage non-linearity coefficient .alpha. increases and equivalent series resistance (ESR) decreases by adding LiAlO.sub.2, because Al atoms in added LiAlO.sub.2 are solubilized in a solid state into the crystal lattice, thereby decreasing electric resistance of crystal grains.
When relative molar content of added LiAlO.sub.2 as third component is less than 0.05%, characteristics of the capacitor are not influenced desirably by the additive; giving no improvements in the capacitance-temperature rate of change and varistor temperature coefficient, not increasing voltage non-linearity coefficient .alpha., and not decreasing equivalent series resistance (ESR).
On the other hand, when relative molar content of the additive exceeds 4.0%, which means it exceeds the saturated solubility in the crystal lattice, excess LiAlO.sub.2 segregates in the grain boundaries, thereby decreasing electric resistance of grain boundaries and hence decreasing capacitance and voltage non-linearity coefficient .alpha. rapidly, increasing equivalent series resistance (ESR), and decreasing sintering density and mechanical strength of the capacitor.
A mixture of Li.sub.2 O and AlO.sub.2 can also be used as the third component instead of LiAlO.sub.2.
However, when the mixture of Li.sub.2 O and AlO.sub.2 is used, since Li.sub.2 O is a very unstable compound and decomposes readily during sintering process, it is liable to scatter or diffuse into the atmosphere, leaving few Li atoms in the finished sintered body. Moreover, it was confirmed that migration of partially ionized Li.sup.+1 ions under the load of high temperature and high voltage entails degradation of capacitor characteristics. The effects of added Li ions are provided advantageously by adding the ion in the form of a compound of LiAlO.sub.2.
It was confirmed that Li ion should be added to the material in the form of a compound of LiAlO.sub.2.
Example 9
Na.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are added as third and fourth components, respectively in this example. A laminated ceramic capacitor with varistor functions was manufactured by using similar methods as described in Examples 1 to 4, except that the amount of added fourth component, Al.sub.2 O.sub.3, was adjusted and changed variously. The ratio of Sr/Ti was fixed to 0.97; the relative molar contents of the first component added, Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5, were fixed to 0.5%, respectively, while those of combined second components, MnO.sub.2 and SiO.sub.2 were fixed to 1.0%, respectively. Relative molar content of third material, Na.sub.2 SiO.sub.3, was also fixed to 0.5%. The results are listed in Table 31.
As are described in Table 31, addition of the fourth component, Al.sub.2 O.sub.3, increases the voltage non-linearity coefficient .alpha. and decreases equivalent series resistance (ESR), because Al.sub.2 O.sub.3 added is solubilized in solid state into the crystal lattice and decreases electric resistance of crystal grains. When relative molar content of the fourth component added, Al.sub.2 O.sub.3, is less than 0.05%, it gives no improvements in voltage non-linearity coefficient .alpha. and no decrease in equivalent series resistance (ESR). On the other hand, when the relative molar content of the additive exceeds 2.0%, which means it exceeds the saturated solubility in the crystal lattice, excess Al.sub.2 O.sub.3 segregates in the grain boundaries, thereby decreasing electric resistance of grain boundaries and hence decreasing capacitance and voltage non-linearity coefficient .alpha. rapidly.
Example 10
Li.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are added as third and fourth components, respectively, in this example. A laminated ceramic capacitor with varistor functions was manufactured by using similar methods as described in Examples 1 to 4, except that the amount of the added fourth component, Al.sub.2 O.sub.3, was adjusted and changed variously. The ratio of Sr/Ti was fixed to 0.97; the relative molar contents of the first component added, Nb.sub.2 O.sub.5 and Ta.sub.2 O.sub.5, were fixed to 0.5%, respectively, while those of combined second components, MnO.sub.2 and SiO.sub.2 were fixed to 1.0%, respectively. Relative molar content of the third material, Li.sub.2 SiO.sub.3, was also fixed to 0.5%. The results are listed in Table 32.
As are described in Table 34, addition of fourth component, Al.sub.2 O.sub.3, increases voltage non-linearity coefficient .alpha. and decreases equivalent series resistance (ESR), because the Al.sub.2 O.sub.3 added is solubilized in solid state into the crystal lattice and decreases electric resistance of crystal grains. When relative molar content of the fourth component added, Al.sub.2 O.sub.3, is less than 0.05%, characteristics of the capacitor are not influenced desirably by the additive; giving no improvements in capacitance-temperature rate of change and varistor temperature coefficient, not increasing voltage non-linearity coefficient .alpha. and not decreasing equivalent series resistance (ESR). On the other hand, when relative molar content of the additive exceeds 2.0%, which means the saturated solubility in the crystal lattice, excess Al.sub.2 O.sub.3 segregates in the grain boundaries, thereby decreasing electric resistance of grain boundaries and hence decreasing capacitance and voltage non-linearity coefficient .alpha. rapidly.
Effects of adding one of the third components, Na.sub.2 SiO.sub.3, NaAlO.sub.2, Li.sub.2 SiO.sub.3 and LiAlO.sub.2 to the ceramic material were described in Examples 5 to 8. In Examples 9 and 10, two combinations of the additives, Na.sub.2 SiO.sub.3 as a third component and Al.sub.2 O.sub.3 as a fourth component; and Li.sub.2 SiO.sub.3 as a third component and Al.sub.2 O.sub.3 as a fourth component were described. However, other combinations can be use with respect to the present invention.
One of them is to use only Al.sub.2 O.sub.3 as a third component. In this case, as described in Examples 9 and 10, by adding relative molar content of 0.05 to 2.0% of the third component, Al.sub.2 O.sub.3, voltage non-linearity coefficient .alpha. is improved and equivalent series resistance (ESR) is decreased. In addition, various combinations of third and fourth components other than those described in Examples 9 and 10, for example combination of Na.sub.2 SiO.sub.3 and Li.sub.2 SiO.sub.3 or NaAlO.sub.2 and LiAlO.sub.2, are also devised. Improvements in characteristics of the capacitors by adding Na.sub.2 SiO.sub.3, Li.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 as third, fourth and fifth components are considered to be possible. In summary, any combinations of aforementioned compounds are possible as third, fourth, fifth components and so on to obtain a capacitor of desired characteristics.
The material of inner and outer electrodes described in Examples 1 to 4 are also applied to the electrodes for the capacitors described in Examples 5 to 10.
Industrial Applicability
As is described above, according to the present invention, a laminated ceramic capacitor with varistor functions is obtained comprising both functions of a capacitor and a varistor, and the capacitor is capable of being mounted on a circuit board. The capacitor works as an ordinary capacitor which absorbs low voltage noises and high frequency noises while it functions as a varistor when high voltage pulses and electrostatic charges invade, thereby protecting semiconductors and electronic instruments from abnormal voltages such as noises, pulses and electrostatic charges generated by surrounding electronic instruments. The characteristics of the capacitor are always stable to temperature changes. Practical applications of the above capacitor are;
(1) The capacitor can replace conventional film, laminated ceramic and semiconductor type capacitors which are used for by-pass capacitors for protecting IC and LSI mounted on the circuit cards of electronic equipment.
(2) The capacitor can replace ZnO type capacitors which are used for preventing malfunctioning of electronic equipment and absorbing ON-OFF surge arising from inductive loads.
The capacitor possesses both functions described in above-discussed terms (1) and (2) and a wide range of applications are expected.
Manufacturing of a laminated ceramic capacitor with varistor functions of the present invention is made easy because simultaneous sintering of the materials of ceramic capacitor with varistor functions with the materials of inner electrode has became possible for the following reasons. Besides materials to be semiconductive are added to SrTiO.sub.3 with an excess in Ti, Mn-Si components composed of MnO.sub.2 and SiO.sub.2 are also added in the sintering process. The grain boundary insulated structure of semiconductor type ceramic capacitor is formed readily by the re-oxidation process by using the material of above-described composition, whereas a surface diffusion process of metal oxides is necessary in the manufacturing process of conventional ceramic capacitors. Many troubles such as breaking electrical connection in inner electrodes, de-lamination, cracks in ceramic sheets, a decrease in sintering density and non-uniformity of the texture in the sintered body in laminated ceramic capacitor with varistor functions are prevented from occurring or held to a minimum amount by sintering the laminated raw body in the air. Electric characteristics such as capacitance, voltage non-linearity coefficient .alpha. and varistor voltage, and reliability of the products are largely improved. The present invention provides two major advantages in the aforementioned composition of the starting materials and in manufacturing process of the capacitors.
Since the laminated ceramic capacitor with varistor functions of the present invention is smaller in size and possesses larger capacitance and higher performances compared to conventional single plate type ceramic capacitors with varistor functions, the former capacitor is expected to have a wide range of applications as highly integrated mounting elements for the electronic equipment such as video camera and communication apparatus.
Therefore, according to the present invention capacitor elements comprising the functions of protecting semiconductors and electronic equipment from invading abnormal voltages such as noises, pulses and electrostatic charges can be obtained. Characteristics of the capacitor are so stable to temperature changes that effects of the present invention are greatly evaluated from the point of practical applications.
Claims
We claim:
1. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprises a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; and Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%.
2. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 1, wherein said inner electrode is made of at least one or more kinds of metals selected from Au, Pt, Rh, Pd or Ni, or alloys or compositions thereof.
3. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 2, wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu and Zn, or alloys or compositions thereof.
4. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure according to claim 1, wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu and Zn, or alloys or compositions thereof.
5. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure comprising the steps of calcinating starting material of mixed powder in air or in a nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheet alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating the laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in a reducing atmosphere or in a nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; and Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%.
6. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure according to claim 5, wherein said inner electrode is made of at least one or more kinds of metals selected from Au, Pt, Rh, Pd or Ni, or alloys or compositions thereof.
7. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure according to claim 6, wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu or Zn, or alloys or compositions thereof.
8. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure according to claim 5, wherein said outer electrode is made of at least one or more kinds of metals selected from Pd, Ag, Ni, Cu or Zn, or alloys or compositions thereof.
9. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprises a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na.sub.2 SiO.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.05-2.0%.
10. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure comprising the steps of calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheet alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating the laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on the surface of which patterns of inner electrode paste have been printed; sintering said laminated raw sheets in a reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises of a material of the composition of SrTiO.sub.3 containing excess Ti to make a final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na.sub.2 SiO.sub.3 is further included in said ceramic material to make the relative molar content in the range of 0.05-2.0%.
11. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein said ceramic sheets comprise a material of the composition of SrTiO.sub.3 containing excess Ti to make the final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00 at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and NaAlO.sub.2 is further included in said ceramic material to make relative molar content in the range of 0.05-4.0%.
12. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure comprising the steps of calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheet alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating the laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on the surface of which patterns of inner electrode paste have been printed; sintering said laminated raw sheets in a reducing atmosphere or in a nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprise a material of the composition of SrTiO.sub.3 containing excess Ti to make a final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and NaAlO.sub.2 is further included in said ceramic material to make relative molar content in the range of 0.05-4.0%.
13. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.05-2.0%.
14. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure comprising the steps of: calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheet alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating the laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste have been printed; sintering said laminated raw sheets in a reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub. 2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 is further included in said ceramic material to make relative molar content in the range of 0.05-2.0%.
15. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise a material of the composition of SrTiO.sub.3 containing excess Ti to make a final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and LiAlO.sub.2 is further included in said ceramic material to make the relative molar content in the range of 0.05-4.0%.
16. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure comprising the steps of: calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheet alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating the laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in a reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises a material of the composition of SrTiO.sub.3 containing excess Ti to make a final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub. 2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and LiAlO.sub.2 is further included in said ceramic material to make relative molar content in the range of 0.05-4.0%.
17. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.
18. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure comprising the steps of: calcinating staring material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheets alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating the laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste have been printed; sintering said laminated raw sheets in a reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Na.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.
19. A semiconductor-type laminated ceramic capacitor with a grain boundary-insulated structure comprising a plurality of inner electrodes on the surface of the grain boundary insulated, semiconductor type ceramic sheets, the terminal of each of said inner electrodes being extended to one edge of the corresponding ceramic sheet and said ceramic sheets being laminated so that said terminals of said inner electrodes come to the corresponding opposite edge of said ceramic sheets alternatively one by one; and outer electrodes electrically connected to said terminals of inner electrodes at opposite edges of each of said grain boundary insulated, semiconductor type ceramic sheets, wherein: said ceramic sheets comprise a material of the composition of SrTiO.sub.3 containing excess Ti to make the final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said ceramic material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said ceramic material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.
20. A method for manufacturing semiconductor-type laminated ceramic capacitors with a grain boundary-insulated structure comprising the steps of: calcinating starting material of mixed powder in air or in nitrogen atmosphere after grinding, mixing and drying said mixed powder; forming raw sheets by dispersing said calcinated powder in a solvent with organic binder and molding said dispersed powder, said calcinated powder being re-ground before dispersing and after calcinating; printing a pattern of inner electrode paste on the surfaces of said raw sheets, terminals of said inner electrodes being extended to each of the corresponding opposite edges of said raw sheet alternatively one by one (wherein patterns of inner electrodes are not printed on uppermost and lowermost parts of raw sheets); calcinating laminated body in air, said laminated body being formed by laminating and compressing said raw sheets on which surfaces patterns of inner electrode paste has been printed; sintering said laminated raw sheets in a reducing atmosphere or in nitrogen atmosphere after calcination; re-oxidizing in air after sintering; and covering said edges of sintered ceramic sheets with outer electrode paste and baking after re-oxidation, terminals of inner electrodes being exposed to said edges, wherein: said starting material of mixed powder comprises a material of the composition of SrTiO.sub.3 containing excess Ti to make final molecular ratio of Ti to Sr in the range of 0.95.ltoreq.Sr/Ti<1.00; at least one or more kinds of the compounds selected from Nb.sub.2 O.sub.5, Ta.sub.2 O.sub.5, V.sub.2 O.sub.5, W.sub.2 O.sub.5, Dy.sub.2 O.sub.3, Nd.sub.2 O.sub.3, Y.sub.2 O.sub.3, La.sub.2 O.sub.3 or CeO.sub.2 are added to said starting material to make their relative molar content in the range from 0.05 to 2.0%; Mn and Si are also included in said starting material to the amount of their combined relative molar content, converting into MnO.sub.2 and SiO.sub.2 respectively, in the range of 0.2 to 5.0%; and Li.sub.2 SiO.sub.3 and Al.sub.2 O.sub.3 are further included in said ceramic material to make their relative molar contents in the range of 0.05-2.0% and 0.05-2.0%, respectively.
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