PWM Controlled DC/AC Power Converter

This invention relates to an apparatus for controlling a power converter, which is adapted to control, in accordance with the PWM system, a power converter for system interconnection interposed between the d.c. power source and the a.c. system to adjust interchange power therebetween.

Power converters for system interconnection of this kind may have an inverter operating mode used in supplying power from the d.c. power source to the a.c. system and a rectifier operating mode used in supplying power from the a.c. system to the d.c. power in a manner opposite to the above.

When it is assumed that a voltage on the a.c. side of a power converter is V.sub.in, a voltage of the a.c. system is V.sub.sy, a reactance between the d.c. power source and the a.c. system is X, and a phase difference angle between the voltage V.sub.in and the voltage V.sub.sy is .phi. (which is positive when the phase of the voltage V.sub.in leads the phase of the voltage V.sub.sy), effective or active power P and reactive power Q processed in the power converter are respectively expressed as follows:

Where the power converter is operated in the rectifier operating mode, the amplitude of voltage V.sub.in is smaller than that of voltage V.sub.sy and the phase of voltage V.sub.in lags that of voltage V.sub.sy. Thus, the power converter dissipates lagging reactive power Q and transmits effective power P from the a.c. system to the d.c. power source. Moreover, as apparent from the above equations (1) and (2), even if the amplitude of voltage V.sub.in is smaller than that of voltage V.sub.sy, as long as the phase of voltage V.sub.in leads that of voltage V.sub.sy, the power Converter the dissipates lagging reactive power Q and transmits the effective power P from the d.c. power source to the a.c. system.

When the effective value of the voltage V.sub.in satisfies the condition expressed by the following equation with respect to the effective value of the voltage V.sub.sy,

the power converter operates as a capacitor and transmits effective power from the a.c. system to the d.c. power source. When the phase difference angle .phi. is positive as apparent from the above equations (1) and (2) even in the case where the above equation (3) is satisfied, the power converter operates as a capacitor and transmits the effective power from the d.c. power source to the a.c. system.

When it is assumed that the voltage on the d.c. side of the power converter, i.e., the voltage of the d.c. power source is V.sub.dc, the modulation factor in the PWM Control of the power converter is M.sub.f (0.ltoreq.M.sub.f 1), and k is a constant, the voltage V.sub.in on the a.c. side of the power converter is expressed as follows:

Substitution of the equation (4) into the equations (1) and (2) respectively gives:

As is apparent from the above equations (5) and (6), by controlling the modulation factor M.sub.f and/or the phase difference angle .phi. by the power converter, the effective power P and the reactive power Q can be adjusted.

Meanwhile, the three phases are not necessarily balanced with each other in an ordinary a.c. system voltage. There are many instances where three phases are imbalanced, for example, in a form such that amplitudes are different from each other in the respective R, S and T phases. Even in the case where the a.c. system voltage is imbalanced as stated above, the above-described power converter can interchange the effective and reactive powers between the a.c. system and the d.c. power source. However, because the three phases of the a.c. system voltage are imbalanced, the effective and reactive powers with three phases being as a lump under conditions where amplitudes of the output a.c. voltage are different from each other in the three phases take predetermined values, respectively. In this case, when the degree of imbalance becomes large, the output current of the converter of a specified phase will increase and therefore current over an allowed current will flow in controllable rectifier elements at the specified phase. As a result, it becomes impossible to continue the operation of the converter.

In addition to the above-described inconvenience, there is another inconvenience described below. Since there essentially exists unevenness in the characteristics of respective controllable rectifier elements even if the energization periods of respective controllable rectifier elements of the converter are determined, energization is not necessarily conducted as required by a designated energization period, so that there may be produced unevennesses between energization periods of respective controllable rectifier elements. Such unevennesses between energization periods of respective controllable rectifier elements causes the current on the a.c. side of the converter to produce d.c. components. The d.c. components mentioned above cause d.c. polarized magnetization in the interconnecting transformer ordinarily provided between the converter and the a.c. system, thus allowing the interconnecting transformer to over-heat, or otherwise extremely distorting an output current of the converter. When the occasion demands, there may occur a circumstance where a large peak current based on strain exceeds an allowed current value of the controllable rectifier element. Such circumstances make the operation of the converter impossible.

Therefore, an object of this invention is to provide an apparatus for controlling a power converter interposed between the d.c. power source and the a.c. system to interchange power therebetween, which is capable of eliminating the above-described overcurrent or d.c. polarized magnetization based on imbalance of the a.c. system voltage or unevenness between element characteristics.

In accordance with this invention, there is provided an apparatus for controlling a power converter comprising synchronous detector means for detecting a phase of an a.c. system voltage to output it as a synchronizing signal, output voltage phase signal generator means for determining a phase of an output a.c. voltage from a phase difference angle adjustment signal for determination of a phase difference between the a.c. system voltage and the output a.c. voltage and the synchronizing signal from the synchronous detector means to output it as an output voltage phase signal, phase voltage amplitude signal generator means for obtaining a voltage amplitude adjustment signal for determining an amplitude per phase of the output a.c. voltage to switch voltage amplitude adjustment signals of at least two phases in accordance with an output voltage phase signal for the output voltage phase signal generator circuit to output a signal obtained by switching as a phase voltage amplitude signal, and firing signal generator means for determining energization periods of respective controllable rectifier elements constituting the power converter from the voltage phase signal on the basis of the output voltage phase signal generator circuit and the phase voltage amplitude signal from the phase voltage amplitude signal generator circuit.

In the accompanying drawings:

FIG. 1 is a block diagram showing an embodiment of an apparatus for controlling a power converter according to this invention;

FIG. 2 is a connection diagram showing the detailed construction of the converter shown in FIG. 1;

FIG. 3 is a block diagram showing the detailed construction of the power control unit shown in FIG. 1;

FIG. 4 is a flow chart for explaining the function of the microcomputer shown in FIG. 3;

FIG. 5 is a time chart for explaining the function of the control apparatus shown in FIG. 1;

FIG. 6 is a block diagram showing the detailed construction of the voltage phase signal generator circuit shown in FIG. 1;

FIG. 7 is a flow chart for explaining the function of the phase voltage amplitude signal generator circuit shown in FIG. 1; and

FIG. 8 is a connection diagram showing the detailed construction of the triangular wave generator circuit shown in FIG. 1.

In FIG. 1, a voltage controlled type inverter 11 generally used for system interconnection as a power converter controlled by a control apparatus according to this invention is shown. An inverter main circuit 10 is constituted by the inverter 11 and d.c. capacitor 12 connected on the d.c. input side thereof. A d.c. power source 20 is interconnected with an a.c. system 50 through the inverter main circuit 10, an interconnecting reactor 30 and an interconnecting transformer 40.

FIG. 2 shows the circuit construction of the voltage controlled inverter 11 constituting the inverter main circuit 10. This circuit arrangement is provided with a pair of positive and negative d.c. terminals PT and NT, and three-phase a.c. terminals R, S and T. The inverter 11 is composed of six controllable rectifier elements GU, GV, GW, GX, GY and GZ which are three-phase bridge connected, and six free-wheeling diodes DU, DV, DW, DX, DY and DZ connected in inverse-parallel with these controllable rectifier elements, respectively. Such controllable rectifier elements GU to GZ are each comprised of an element of the self-quenching type, such as, for example, a gate turn off thyristor (GTO).

The interchange of power in the system construction of FIG. 1 is controlled by the inverter 11. For controlling such interchange of power, the voltage of the a.c. system 50, i.e., system voltage V.sub.sy is detected by a potential transformer (which will be referred to as "PT" hereinafter) 61, the voltage of the d.c. power source 20, i.e., d.c. voltage V.sub.dc is detected by a d.c. voltage detector (which will be referred to as "VD" hereinafter) 62, and output a.c. currents I.sub.r, I.sub.s and I.sub.t of respective phases of the inverter 11 are detected by a current transformer (which will be referred to as a "CT" hereinafter) 63.

In order to form a control signal for adjusting an effective power P and a reactive power Q flowing into the a.c. system 50, a power control unit 8 is provided. The power control unit 8 calculates the modulation factor M.sub.f for voltage adjustment, and the phase difference angle .phi. in accordance with the above equations (5) and (6) for the purpose of allowing the inverter 11 to interchange predetermined effective and reactive powers P and Q on the basis of the system voltage V.sub.sy (phase voltages V.sub.r, V.sub.s, V.sub.t) and the d.c. voltage V.sub.dc respectively detected by pT 61 and VD 62. Furthermore, the power control unit 8 calculates correction modulation factor signals M.sub.r, M.sub.s and M.sub.t of respective phases for adjusting the output voltage amplitudes of respective phases on the basis of respective phase alternating currents I.sub.r, I.sub.s and I.sub.t detected by the CT 63 or respective phase voltages V.sub.r, V.sub.s and V.sub.t of the system. Thus, the power control unit 8 sends the respective values obtained by calculation to the firing control unit 100.

For example, for the purpose of suppressing d.c. polarized magnetization of the interconnecting transformer 40, d.c. components included in the alternating currents I.sub.r, I.sub.s and I.sub.t of respective phases are detected, whereby correction modulation factor signals M.sub.r, M.sub.s and M.sub.t are determined so as to suppress such d.c. components. In this case, alternating currents I.sub.r, I.sub.s and I.sub.t are respectively integrated per cycle of the a.c. voltage to assume these three integrated values as correction modulation factor signals M.sub.r, M.sub.s and M.sub.t, respectively. In the case of using a single three-phase transformer in place of three single-phase transformers as the interconnecting transformer, because the relationship of I.sub.r +I.sub.s +I.sub.t =0 holds, one of three correction modulation factor signals may be set to a fixed value.

Furthermore, in order to balance output currents of the inverter under the condition where the three-phase voltages V.sub.r, V.sub.s and V.sub.t of the system are unbalanced, it is sufficient to output differences between the system voltage V.sub.sy and respective phase voltages V.sub.r, V.sub.s and V.sub.t as correction modulation factor signals M.sub.r, M.sub.s and M.sub.t, respectively.

The arrangement of the power control unit 8 will be detailed with reference to FIG. 3. For A/D converting the alternating currents I.sub.r, I.sub.s, I.sub.t, it provides the current/voltage converters 81.sub.r, 81.sub.s, 81.sub.t, the voltage/frequency converters 82.sub.r, 82.sub.s 82.sub.t and the counters 83.sub.r, 83.sub.s, 83.sub.t respectively for the phases. For obtaining the digital values of the effective and reactive powers P and Q, it provides an effective and reactive powers detector 84 and A/D converters 85.sub.p, 85.sub.q. The power control unit 8 also provides a phase detector circuit 86, an A/D converter 87 and a microcomputer 88.

The phase alternating currents I.sub.r, I.sub.s, I.sub.t are respectively converted into voltage signals in the current/voltage converts 81.sub.r, 81.sub.s, 81.sub.t and then are converted into pulse signals in the voltage/frequency converters 82.sub.r, 82.sub.s, 82.sub.t. These pulse signals are respectively sent to the counters 83.sub.r, 83.sub.s, 83.sub.t. The microcomputer 88 reads output signals I.sub.rd, I.sub.sd, I.sub.td from the counters 83.sub.r, 83.sub.s, 83.sub.t. It performs a read each time it receives a group of six 60.degree. phase voltage signals .theta..sub.synl. The phase voltage is detected in the phase detector 86 from the phase voltages V.sub.r, V.sub.s, V.sub.t.

A phase locked loop disclosed in U.S. Pat. No. 4,307,346 may be used as the phase detector 86. For example, the signal .theta..sub.syn2 is a 12-bit signal for detecting a phase angle of the phase voltage. In this case, 6.times.29.sup.9 counts of the phase detector 86 may correspond to 360 electrical degrees.

One bit of the signal .theta..sub.syn2 of the twelve bits can be used as a signal .theta.synl. In such a case, if a signal which repeats "0" and "1" every 30 electrical degrees is used as an interrupt signal for a microcomputer, a variation of the signal can be detected by the microcomputer. (A circuit with the constructed the same as the synchronous detector circuit 110 shown in FIG. 1 can be used as the phase detector 86, as will be mentioned later.)

The phase detector 86 constantly supplies a system voltage phase signal .theta..sub.syn2 to the microcomputer 88. The effective and reactive powers detector 84 serves to compute an effective and reactive powers based on the phase alternating currents I.sub.r, I.sub.s, I.sub.t and the phase voltages V.sub.r, V.sub.s, V.sub.t and supply them as the effective and reactive powers P and Q.

The power detection circuit 84 calculates the effective and reactive powers P and Q according to the following equations; ##EQU1##

These powers P and Q are converted into digital signals P.sub.d and Q.sub.d in the A/D converters 85.sub.p and 85.sub.q and the resulting digital signals are entered into the microcomputer 88. The d.c. voltage V.sub.dc is converted into a digital signal in the A/D converter 87 and then the resulting digital signal is entered into the microcomputer 88.

FIG. 4 is a flowchart illustrating how the microcomputer 88 operates. The routine shown in this flowchart is executed each time the microcomputer 86 receives as an interrupt signal the signal .theta..sub.synl, sent from the phase detector 86. In response to the signal .theta..sub.synl, the microcomputer 86 checks if it is the sixth signal (step S41) and, if it is, reads the currents I.sub.rd, I.sub.sd, I.sub.td (step S42). With this process, it reads the currents I.sub.rd, I.sub.sd, I.sub.td at each one cycle of systematic voltages (6.times.60.degree.=360.degree.). If a mean value of the currents I.sub.rd, I.sub.sd, I.sub.td within one cycle is zero, these currents I.sub.rd, I.sub.sd, I.sub.td are respectively made to be a predetermined value I.sub.ref. If it is non-zero, these Currents are made to another value.

The current components are calculated as follows (step S43): ##EQU2## As is apparent from the equations, the current components are differences between positive components and negative ones of I.sub.rd, I.sub.sd, I.sub.td, that is, the d.c. components of the currents I.sub.rd, I.sub.sd, I.sub.td. For suppressing the biased magnetic field of the d.c. currents, it is necessary to control an amplitude of an output voltage of the inverter main circuit 10 in a manner to make all the current components I.sub.rdl, I.sub.sdl, I.sub.tdl zero. For the control, the microcomputer 86 calculates modulation factors M.sub.r, M.sub.s, M.sub.t at each phase by multiplying the current components I.sub.rdl, I.sub.sdl, I.sub.tdl with a gain K (step S44). Then, it reads an effective power signal P.sub.d, a reactive power signal Q.sub.d and a d.c. voltage V.sub.dcd through the A/D converters 85.sub.p, 85.sub.q, 87 (St.RTM.p S45). Then, it calculates the modulation factor M.sub.f and a phase difference angle .phi. based on the equations (5) and (6) (step S47). Then, it reads a phase signal .theta..sub.syn2 from the phase detector 86 (step S47) and calculates an equation of .phi..sub.c =.phi.+.theta..sub.syn2 (step S48). At a final stage, it supplies the modulation factors M.sub.f, M.sub.r, M.sub.s, M.sub.t to a phase voltage amplitude signal generator circuit 140 and the phase difference angle .phi..sub.s to a voltage phase signal generator circuit 120 (step S49).

As shown in FIG. 1, the firing control unit 100 is provided with a synchronous detector circuit 110, a voltage phase signal generator circuit 120, a firing signal generator circuit 130, and a circuit 140 for producing a voltage amplitude signal per each phase (hereinafter simply referred to as a phase voltage amplitude signal generator circuit 140). The firing signal generator circuit 130 is comprised of a triangular wave generator circuit 131, a firing timing determination circuit 132, and a firing phase determination circuit 133. The triangular wave generator circuit 131 is a circuit to generate triangular wave signals TRI with 60 degrees being its period as shown in FIG. 5. The energization periods of respective controllable rectifier elements GU, GV, GW, GX, GY, and GZ are determined with the triangular wave signal TRI being as a reference. The synchronous detector circuit 110 obtains a system voltage V.sub.sy from PT 61 to detect the phase of the system voltage, thus to output a system phase signal SCLK. A phase locked loop circuit such as disclosed in U.S. Pat. No. 4,307,346 may be used as the synchronous detector circuit 110. The voltage phase signal generator circuit 120 receives a phase difference angle signal .phi..sub.c from the power control unit 8 to send, to the firing signal generator circuit 130, an output voltage phase signal .theta. comprised of a digital signal such that a phase difference angle between the output voltage of the inverter 11 and the voltage of the a.c. system 50 becomes equal to .phi. every time it receives the system phase signal SCLK from the synchronous generator circuit 110. The output voltage phase signal .theta. consists of a phase-judgment phase signal .theta..sub.h indicating a period of 360 degrees every 60 degrees with the R-phase output voltage being used as a reference, and a 60.degree. period phase signal .theta..sub.j repeating from zero count to a predetermined count value every period of 60 degrees. This 60.degree. period phase signal .theta..sub.j may be prepared by a binary counter circuit (not shown). In this case, when, e.g., an 11-bit binary counter circuit is used, the predetermined count value mentioned above becomes equal to 2.sup.11 -1=2047 counts. In this example, the predetermined count value is set to 2047. The phase judgment phase signal .theta..sub.h may be prepared by a hexanary counter circuit repeating from 0 up to 5, and is assumed to have a relationship of Table 1 shown below between the phase-judgment phase signal .theta..sub.h and the phase .alpha. of the inverter R-phase output voltage.

The output voltage phase signal .theta. consists of a phase-judgment phase signal .theta..sub.h and 60.degree. period phase signal .theta..sub.j, and is in such a form to express the phase .alpha. of the R-phase output voltage of the inverter as a digital signal.

FIG. 6 is a circuit diagram showing the voltage phase signal generator circuit 120. The circuit 120 consists of a hexa counter 121 and a binary counter 122. The upper three bit signals of the phase difference angle signal .phi. are supplied to the hexa counter 121 and the lower eleven bit signals of the phase difference angle signal .phi. are supplied to the binary counter 122 when the signal .phi. is changed. The binary counter 12 counts the changed signal .phi. at each time of inputting a signal SCLK is input. One carry of the binary counter 122 serves to count up the hexa counter 122. With the action, the hexa counter 121 supplies an upper three-bit signal .theta..sub.h of the output voltage phase signal .theta. and the binary counter 121 supplies a lower eleven-bit signal .theta..sub.j of the signal .theta. is a 14-bit signal composed of the bit signals .theta..sub.h and .theta..sub.j. The bit signal .theta..sub.h consists of numerical signals of "0" to "5" and is supplied to the phase voltage amplitude signal generator circuit 140. The bit signal .theta..sub.j is supplied to the triangular wave generator circuit 131. The signal .theta. is supplied to the firing phase determination circuit 133.

The phase voltage amplitude signal generator circuit 140 inputs a phase-judgment phase signal .theta..sub.h from the voltage phase signal generator circuit 120 to output a voltage amplitude signal per phase denoted by M.sub.p (hereinafter simply referred to as a phase voltage amplitude signal M.sub.p) to the firing signal generator circuit 130 at the time when the phase-judgment phase signal .theta..sub.h changes. The relationship between the phase voltage amplitude signal M.sub.p output from the phase voltage signal generator circuit 140 at the time when the phase-judgment phase signal .theta..sub.h varies and the phase-judgment

The phase voltage amplitude signal M.sub.p maintains the value when the phase-judgment phase signal .theta..sub.h changes last as long as the phase-judgment phase signal .theta..sub.h does not change. The phase voltage amplitude signal M.sub.p is varied as shown in Table 3 every 60 degrees of the phase of the R-phase output voltage of the inverter.

The circuit 140 consists of a microcomputer. The operation of the circuit 140 will be described with reference to a flowchart shown in FIG. 7.

The circuit 140 receives the .theta..sub.h signal from the voltage phase signal generator circuit 120 (step S71) and checks if the .theta..sub.h signal value is changed (step S72). If it is changed, the circuit 140 calculates the phase voltage amplitude signal M.sub.p on the foregoing Table 2 (or Table 4 to be described later) (step S73) and supplies it (step S74). Next, it reads the signals M.sub.f, M.sub.r, M.sub.s, M.sub.t sent from the power control unit 8 (step S75). Then, returning to the operation of receiving the .theta..sub.h signal (step S71), the circuit 140 repeats the foregoing process.

The triangular wave generator circuit 131 within the firing signal generator circuit 130 inputs a 60.degree. period phase signal .theta..sub.j from the voltage phase signal generator circuit 120 to output a triangular wave signal TRI to the firing timing determination circuit 132. For the triangular wave signal TRI, triangular waves each corresponding to an isosceles triangle with the phase angle of 30 degrees of the 60.degree. period as a center are repeatedly output every 60.degree. periods of the R-phase output voltage of the inverter 11, i.e., at periods of 60.degree., as shown in FIG. 5. Namely, from the time of 0 counts of the 60.degree. period phase signal .theta..sub.j up to the time of 1023 counts thereof, the triangular wave signal TRI has a positive gradient corresponding to those count values, and from the time of 1023 counts of the 60.degree. period phase signal .theta..sub.j up to the time of 2047 counts thereof, the triangular wave signal TRI has a negative gradient corresponding to from 1023 down to 0 counts.

FIG. 8 illustrates a circuit implementation realizing the triangular wave generator circuit 131. As shown, a 60.degree. period phase signal .theta..sub.j consists of eleven bit signals .theta..sub.j0, .theta..sub.j1, .theta..sub.j2, .theta..sub.j3, .theta..sub.j4, .theta..sub.j5, .theta..sub.j6, .theta..sub.j7, .theta..sub.j8, .theta..sub.j9, and .theta..sub.j10 and the triangular wave TRI consists of ten bit signals TRI.sub.0, TRI.sub.1, TRI.sub.2, TRI.sub.3, TRI.sub.4, TRI.sub.5, TRI.sub.6, TRI.sub.7, TRI.sub.8, TRI.sub.9. In the 60.degree. period phase signal .theta..sub.j consisting of eleven bit signals, .theta..sub.j0 denotes the least significant bit signal and .theta..sub.j10 denotes the most significant bit signal. The triangular wave generator circuit 131 serves to respectively exclusive-OR the ten bit signals .theta..sub.j0 to .theta..sub.j9 with .theta..sub.j10 and supplies ten bit signals of the triangular wave TRI. Since the bit signals .theta..sub.j10 have an alternative value of "0" or "1" at each 30.degree. phase, the triangular wave TRI becomes an isosceles triangle with the phase angle of 30 degrees of the 60.degree. periods as a center.

The firing timing determination circuit 132 determines the timing for controlling the energization periods of respective controllable rectifier elements of the inverter 11 on the basis of the phase voltage amplitude signal M.sub.p from the phase voltage signal generator circuit 140 and the triangular wave signal TRI from the triangular wave generator circuit 131 in accordance with the time sequence shown in FIG. 5. A method of generating timing signals for determining energization periods of the controllable rectifier elements GY and GV and the controllable rectifier elements GU and GX of the inverter 11 carried out when the R-phase output voltage phase .alpha. of the inverter 11 is at time periods of 0.degree. C..ltoreq..alpha.<60.degree. C. and 60.degree. C..ltoreq..alpha.<120.degree. C., i.e., the phase-judgment phase signal .theta..sub.h represents "0" and "1" will be described with reference to FIG. 5.

When the inverter R-phase output voltage phase .alpha. of FIG. 5 is at a time period of 0.degree. C..ltoreq..alpha.<60.degree. C., i.e., the phase-judgment phase signal .theta..sub.h represents "0", as is apparent from Table 3, signal M.sub.y is output as the phase voltage amplitude signal M.sub.p. The signal M.sub.y and the triangular wave signal TRI are compared with each other to output a signal TIM indicating the times a.sub.1 and a.sub.2 at which both signals are equal to each other. The firing-phase determination circuit 133 determines the energization periods on the basis of the signal TIM obtained from the firing timing determination circuit 132 at the times of a.sub.1 and a.sub.2 and the output voltage phase signal .theta. from the voltage phase signal generator circuit 120 so that the controllable rectifier elements GU and GW are energized and the controllable rectifier elements GX and GZ are not energized because controllable rectifier elements except for the controllable rectifier elements GV and GY of controllable rectifier elements of the inverter 11 are such that phase-judgment signal .theta..sub.h of the digital phase signal .theta. represents "0".

When the inverter R-phase output voltage phase .alpha. is at a time period of 60.degree. C..ltoreq..alpha.<120.degree. C., as is apparent from Table 3, signal M.sub.u is output as the phase voltage amplitude signal M.sub.p. The signal M.sub.u and the triangular wave signal TRI are compared with each other to output a signal TIM indicating the times b.sub.1 and b.sub.2 at which both signals are equal to each other to the firing-phase determination circuit 133. The firing-phase determination circuit 133 determines, as shown in Table 3, energization periods except for the controllable rectifier elements GU and GX of controllable rectifier elements of the inverter 11 on the basis of the signal TIM obtained from the firing timing determination circuit 132 at the times of b.sub.1 and b.sub.2 and the output voltage phase signal .theta. from the voltage phase signal generator circuit 120. The firing-phase determination circuit 133 determines respective energization periods so that the controllable rectifier elements GV and GW are not energized and the controllable rectifier elements GY and GZ are energized because controllable rectifier elements except for the controllable rectifier elements GV and GY of controllable rectifier elements of the inverter 11 are such that the phase-judgment phase signal .theta..sub.h of the output voltage phase signal .theta. represents "1".

Also when the inverter R-phase output voltage phase .alpha. is at respective 60.degree. periods except for 0.degree. C..ltoreq..alpha.<60.degree. C. or 60.degree. C..ltoreq..alpha.<120.degree. C., the phase voltage amplitude signal M.sub.p of Table 3 takes respective values of M.sub.z, M.sub.v, M.sub.x and M.sub.w in dependence upon the phase-judgment phase signal .theta..sub.h. Thus, energization periods of respective controllable rectifier elements of the inverter 11 are determined.

The firing timing determination circuit 132 serves to compare the triangular wave signal TRI with the phase voltage amplitude signal M.sub.p and supplies the signal TIM as shown in FIG. 5 when the triangular wave signal TRI is equal to or more than the phase voltage amplitude signal M.sub.p. This circuit is implemented by digital comparator LSIs such as TI 74LS85 or TI 74LS682 (manufactured by Texas Instruments).

The firing-phase determination circuit 133 serves to define energization periods of the element of the inverter 11 as shown in FIG. 5 from the phase-judgment phase signal .theta..sub.h and the signal TIM on the basis of the Table 3. This circuit is implemented by a ROM (read-only memory) consisting of a memory IC and is designed to input the phase-judgment phase signal .theta..sub.h and the signal TIM to the ROM addresses and outputting the data written on the Table 3 as the energization periods of the elements of the inverter 11. The ROM may employ TI TBP28S42.

The difference between the control system of this invention and the conventional PWM control system resides in that the modulation factor M corresponding to the phase voltage amplitude signal M.sub.p of FIG. 5 is altered independent of the phase of the output voltage of the inverter 11 in the latter system. In this invention, by changing the phase voltage amplitude signal M.sub.p so that it becomes equal to signals M.sub.y, M.sub.u, M.sub.z, M.sub.v, M.sub.x and M.sub.w every phase angle of 60.degree. of the inverter R-phase output voltage, it is possible to control the amplitudes of the phase output voltages of the inverter 11 in regard to respective phases every positive or negative side thereof. The controlled phase-voltages of the output voltages of the inverter 11, are also described together in Table 3.

As described above, the control apparatus of FIG. 1 can control the amplitudes of the respective phase output voltages of the inverter 11 with regard to respective phases every positive or negative side of the amplitudes. Thus, even in the case where there is unevenness in the characteristics of the respective controllable rectifier elements of the inverter 11, this control apparatus can eliminate d.c. components produced in the output voltage energy respective phase. Accordingly, this makes it possible to allow currents flowing in respective controllable rectifier elements to be balanced to prevent d.c. polarized magnetization of the inter-connecting transformer 40, resulting in stable operation of the inverter 11.

In the above-described embodiment, changes in the phase voltage amplitude signal M.sub.p based on changes in the phase-judgment phase signal .theta..sub.h are determined in accordance with Table 2. However, such a determination may be conducted as shown in Table 4.

In this case, the inverter output voltage will be controlled per each phase. The relationship between the phase-voltage controlled and the phase voltage amplitude signal M.sub.p of the output voltage of the inverter 11 is as shown in the Table 5.

By effecting control in this way, even in the case where the voltage of the a.c. system 50 is imbalanced per phase, it is possible to individually control the output voltage of the inverter 11 per phase. Accordingly, control such that an output current of a specified phase of the inverter 11 is not caused to flow above an allowed current value of the element is conducted, thereby making it possible to stably operate the inverter 11.

In the apparatus of FIG. 1, a scheme is employed to output the modulation factor signal M.sub.f, and correction modulation factor signals M.sub.r, M.sub.s, and M.sub.t per phase from the power control unit 8 to the phase voltage amplitude signal generator circuit 140. In addition, a scheme may be employed to output the phase voltage amplitude signals M.sub.y, M.sub.u, M.sub.z, M.sub.v, M.sub.x and M.sub.w of Table 3 or the phase voltage amplitude signals M.sub.r1, M.sub.s1 and M.sub.t1 of Table 5 which are varied by the phase-judgment phase signal .theta..sub.h from the power control apparatus 8 to the phase voltage amplitude signal generator circuit 140. In this case, the phase voltage amplitude signal generator circuit 140 outputs, by the phase-judgment phase signal .theta..sub.h, these phase voltage amplitude signals M.sub.y, M.sub.u, M.sub.z, M.sub.v, M.sub.x and M.sub.w or the phase voltage amplitude signals M.sub.r1, M.sub.s1 and M.sub.t1, to the firing signal generator circuit 130.

As described above, the apparatus for controlling a power converter according to this invention is constructed to obtain a voltage amplitude adjustment signal for determining the voltage amplitudes per each phase of an a.c. voltage generated in the power converter to switch voltage amplitude adjustment signals every respective phase in accordance with an output voltage phase signal from the output voltage phase signal generator circuit to produce a phase voltage amplitude signal to determine energization periods of respective controllable rectifier elements constituting the power converter from the phase voltage amplitude signal and the output voltage phase signal, to thereby control the output voltage of the power converter per phase. Accordingly, this apparatus can correct imbalance between respective phases of the output alternative currents of the power converter, or suppress d.c. components included in output currents of respective phases.