Brief Description of the Drawings
The aforementioned objects and advantages of the present invention, as well as additional objects and advantages thereof, will be more fully understood hereinafter as a result of a detailed description of a preferred embodiment of the invention when taken in conjunction with the following drawings in which:
FIG. 1 is a schematic representation of the electrode configuration used in the present invention for nondestructive sensing of a charge packet and includes an electron potential graphical illustrations (a) to (d) showing the electron potential distribution in a fourphase embodiment;
FIG. 2 is a schematic representation of the standard fill and spill procedure including electron potential graphical illustrations (a) and (b);
FIG. 3 is a schematic representation of the fill and spill procedure in a multiplication circuit implementation according to the present invention including electron potential graphical illustrations (a) and (b); and
FIG. 4 is a schematic representation of the entire non-destructive charge domain multiplier which includes elements of FIGS. 1 and 3.
Detailed Description of a Preferred Embodiment
Referring first to FIG. 1 herein, it will be understood that the illustrated charge domain device constitutes a four phase charge coupled device in which charge passes from left to right by sequentially pulsing electrodes .phi..sub.1, .phi..sub.2, .phi..sub.3 and .phi..sub.4 with the proper timing and phase as is generally well-known in the CCD art. It will also be understood that the present invention is not limited to four-phase CCD operation. In fact, the invention can be implemented in any CCD configuration. As illustrated in FIG. 1, there is a floating electrode between the electrodes .phi..sub.2 and .phi..sub.4. This floating electrode is labelled "S" and is common to all the accompanying figures. In the CCD structure of FIG. 1, the floating electrode S senses the charge Q passing underneath it and the potential or voltage of the floating electrode gate changes proportionally to the size of the charge packet beneath it. This potential change also appears on the "fill and spill" portion of the CCD structure, shown in FIGS. 2 and 3, where it modifies the height of a potential barrier.
Thus the height of the barrier beneath floating electrode S in the "fill and spill" circuits is proportional to the charge Q sensed by the left portion of electrode S and constitutes a charge sensing process which is accomplished non-destructively, that is, without dissipating the charge.
The initial step of the procedure is to nondestructively sense the charge packet moving in a standard CCD structure. The sensing circuit consists of a normal CCD (FIG. 1) with a special electrode substituted for .phi..sub.3. This special electrode, denoted S, acts as a DC gate--i.e., it is not clocked like the rest of the .phi..sub.1, .phi..sub.3, .phi..sub.3 and .phi..sub.4 CCD phases. The S electrode is connected to a reference voltage (Vref) through a switch which is used to precharge the electrode during phase 1. (Phase 1 is used in a timing sense here--it refers to the time at which the charge Q is beneath the .phi..sub.1 electrode.) The S electrode is charged to a voltage (Vref) that is roughly in the middle of the high and low clock phase voltages, as shown in the Phase graph of FIG. 1(a). During phase 2, the charge is moved from underneath the .phi..sub.1 electrode to the .phi..sub.2 electrode and stopped from continuing by the mid-range voltage of the S electrode (FIG. 1(b). Going from phase 2 to phase 3 (of the timing), the potential on the .phi..sub.2 electrode is lowered, transferring the charge Q underneath the S electrode, shown in FIG. 1(c). The low potential on the .phi..sub.4 electrode prevents the charge from continuing past the S electrode. The charge packet Q induces a voltage change in the S electrode, proportional to the size of the charge packet according to the well known equation:
During phase 4 of the timing, the .phi..sub.4 electrode is pulsed high, creating a deep well and causing the charge packet to move from underneath the S electrode to the .phi..sub.4 electrode. The cycle then repeats, with the S electrode being reset to Vref and a new charge packet coming from the left. The entire process is nondestructive--the charge packet is sensed (creating a voltage change on the S electrode) but not dissipated.
The transition from charge domain to voltage domain signals (above) has a symmetrical counterpart for transforming voltages into charge packets. The essential characteristics are shown in FIG. 2. The circuit consists of a weakly doped n diffused region which is connected to an AC current source (I.sub.ac), a signal gate labelled "S", and a DC metering gate. The signal gate voltage "S" controls the size of the charge packet to be created. The operation begins wtih the fill phase where I.sub.ac is pulsed to allow voltage to cause electrons to flow into the diffused region and fill underneath the gates, shown in FIG. 2(a). During the next phase (the spill phase) the current is reversed, drawing electrons out of the diffusion, causing part of the charge to become trapped under the metering gate through potential equilibration. Note that the height of the spill barrier is determined by the voltage of the signal gate "S". Thus the charge packet under the meter gate is proportional to the S electrode voltage. (Higher signal voltage givs a smaller charge packet.)
The above processes are well known and used by CCD designers regularly to sense and create charge packets. The next step, (the multiplication), is however, believed to be entirely new.
The present invention involves a modification of the "fill and spill" circuit shown in FIG. 2. The DC Meter gate of FIG. 2 is replaced by two or more closely spaced electrodes which are controlled by a set of externally applied voltages V.sub.1, ..., V.sub.n where n is the number of meter electrodes. By modifying the potentials on these two or more electrodes, the "width" of the potential well created by the sensed charge, is modulated as indicated by the shaded area beneath the (V.sub.1, ..., V.sub.n) electrodes. The size of the potential well is the product of the barrier height (which is proportional to the sensed charge) and width (controlled by V.sub.1, ..., V.sub.n). This newly created potential well is proportional in size to the desired product and is filled with charge via a diffusion connected to I.sub.AC. The filling procedure is an application of a the well-known "Fill and Spill" technique. Thus, combining the non-destructive sense circuit and the multiple metering gate circuit provides a circuit, shown in FIG. 4, in which a new charge packet is created which is proportional in size to the product of a non-destructively sensed charge packet and an externally applied voltage.
The actual voltage applied to each of the potential well "width" control electrodes and, for that matter, the number of such electrodes may vary. The greater the number of such electrodes, the greater is the degree of "width" control.
In the "Fill and Spill" technique shown in its most basic form in FIG. 2, the signal voltage "S" controls the height of the potential barrier. The size of the created charge packet is proportional to the area beneath the meter gate, bounded by the height of the potential barrier and the width of the meter electrode. Ideally the width should be modulated to achieve multiplication so that the area (i.e. the size of the created charge packet) can be controlled in both dimensions.
An easy way to achieve width modification is by breaking the meter gate into a number (greater than or equal to two) of smaller gates, shown in FIG. 3. Since buried channel CCD's run beneath the surface of the silicon away from the gates, the potential is not what is typically drawn in schematics (as in FIGS. 1 and 2) but actually a continuously varying spatial function. The smaller the gates, the more pronounced the deviation from typical schematics. Thus by breaking the meter gate into a plurality of smaller gates, the potential profile beneath the electrodes becomes programmably nonlinear.
The potential profile can be tailored to provide a deterministic nonlinearity to the "Fill and Spill" procedure. By providing the proper signals at the meter control gates, a potential profile can be built, shown in FIG. 3, that approximates a variable width well. The control voltages used for the meter gates are generated externally with a circuit (not shown) that implements mapping from a logical multiplicand to physical voltages.
The approximation to a variable width well is compensated for by a single external mapping circuit, easily realized with conventional circuitry.
In order to obtain a non1estructive multiplier, the voltage sensed by the nondestructive sense circuit (FIG. 1) is used as the signal voltage in the "Fill and Spill" circuit modified for multiple gate metering (FIG. 3) creating the circuit of FIG. 4. The necessity of external signal generation (for the metering gates) makes the circuit especially practical for large parallel systems in which many multipliers need the same value (such as neural networks).
It will now be understood that what has been disclosed herein comprises a circuit and method to implement a nondestructive charge domain multiplier. The invention lies in the use of multiple metering gates which create a spatially varying potential along the channel which effectively controls the width (or length) of the "Fill and Spill" charge region. The height is controlled by the voltage change on a sense electrode (S), thus resulting in a charge packet proportional to the product of the sense charge packet and an externally generated value.
Those having skill in the art to which the present invention pertains will now, as a result of the applicants' teaching herein, perceive various modifications and additions that may be made to the invention. By way of example, the precise number of metering gates and the voltage characteristics applied thereto to control the multiplicative well width and shape may be readily varied in accordance with the desired application. Furthermore, the voltages applied to the disclosed plurality of metering gates may be in a modified binary format. Accordingly, all such modifications and additions are deemed to be with the scope of the invention which is to be limited only by the claims appended hereto.