Current-Free Synthesis of Improved Parameter-Free Zero-Impedance Converter

This invention relates to circuits and systems and more particularly to electric motor drive systems and switch mode power converters using a current-free and improved parameter-free zero-impedance converter to provide for an infinite disturbance rejection ratio and zero order dynamics in the former case and a load independence in the latter case without sensing and processing a current through the impedance of interest and without knowledge about resistive and reactive values of the impedance of interest including parameters of the plant under the control.

In the circuit and system theory and in practice it is of interest to minimize an impedance of interest. Further in order to achieve mathematically complete, and thus ideal, load independent operation, it can be shown that an impedance of interest should be forced to zero. All known techniques produce less or more successful minimization of the impedance of interest, usually in proportion to their complexity. None of the presently known techniques produces a zero impedance, except synthesis methods described in copending and coassigned applications by these two same inventors Lj. Dj. Varga and N. A. Losic, "Synthesis of Zero-Impedance Converter", Ser. Nr. 07/452,000, December 1989, N. A. Losic and Lj. Dj. Varga, "Synthesis of Improved Zero-Impedance Converter", Ser. Nr. 07/457,158, December 1989, allowed for Issuance June 1990, N. A. Losic and Lj. Dj. Varga, "Parameter-Free Synthesis of Zero-Impedance Converter", Ser. Nr. 07/484,494, February 1990, and N. A. Losic and Lj. Dj. Varga, "Current-Free Synthesis of Parameter-Free Zero-Impedance Converter", Ser. Nr. 07/503,229, April 1990. A specific and particular applications of a zero-impedance converter, in addition to those in the applications above, are described in the U.S. Pat. No. 4,885,674 "Synthesis of Load-Independent Switch-Mode Power Converters" by Lj. Dj. Varga and N. A. Losic, December 1989, as well as in two copending and coassigned applications of N. A. Losic and Lj. Dj. Varga, "Synthesis of Load-Independent DC Drive System", Ser. Nr. 07/323,630, November 1988, and "Synthesis of Load-Independent AC Drive Systems", Ser. Nr. 07/316,664, February 1989, allowed for Issuance December 1989.

Another advantage due to the use of the zero-impedance converter, seen in creating possibility to reduce order of an electric motor drive system to zero by implementing appropriate (feed) forward algorithms in addition to realizing the zero-impedance converter to produce a load independent operation, is explored and described in a copending application Ser. No. 07/468,122 by N. A. Losic and Lj. Dj. Varga "Synthesis of Drive Systems of Infinite Disturbance Rejection Ratio and Zero-Order Dynamics/Instantaneous Response", January 1990. Furthermore, a generalized synthesis method to produce zero order dynamics, i.e., instantaneous response, and infinite disturbance rejection ratio in a general case of control systems of n-th order is described in a copending and coassigned application by Lj. Dj. Varga and N. A. Losic, "Generalized Synthesis of Control Systems of Zero-Order/Instantaneous Response and Infinite Disturbance Rejection Ratio", Ser. Nr. 07/479,275, February 1990.

The zero impedance converter and its particular and specific applications, as described in the patents/patent applications on behalf of these two inventors listed above, except the patent application Ser. No. 07/484,494 and patent application Ser. No. 07/503,229, operate on specific (given) values of resistive and reactive parts of an impedance of interest. In the Application No. 07/484,494, a parameter-free algorithm is based on current and voltage measurements in real time. A current-free synthesis method of a parameter-free zero-impedance converter, whereby no current is measured and processed and no parameters of the impedance of interest are needed to be known, is disclosed in application Ser. No. 07/503,229.

It is therefore an object of the present invention to provide a current-free synthesis method for synthesizing an improved parameter-free zero-impedance converter, which includes elimination of differentiation in cases of inductive impedances (in cases of capacitive impedances an integration rather than a differentiation is used in the synthesis), to produce a current-free and improved parameter-free zero-impedance converter, operating without knowledge about resistive and reactive parts of the impedance of interest and of any other parameters of the plant under the control and without sensing and processing a current through the impedance of interest. Such a synthesized current-free and improved parameter-free zero-impedance converter is used to achieve an infinite disturbance rejection ratio enabling further zero-order synthesis in electric motor drive systems, using any kind of motor, as well as to achieve a load independence in switch mode power converters. These applications are not exclusive; the current-free and improved parameter-free zero-impedance converter can be used in any application which can make use of its properties.

Briefly, for use with switch-mode power converters, the preferred embodiment of the present invention includes a most inner positive voltage feedback loop and an inner negative voltage feedback loop and an outer negative voltage feedback loop wherein the voltage difference between the most inner positive loop and the inner negative loop being fed back effectively compensates for the total voltage acting across the output filter inductor impedance providing for independence of both complex load and output filter parameters as well as of a voltage gain transfer function of a pulse width modulation (PWM) stage used in the switch-mode power converters.

For use with electric motor drive systems, another preferred embodiment of the present invention includes a most inner positive voltage feedback loop and an inner negative voltage feedback loop and an outer negative voltage feedback loop, whereby the two latter loops are velocity loops, so that the total voltage effectively acting across the motor impedance is fed back as a difference between the voltage supplied by the most inner positive loop and the voltage supplied by the inner negative loop thus effectively cancelling the voltage drop across the motor impedance of interest. In addition to providing, in this way, for an infinite disturbance rejection ratio, the scheme described also reduces the order of the system transfer function making it possible to further reduce it to zero by incorporating (feed) forward algorithms to be shown. The same applies to the preferred embodiment of the present invention in the field of switch-mode power converters.

The synthesis method presented in the embodiments provides for operation outside of the switching (PWM) environment as the sensed variables are those which are well behaved and/or well filtered and, further, no differentiation is performed, which provides for a noise- and ripple-free operation, i.e., no current through the impedance of interest is sensed and processed. The algorithms of the synthesis method provide also independence from the impedance parameters and remaining parameters of the plant under the control as well as from a transfer function of the PWM control and power stage thus constituting an ultimate and ideal control in that they provide for the ideal system performance with respect to both load disturbance/change and input command response while, at the same time, continuously adapting themselves in case of the changes of the parameters of the impedance of interest and parameters of the plant under the control and the changes of the transfer function of the PWM control and power stage.

The ability to provide a current-free and improved parameter-free zero-impedance converter, operating in the way described above, is a material advantage of the present invention. Other advantages of the present invention include its ability to be realized in an integrated-circuit form; the provision of such a method which needs not specifying the resistive and reactive parts of the impedance of interest including the remaining parameters of the plant under the control and transfer function of the PWM control and power stage; the provision of such a method which provides zero output-voltage-change-to-load-change transfer function in case of power converters; the provision of such a method which provides zero output-angular-velocity/position-change-to-load-torque-change transfer function as well as constant output-angular-velocity/position-change-to-input-command-change transfer function in case of electric motor drive systems; the provision of such a method which provides constant output-voltage-to-reference-voltage transfer function in case of power converters; and the provision of such a method which simplifies design of negative voltage feedback loop.

The circuit realization of the algorithm of the current-free and improved parameter-free zero-impedance converter reduces to implementing constant-gain circuits and arithmetic (summing) circuits. The circuit realization of the (feed) forward algorithms also reduces to implementing constant-gain circuits.

In case of application to electric motor drive systems, the algorithms are independent of mechanisms of a torque production, these mechanisms being nonlinear in some electric motors, as well as they are independent of a system moment of inertia and of a viscous friction coefficient and of nonlinear effects associated with the dynamical behavior of the drive system within its physical limits. The independence of the system moment of inertia implies infinite robustness of the drive system with respect to this parameter.

These and other objects and advantages of the present invention will no doubt be obvious to those skilled in the art after having read the following detailed description of the preferred embodiments illustrated in the FIGURES of the drawing.

FIG. 1 is a block and schematic diagram of a first embodiment of the invention; and

FIG. 2 is a block diagram of another embodiment of the invention.

A current-free and improved parameter-free zero-impedance converter embodying the principles of the invention applied to synthesizing a load independent power converter and, at the same time, of a constant transfer function from reference voltage to output voltage, is shown in FIG. 1. In FIG. 1, A characterizes transfer function of a PWM control and power stage 112. As it will be shown in the course of analysis of the converter in FIG. 1, the algorithms to be obtained are independent of A. A signal .DELTA.V.sub.c (s) present at point 110 is thus voltage-amplified A times to appear as voltage .DELTA.V(s) on lead 120 with an associated power/current .DELTA.I(s) supplied by a source of electrical energy of a constant voltage V.sub.in (not illustrated) at an input to a power stage within the block 112. Although a dc-to-dc converter has been assumed within block 112, the principles of the embodiment equally apply to other converter types.

In FIG. 1, the current-free and improved parameter-free zero-impedance converter has its input applied by means of lead 107 (assuming a feedforward path denoted with lead 127 disconnected), i.e., a processed error signal .DELTA.V.sub..epsilon.l (s) acts as an input to the zero-impedance converter while its output is the output dc voltage .DELTA.V.sub.o (s) at terminal 121. The remaining portion of the embodiment of FIG. 1 is due to the application of the current-free and improved parameter-free zero-impedance converter in synthesizing a load invariant power converter and of a constant transfer function between a reference voltage .DELTA.V.sub.R (s), applied to terminal 101, and the output voltage .DELTA.V.sub.o (s) at 121.

The current-free and improved parameter-free zero-impedance converter employs a most inner positive voltage feedback loop and an inner negative voltage feedback loop and an outer negative voltage feedback loop. A voltage difference between the signals provided by the most inner positive feedback loop and the inner negative feedback loop is obtained at lead 109 as a resulting total voltage. The resulting total voltage, available on lead 109, is therefore obtained as a result of subtracting a processed output voltage signal, available on lead 113, from a resulting total control signal, available at point 110 and denoted .DELTA.V.sub.c (s), in a voltage algebraic summer 111. The outer negative feedback loop may in general case incorporate a voltage sampling network 106 which is resistive network of transfer function .beta.. The inner negative feedback loop incorporates in general another voltage sampling circuit, here specifically called a voltage gain circuit 114 whose gain is denoted B. The generality of the two gain constants, .beta. and B, does not exclude their equality, i.e., .beta.=B, as a possible case. The purpose of the most inner positive feedback loop and the inner negative feedback loop is to synthesize in a current-free and improved parameter-free manner the zero-impedance converter with respect to an output lowpass filter inductor impedance Z.sub.ekv '(s), which is effectively forced to zero by the action of these two loops, and to enable the synthesis for a constant transfer function from .DELTA.V.sub.R (s) to .DELTA.V.sub.o (s), i.e., .DELTA.V.sub.o (s)/.DELTA.V.sub.R (s)=m for incorporating two (feed) forward constants K.sub.i ' and K.sub.i " as illustrated in FIG. 1. The purpose of the outer negative feedback loop is to additionally stabilize the system and control its dynamics by means of a stabilizing network 105 of transfer function G.sub.R (s) as well as to maintain a proportional relationship between the output voltage .DELTA.V.sub.o (s) and the reference voltage .DELTA.V.sub.R (s).

In operation, the current .DELTA.I(s) flows through the output filter inductor whose impedance is Z.sub.ekv '(s). The output filter consists of inductor of inductance 119 whose value is L.sub.o and resistance 118 whose value is R.sub.w, and capacitor of capacitance 117 whose value is C.sub.o and equivalent series resistance 116 whose value is R.sub.c. A complex load impedance 122 of value Z(s) is connected in parallel with the output filter capacitor and this parallel connection is of value Z.sub.ekv "(s). The output filter inductor current .DELTA.I(s) supplies impedance Z.sub.ekv "(s), providing for an output dc voltage .DELTA.V.sub.o (s) at terminal 121. A sample of the output voltage is fed back in both the outer loop, through voltage sampling network 106, and the inner loop, through voltage gain circuit 114. The output voltage, fed back via 123 by the outer loop, as a sampled voltage signal available on lead 103 is compared in an algebraic summing circuit 102 with a direct path signal K.sub.i '.DELTA.V.sub.R (s) of direct path circuit 125, to produce an error signal on lead 104 proportional to a difference between the direct path signal K.sub.i '.DELTA.V.sub.R (s), available at the output of the direct path circuit 125, and the sampled voltage signal .beta..DELTA.V.sub.o (s), available on lead 103. The error signal, available on lead 104, is processed in a stabilizing network 105 to produce a processed error signal .DELTA.V.sub..epsilon.l (s) on lead 107.

A resulting total voltage is obtained by subtracting a processed output voltage signal, on lead 113, from a resulting total control signal .DELTA.V.sub.c (s), at 110, in a voltage algebraic summer 111. The resulting total voltage, available on lead 109, is added in a positive feedback manner, via lead 109, to the processed error signal .DELTA.V.sub..epsilon.l (s), provided by lead 107, in a summing circuit 108, and to a feedforward signal, available on lead 127, in the same summing circuit 108, producing the resulting total control signal .DELTA.V.sub.c (s) at point 110. The processed output voltage signal, available on lead 113, is obtained by passing, via lead 115, dc voltage .DELTA.V.sub.o (s), available at terminal 121, through a voltage gain circuit 114 whose gain is a constant B. The feedforward signal, available on lead 127, is obtained by applying the reference voltage .DELTA.V.sub.R (s) at the input of a feedforward circuit 126 of constant gain K.sub.i ". Similarly, the direct path signal is obtained at the output of a direct path circuit 125 whose input is fed by the reference voltage .DELTA.V.sub.R (s). The resulting total control signal .DELTA.V.sub.c (s), available at point 110, is applied to a pulse width modulation control and power stage 112 where it is voltage amplified A times appearing as voltage .DELTA.V(s) on lead 120. The voltage .DELTA.V(s) is controlled but unfiltered. The lowpass filtering of voltage .DELTA.V(s) is done in the output filter described previously yielding the output dc voltage .DELTA.V.sub.o (s) at terminal 121.

The embodiment in FIG. 1 operates in such a way as to force the effects due to the output filter inductor impedance Z.sub.ekv '(s) to zero by compensating for the voltage drop .DELTA.V(s)-.DELTA.V.sub.o (s) across the impedance Z.sub.ekv '(s). In doing this, an independence of the parameters of the output filter inductor, L.sub.o and R.sub.w, (as well as of the parameters C.sub.o and R.sub.c of the output filter capacitor) and of the transfer function A of the PWM control and power stage (as well as of the transfer function of stabilizing network G.sub.R (s) is effected. For example, if the output voltage .DELTA.V.sub.o (s) is either higher or lower from the value required to cancel the voltage drop .DELTA.V(s)-.DELTA.V.sub.o (s) across the impedance of the output filter inductor Z.sub.ekv '(s), the processed output voltage signal B.DELTA.V.sub.o (s), available on lead 113 as output from the voltage gain circuit 114, will also become proportionally higher or lower causing proportionally lower or higher, respectively, voltage .DELTA.V(s) and consequently voltage .DELTA.V.sub.o (s) which will result in an exact amount of the resulting total voltage being eventually fed back and cancelling the voltage drop across the output filter inductor impedance Z.sub.ekv '(s). The action of the outer negative voltage feedback loop, closed through the voltage sampling network 106 of transfer function .beta., supports the above described action of the two inner loops, maintaining a proportional relationship between the reference voltage .DELTA.V.sub.R (s) and the output voltage .DELTA.V.sub.o (s). As seen from FIG. 1 and the above description of the functioning of the embodiment, no current through the impedance Z.sub.ekv '(s) needs to be sensed/processed in addition to a complete parameter-free operation implying minimization of measurement noise and adaptive/self-tuning operation, respectively. By forcing the effects (voltage drop) due to the output filter inductor impedance Z.sub.ekv '(s) to zero in the above described action, an independence from the (changes of) complex load impedance Z(s) is achieved. This action additionally enables a synthesis for a constant transfer function from the reference voltage .DELTA.V.sub.R (s) to the output voltage .DELTA.V.sub.o (s), i.e., .DELTA.V.sub.o (s)/.DELTA.V.sub.R (s)=m, by incorporating a direct path circuit of transfer function K.sub.i '=m.beta. and a feedforward circuit of transfer function K.sub.i "=mB, as it will be shown.

A mathematical analysis of the embodiment of FIG. 1 follows.

In FIG. 1, Z.sub.ekv '(s)=R.sub.w +sL.sub.o and Z.sub.ekv "(s)=[R.sub.c +(1/sC.sub.o)].vertline..vertline.Z(s).

From FIG. 1, (assuming the feedforward gain constant K.sub.i "=0)

yielding for the transfer function of the current-free and improved parameter-free zero-impedance converter

The transadmittance of the current-free and improved parameter-free zero-impedance converter of FIG. 1 thus is ##EQU1##

Eq. (1) implies independence of the embodiment of FIG. 1 both from load Z(s) and from the parameters of the output filter L.sub.o, R.sub.w, C.sub.o and R.sub.c. (The independence from the output filter parameters is to be understood in terms of control of the embodiment in FIG. 1, i.e., in that no time constants and associated phase shifts are introduced by the output filter components in the outer negative feedback control loop but, of course, the output filter components, inductor and capacitor, are needed to perform the lowpass filtering to obtain the required output dc voltage .DELTA.V.sub.o (s)). Eq. (1) also implies that the electrical time constants due to the output filter reactive components are reduced to zero while keeping finite loop gain! The loop gain in the outer negative feedback loop is

Eq. (3) implies a perfectly stable system wherein transfer function G.sub.R (s) is simply designed for any desired gain/phase margin. As the power converters are, generally, a regulator-type control systems, i.e., systems whose reference input (.DELTA.V.sub.R (s)) does not change, it follows that by eliminating the load dependency, as it has been done here, and by eliminating dependence on input (line) voltage variations implicitly in the embodiment in FIG. 1 by eliminating dependence on transfer function of PWM control and power stage (represented, for simplicity, by a gain constant A but, in general, a complex function A(s) can be used), the design of the negative outer feedback loop can be greatly simplified which reduces to a great simplification in designing block 105 which has been denoted by a complex transfer function G.sub.R (s) for generality reasons.

The above mentioned independence from gain of the PWM control and power stage A, which in general may be complex function A(s) due to a transport lag of the PWM stage, as demonstrated by Eqs. (1) through (3), constitutes the complete (improved) parameter-free nature of operation of this embodiment which, therefore, operates independently from the parameters of the output filter and the value of gain of PWM control and power stage.

By incorporating the direct path circuit 125, of constant gain K.sub.i ', and the feedforward circuit 126, of constant gain K.sub.i ", an additional synthesis for a zero order transfer function from the reference voltage .DELTA.V.sub.R (s) to the output voltage .DELTA.V.sub.o (s), is performed next.

Using the derivations so far, resulting in Eq. (1), the transfer function of the embodiment of FIG. 1 is

The transfer function in Eq. (4) becomes of a zero order, i.e., a constant, for the values of the gain constants

in which case

Eq. (7) implies an instantaneous and proportional relationship between the applied reference voltage and the output dc voltage. This relationship is independent of load and of parameters of the output filter and voltage gain of the PWM control and power stage.

If the derivation included more details it could have been easily seen that, with reference to Eq. (2), an infinite transadmittance part, equal to 1/[B(Z.sub.ekv '(s)-Z.sub.ekv '(s))]=.infin., is in series with a finite transadmittance part, given by Eq. (2), so that the total transadmittance is equal to the finite transadmittance part preserving a finite loop gain and thus stability while the infiniteness of the infinite transadmittance part has been actually "utilized" to reduce all time constants and corresponding phase lags, associated with the elements of the output filter, to zero.

It has been shown that the characteristics of the embodiment of FIG. 1, expressed in Eqs. (1), (2), (3) and (7), have been obtained without: (a) sensing current through either output lowpass filter inductor impedance Z.sub.ekv '(s) or through complex load Z(s) (or, for that matter, through the filter capacitor), (b) processing signals from the switched (PWM) domain with associated noise and ripple problems, (c) using differentiation, and (d) knowing parameters of the output filter, transfer function (voltage gain) of the PWM control and power stage, and transfer function of the stabilizing network G.sub.R (s).

A current-free and improved parameter-free zero-impedance converter embodying the principles of the invention applied to synthesizing electric motor drive systems of infinite disturbance rejection ratio and zero order dynamics is shown in FIG. 2.

In FIG. 2, A denotes a voltage gain of PWM control and power stage 218. The power stage within block 218 is implemented appropriately for the kind of motor which it powers; for example, it may be a dc-to-dc converter for dc motors or a dc-to-ac converter for ac motors or a PWM power stage employed for driving step motors (in this latter case some additional circuits may be used without affecting the properties of the embodiment). The PWM control portion within block 218 then performs appropriate control function. What is of interest is that a signal .DELTA.V.sub.c (s) on lead 214 is voltage-amplified A times to appear as voltage .DELTA.V(s) on lead 219 with an associated power/current supplied by a source of electrical energy of a constant voltage V.sub.in (not illustrated) at an input to a power stage within the block 218.

In FIG. 2, the current-free and improved parameter-free zero-impedance converter receives its input via lead 212 (assuming a feedforward path denoted with lead 206 disconnected), i.e., a control signal .DELTA.V.sub..epsilon.l (s) acts as an input to the zero-impedance converter while its output is an angular shaft speed .DELTA..omega..sub.o (s), or corresponding position .DELTA..theta..sub.o (s). The remaining portion of the embodiment of FIG. 2 is due to the application of the current-free and improved parameter-free zero-impedance converter in synthesizing electric motor drive systems of infinite disturbance rejection ratio and zero order dynamics.

The embodiment of FIG. 2 employs a most inner positive voltage feedback loop and an inner negative voltage feedback loop and an outer negative voltage feedback loop. The two negative feedback loops are realized through use of a tach 233 of gain constant K.sub.v [V/rad/sec]. A voltage difference between the signals provided by the most inner positive feedback loop and the inner negative feedback loop is obtained on lead 215 as a resulting total voltage. Thus the resulting total voltage is obtained subtracting a tach signal, available on lead 217, from a resulting total control signal, available at point 214 and denoted .DELTA.V.sub.c (s), in a voltage algebraic summer 216. The outer negative feedback loop is closed by means of lead 209 which supplies the tach signal. The purpose of the most inner positive feedback loop and the inner negative feedback loop is to synthesize in a current-free and improved parameter-free manner the zero-impedance converter with respect to a motor equivalent impedance Z.sub.ekv (s), seen between applied voltage to the motor .DELTA.V(s) and a back emf .DELTA.V.sub.b (s), the impedance being effectively forced to zero by the action of these two loops, and to enable for the synthesis for a constant transfer function from .DELTA..theta..sub.i (s) to .DELTA..theta..sub.o (s), i.e., .DELTA..theta..sub.o (s)/.DELTA..theta..sub.i (s)=m, by incorporating two (feed) forward constants K.sub.i ' and K.sub.i " as illustrated in FIG. 2. The purpose of the outer negative feedback loop is to additionally stabilize the system and control its dynamics by means of a stabilizing and control block 211 of transfer function G.sub.R ' (s) as well as to maintain a proportional relationship between the output angular shaft position .DELTA..theta..sub.o (s), at point 230, and the position command .DELTA..theta..sub.i (s), at point 201. The constant K.sub.i ' characterizes a velocity direct path circuit consisting of a differentiation operator 202 and the associated differentiating time constant 204. Similarly, the constant K.sub.i " characterizes a feedforward circuit consisting of the differentiation operator 202 and the associated differentiating time constant 205. A voltage command .DELTA.V.sub.i (s) (not shown) actually represents the position command .DELTA..theta..sub.i (s), so that, alternatively, a velocity signal voltage, denoted .DELTA..omega..sub.i (s) and available at point 203, may be considered as a voltage command corresponding to a velocity command and obtained differentiating the voltage command .DELTA.V.sub.i (s) corresponding to the position command .DELTA..theta..sub.i (s) in which case (case of having already differentiated position command available in terms of voltage at point 203) the constants associated with blocks 204 and 205 are dimensionless, i.e., in [V/V].

In operation, the current .DELTA.I(s) flows through an electric motor equivalent impedance Z.sub.ekv (s) numbered 221. The equivalent impedance Z.sub.ekv (s) is the one seen between the voltage applied to the motor .DELTA.V(s) and the back emf .DELTA.V.sub.b (s) and it normally consists of resistive and inductive components. Its value is not needed to be known for the purposes of the synthesis of embodiment in FIG. 2, which constitutes a parameter-free feature of the embodiment. Neither the current .DELTA.I(s) flowing through the motor impedance Z.sub.ekv (s) needs to be measured/processed which constitutes a current-free feature of the embodiment. A motor developed torque .DELTA.T.sub.M (s) is produced on the basis of the motor current .DELTA.I(s). The torque producing mechanisms are represented by a block 223 of transfer function G.sub.M (s). In case of n-phase motors, a total current .DELTA.I(s) is understood to be on lead 222 as an input to block 223. As it will be shown, the algorithms of the embodiment in FIG. 2 are independent of the torque producing mechanisms so that these mechanisms were represented by the (linear) Laplace-transformed function G.sub.M (s) even though in some motors these mechanisms are nonlinear. The current .DELTA.I(s) is therefore obtained due to a voltage difference .DELTA.V(s)-.DELTA.V.sub.b (s), existing on lead 234, acting upon the motor equivalent admittance 1/Z.sub.ekv (s) to produce .DELTA.I(s) which in turn produces motor torque .DELTA.T.sub.M (s) on lead 224 by means of a torque producing mechanisms 223 denoted G.sub.M (s). The motor developed torque .DELTA.T.sub.M (s) is opposed by a load torque .DELTA.T.sub.l (s), supplied externally at point 225. This opposition takes place in an algebraic summer 226. The difference between the two torques, .DELTA.T.sub.M (s)-.DELTA.T.sub.l (s), is supplied by lead 235 to a block 227 which denotes transformation from a torque to an angular shaft speed, and whose transfer function is 1/sJ, where J is a system moment of inertia. Normally, block 227 has a transfer function 1/(sJ+B) where B is a viscous friction coefficient. However, as it will be shown, the algorithms of the embodiment of FIG. 2 are independent of the transfer function of block 227, whether it is expressed as 1/sJ or 1/(sJ+B), implying infinite robustness of the system to the mechanical parameters. An angular shaft speed .DELTA..omega..sub.o (s) is produced at point 228 while an angular shaft position .DELTA..theta..sub.o (s) is produced, inegrating the speed in block 229, at point 230. A back emf .DELTA.V.sub.b (s) is produced on lead 232 opposing voltage applied to the motor .DELTA.V(s), available at point 219. This opposition is mathematically represented by subtracting the back emf from the voltage applied to the motor in an algebraic summer 220. The back emf is produced in proportion to the angular speed, where the constant of proportionality is a constant K.sub.m, shown in block 231, for a constant air-gap flux in an electric motor, regardless of the type of motor. It should be understood that the back emf results into a reduced average (dc) voltage applied to the motor impedance Z.sub.ekv (s) in case of dc motor and, in cases of ac and step motors, it reduces a peak-to-peak, and thus rms, voltage applied to the motor impedance Z.sub.ekv (s). The portion within broken line in FIG. 2, referred to with numeral 236, thus represents an electric motor equivalent circuit. It will be shown that the algorithms of the current-free and improved parameter-free zero-impedance converter are independent from any of these motor parameters/mechanisms within the equivalent circuit 236. It will also be shown that they are additionally independent from a voltage gain A characterizing PWM control and power stage as well as from the transfer function of a stabilizing and control block 211, denoted G.sub.R '(s).

The angular shaft speed .DELTA..omega..sub.o (s) is sensed by tach 233 and the tach signal is applied as a velocity feedback signal via leads 217 and 209 to close the inner and the outer negative feedback loops, respectively. A velocity signal voltage represented as .DELTA..omega..sub.i (s) and available at point 203 in a form of voltage obtained by differentiating the voltage command .DELTA.V.sub.i (s) corresponding to the position command .DELTA..theta..sub.i (s), is passed through a velocity direct path circuit 204 of gain K.sub.i '. A velocity command voltage is provided on lead 207 at the output of the velocity direct path circuit 204. The velocity feedback signal on lead 209 is subtracted in an algebraic summer 208 from the velocity command voltage on lead 207 producing a resulting error voltage on lead 210. The resulting error voltage is brought with lead 210 to a stabilizing and control circuit 211 of transfer function G.sub.R '(s) at whose output 212 a control signal .DELTA.V.sub..epsilon.l (s) is produced. The control signal is added in a positive manner to a feedforward signal, available on lead 206, in a summer 213. The feedforward signal on lead 206 is available at the output of a feedforward circuit 205 characterized by a gain constant K.sub.i " fed at its input by the velocity signal voltage .DELTA..omega..sub.i (s). It should be understood that the feedforward signal increases a dc voltage applied to the motor impedance Z.sub.ekv (s) in case of a dc motor, and in cases of ac and step motors it increases a peak-to-peak, and thus rms, voltage applied to the motor impedance Z.sub.ekv (s), i.e., the feedforward signal opposes action of the back emf .DELTA.V.sub.b (s).

The resulting total voltage obtained, as described earlier, by subtracting the velocity feedback signal (tach signal) on lead 217 from the resulting total control signal .DELTA.V.sub.c (s) sampled from point 214, in a voltage algebraic summer 216, is then added in a positive feedback manner via lead 215 to the control signal .DELTA.V.sub..epsilon.l (s), on lead 212, and the feedforward signal, on lead 206. The addition of the three signals is done in summer 213 whose output provides the resulting total control signal .DELTA.V.sub.c (s) at point 214. The resulting total control signal .DELTA.V.sub.c (s), at point 214, is applied to a pulse width modulation control and power stage 218 where it is voltage amplified A times appearing as voltage .DELTA.V(s) on lead 219 which, opposed by the back emf .DELTA.V.sub.b (s) inherently produced within a motor on lead 232, creates motor current .DELTA.I(s) through the motor equivalent impedance Z.sub.ekv (s).

Similarly as explained in connection with FIG. 1, the embodiment in FIG. 2 operates in such a way as to force the effects due to the equivalent motor impedance Z.sub.ekv (s) to zero by compensating for the voltage drop .DELTA.V(s)-.DELTA.V.sub.b (s) across the impedance Z.sub.ekv (s). In this action, an independence from the parameters of the impedance as well as from the remaining parameters of the plant under the control is achieved. For example, if the angular shaft speed .DELTA..omega..sub.o (s) is either higher or lower from the value required to cancel the voltage drop .DELTA.V(s)-.DELTA.V.sub.b (s), (by producing the velocity feedback signal at the tach output and completing the processing as explained in the description of the embodiment), across the equivalent impedance Z.sub.ekv (s), the velocity feedback signal K.sub.v .DELTA..omega..sub.o (s), available as the tach signal on lead 217, will also become proportionally higher or lower causing proportionally lower or higher, respectively, voltage .DELTA.V(s) and consequently the angular shaft speed .DELTA..omega..sub.o (s) which will result in an exact amount of the resulting total voltage being eventually fed back and cancelling the voltage drop across the motor equivalent impedance Z.sub.ekv (s). The action of the outer negative (velocity) feedback loop, closed by means of lead 209, supports the above described action of the two inner loops, maintaining a proportional relationship between the output angular shaft speed .DELTA..omega..sub.o (s) (or position .DELTA..theta..sub.o (s)) and the velocity signal voltage .DELTA..omega..sub.i (s) (or position command .DELTA..theta..sub.i (s)).

As mentioned earlier, the implementation of the PWM control and power stage 218, as well as the value of its gain A, is irrelevant for the functioning of the embodiment of FIG. 2. It is understood that signals associated with the summing circuit 213 are compatible in that they are ac or dc varying signals such that the PWM control portion within block 218 operates on appropriate control signals for the PWM processing, i.e., a dc varying signal and a triangular (or sawtooth) carrier signal for producing PWM waveform for dc motors, or an ac varying sinusoidal signal or pulse signal and a carrier for producing PWM waveform for ac or step motors, respectively. Thus, the voltage supplied to the motor .DELTA.V(s) is in a pulse width modulated form whose average (dc) value corresponds to a voltage effectively seen by a dc motor; its fundamental component corresponds to a sinusoidal voltage effectively seen by an ac motor; and its pulsed waveform, free from the actual pulse width modulation, is seen by a step motor.

The scaling constant m in blocks 204 and 205 has units in [radian/Volt] for a voltage command .DELTA.V.sub.i (s) (not shown in FIG. 2) actually representing the position command .DELTA..theta..sub.i (s). In such a case, and since the tach constant K.sub.v is dimensioned in [V/rad/sec], blocks 204 and 205 are dimensioned in [sec], representing time constants. However, the differentiation operator s in block 202 is dimensioned in [1/sec] so that the velocity command voltage on lead 207 and the feedforward signal on lead 206 are expressed in Volts for the voltage command .DELTA.V.sub.i (s), representing the position command .DELTA..theta..sub.i (s), applied at point 201 in Volts. (The extraction of the differentiation operator s, in block 202, in front of, in this case, time constants K.sub.i ' and K.sub.i ", is purely mathematical; physically, sK.sub.i ' and sK.sub.i " blocks, being dimensionless, i.e., dimensioned in [V/V], are realized for this case of applying voltage command in Volts at point 201). Alternatively, the scaling constant m in blocks 204 and 205 is dimensioned in [rad/sec/V] in case of the velocity signal voltage .DELTA..omega..sub.i (s) being applied in Volts at point 203, so that blocks 204 and 205 become dimensionless, i.e., dimensioned in [V/V], representing a constant-gain blocks. (In connection with the embodiment of FIG. 1, the scaling constant m in blocks 125 and 126 is dimensionless, i.e., dimensioned in [V/V], and since also .beta.[V/V] and B[V/V], the blocks 125 and 126 are realized as a constant-gain circuits of gains K.sub.i '[V/V] and K.sub.i "[V/V], respectively).

A mathematical analysis of the embodiment of FIG. 2 follows. (Assume K.sub.i "=0 for now).

From FIG. 2,

yielding for the transfer function of the current-free and improved parameter-free zero-impedance converter

The transadmittance of the current-free and improved parameter-free zero-impedance converter of FIG. 2 thus is ##EQU2##

Similarly, it is easily derived for a transfer function of the embodiment in FIG. 2 (for K.sub.i ".noteq.0)

while the dynamic stiffness is easily shown to be

Eq. (11) implies that a disturbance rejection ratio, defined as D.sub.rr (s)=.DELTA..theta..sub.oi (s)/.DELTA..theta..sub.ol (s) where .DELTA..theta..sub.oi (s) is a part of the angular shaft position response due to the input position command in Eq. (10), and .DELTA..theta..sub.ol (s) is a part of the output angular shaft position response due to the load torque distrubance in Eq. (11), is

Eq. (10) implies that for

the transfer function of the embodiment in FIG. 2 becomes constant

with associated zero order dynamics.

Eq. (8) implies that all electrical and mechanical time constants in the system in FIG. 2 are reduced to zero while keeping finite loop gain- The velocity loop gain is

Eq. (15) implies a perfectly stable system wherein transfer function G.sub.R '(s) is simply designed for any desired gain/phase margin. The design of transfer function G.sub.R '(s) is actually very much simplified as the embodiment of FIG. 2 is made of infinite disturbance rejection ratio, Eq. (12), and of zero order dynamics, Eq. (14), independently of the transfer function G.sub.R '(s). Eq. (8) also implies independence from gain of the PWM control and power stage A as well as from any of the parameters/mechanisms incorporated within the plant under the control (existing in the motor equivalent circuit 236).

With more details during the derivation of Eq. (9) it could have been easily seen that an infinite transadmittance part, equal to K.sub.m /{K.sub.v [Z.sub.ekv (s)-Z.sub.ekv (s)]}=.infin., is in series with a finite transadmittance part, given by Eq. (9), so that the total transadmittance is equal to the finite transadmittance part preserving a finite loop gain and thus stability while the infiniteness of the infinite transadmittance part has been actually "utilized" to reduce all electrical and mechanical time constants to zero.

It has been shown that the characteristics of the embodiment of FIG. 2, expressed in Eqs. (8), (9), (12), (14) and (15), have been obtained without: (a) sensing current through the motor impedance Z.sub.ekv (s), (b) processing signals from the switched (PWM) domain with associated noise and ripple problems, (c) using differentiation, and (d) knowing parameters of the motor impedance Z.sub.ekv (s) including mechanisms of torque and back emf production and mechanical parameters, transfer function (voltage gain) of the PWM control and power stage, and transfer function of the stabilizing and control circuit G.sub.R '(s).

Various changes and modifications may be made, and features described in connection with any one of the embodiments may be used with any others within the scope of the inventive concept.

For example, the applications of a current-free and improved parameter-free zero-impedance converter to a capacitive impedance may be performed without departing from the scope of the inventive concept.

Also, the applications in cases of inductive impedances are not limited to those described in this application (switch mode power converters and electric motors). They are possible whenever the properties of the current-free and improved parameter-free zero-impedance converter, described here, are needed.

As another example, the scaling constant m, conceptually employed in the signal portions of the respective embodiments, may easily be moved to a power portion of an embodiment, in order to facilitate higher voltage levels (when multiplying with m), without affecting any of the properties of the embodiments. The scaling constant m can be moved to increase, for example, the voltage gain of the PWM stage for, of course, keeping loop gains unchanged and resulting in the same sets of final equations as shown here.