Hierarchical Tape Automated Bonding Method

The present invention relates generally to tape automated bonding and particularly to repair of circuitry interconnected by tape automated bonding.

In the electronics industry, ever-present goals are to miniaturize integrated circuit chip packaging and to minimize the lengths of interconnections between chips. Multi-chip modules were designed to address these goals. Multi-chip modules package and interconnect a plurality of chips in a functional relationship. The advantages of multi-chip modules are primarily in terms of packaging density and operational speed. The main disadvantage involves the cost of manufacturing such modules.

Among the reasons for the high cost of multi-chip modules is the relatively low manufacturing yield of the modules. As the number of integrated circuit chips within a package increases, the likelihood of a defect within the package also increases. Typically, testing of the individual chips prior to interconnection within a multi-chip module is not possible. Later detection of a defective chip within a module may result in the entire module having to be discarded.

An interconnection technique which permits pretesting of chips is referred to as "tape automated bonding". This fabrication procedure utilizes a continuous insulated tape which is similar to photographic film to provide a planar substrate for chips that are attached to individual sections, or frames, of the tape. A spiderlike metal pattern of conductive traces is etched on each frame. The traces may either "fan out", i.e. radiate from the center of the frame to the four edges, or may be four sets of parallel lines, with each set extending perpendicularly from one edge of a chip. The chip is carefully aligned over the center of the frame so that the contacts of the chip are precisely located at corresponding conductive traces in the central portion of the frame. The chip is then attached to the tape automated bonding frame. This connection of the chip contacts to the inner portion of the frame is referred to as "inner lead bonding".

After the inner lead bonding has been performed, the integrated circuit chip may be tested. The chip can be thoroughly exercised electrically. Following testing, the outer leads of the frame are microbonded to pads on a substrate. The attachment of the conductive traces of the frame to the pads of the substrate is referred to as "outer lead bonding." The substrate is that portion of the multi-chip module which permits mounting of more than one lead frame for electrical communication between the chips supported by the frame.

While tape automated bonding provides an important improvement in the interconnection of integrated circuit chips because it allows pretesting of chips, rework and repair of a circuit having a number of chips is still problematic. A chip having a size less than onehalf inch in length may have more than 400 connection sites. Removal of a single chip from a larger circuit typically requires disconnection of each of the more than 400 outer leads from the substrate connection sites. Desoldering of the lead frame from the substrate connection sites can be a labor-intensive task.

U.S. Pat. No. 4,806,503 to Yoshida et al. teaches a method of replacing integrated circuit chips interconnected within a multi-chip module by use of tape automated bonding. The method of Yoshida et al. is to cut the conductive traces of the lead frame at the centers of the conductive traces. That is, the outer lead bonds are left intact to support the outer portions of the conductive traces. A replacement part having a lead frame with conductive traces sufficiently long to overlap the conductive traces left from the first-installed lead frame is then precisely aligned to allow bonding of the second lead frame to the conductive traces of the original lead frame. While the Yoshida et al. method does permit replacement of chips within a multi-chip module, the method requires a second set of microbonds. To minimize resistivity, it is preferred that the number of microbonds be minimized. Moreover, while bonding devices exist to secure lead frames to substrates, these bonding devices may not be dimensionally or functionally adaptable to microbond a first lead frame to a second lead frame.

It is an object of the present invention to provide a system and method for interconnecting electronic devices wherein the system and method allow testing of devices prior to final mounting and wherein the resulting assembly can be easily reworked or can be removed in its entirety.

The above object has been met by interconnecting an electronic device to a substrate, such as a circuit board, using a hierarchy of bonding and tensile strengths to allow "cold" removal of solder connections without jeopardizing further use of the substrate. For example, where thermocompression is used to bond outer lead ends of a tape automated bonding frame to connection sites of the substrate, the parameters of force, temperature and time are manipulated to insure that the bonding strength of the outer lead ends to the connection sites is less than the bonding strength of the connection sites to the substrate.

An electronic device, typically an integrated circuit chip, having a plurality of first connection sites is aligned with inner lead ends of the tape automated bonding frame. The inner lead ends and the first connection sites are then bonded. The resulting assembly of the chip and the lead frame can be used for testing of the chip.

If the test results are positive, the outer lead ends of the lead frame are aligned with second connection sites on a substrate. The substrate may be the packaging of a multi-chip module or may be a printed circuit board. The attachment of the second connection sites to the substrate has a first bond strength (B.sup.1). The outer lead ends are then attached to the second connections sites using a technique which limits the bond strength (B.sup.2) of the outer lead ends to the second connection sites so that B.sup.1 >B.sup.2.

An advantage of the present invention is that the integrated circuit chip and its associated lead frame can be easily replaced if the chip is later found to be defective. A force applied to the outer lead ends of the lead frame has the tendency of separating the outer lead ends from the second connection sites while leaving the bonds to the substrate intact. Consequently, it is not necessary to individually desolder the outer lead ends from the second connection sites.

Preferably, the tensile strength (B.sup.3) of the individual leads of the tape automated bonding frame is exceeded by both the bond strength (B.sup.l) of the connection sites to the substrate and the bond strength (B.sup.2) of the connection sites to the outer lead ends. The relationships would then be B.sup.1 >B.sup.2 >B.sup.3. Forcing the lead frame from the substrate would cause breaking of the individual leads of the lead frame, whereafter the outer lead ends could be peeled from the second connection sites without harm to the substrate. In a preferred embodiment, the leads are structurally weakened to control the location of the break. This structural weakness may be manufactured into the tape automated bonding frame or may be accomplished immediately prior to removal of the frame by scoring the leads. Alternatively, the leads may be cut at the desired location at the time of removal.

FIG. 1 is a top view of a portion of a tape automated bonding frame having an integrated circuit chip attached thereto.

FIG. 2 is a top view of the tape automated bonding frame of FIG. 1 attached to a substrate.

FIGS. 3-6 are side sectional views of a method of replacing the tape automated bonding frame of FIG. 2.

With reference to FIG. 1, a tape automated bonding frame 10 is shown as having a plurality of conductive traces 12 or fingers which attach at inner leads 13 to a semiconductor chip 14. An exemplary configuration would be a semiconductor chip 14 having 408 connection sites, with each of the conductive fingers 12 attached to one of the sites. The conductive fingers are simultaneously bonded by thermocompression or gold-tin eutectic methods to bumps on a chip 14. The bumps on the chip are gold bumps deposited on aluminum pads to insure a good surface for thermocompression bonding. This "inner lead bonding" method, however, is not critical to the present invention.

Likewise, the "fan out" configuration of conductive fingers 12 radiating from the chip 14 is not critical. The fingers may alternatively be parallel traces extending perpendicularly from the chip. The fingers are spaced together so closely that the center-to-center distance, or pitch, of two fingers may be 4 mils.

The conductive fingers 12 are formed from a copper foil. A portion of the copper is etched away using techniques known in the art. The etching forms the electrically isolated conductive fingers. For utility planes, the etching process may leave a larger area of copper, as shown at 18 and 20. For example, plane 18 may be at ground potential and plane 20 may be at a potential per fingers 12 are preferably nickel plated and covered with a coating of gold.

An insulative tape 16 is used to support the fragile conductive fingers 12. The insulative tape is a polymer having a hole at its center for mounting of the semiconductor chip 14. The center hole allows space for the inner lead bonding.

The resulting assembly of the chip 14 and the tape automated bonding frame 10 is essentially a space transformer to afford testing of the chip 14 and, after testing, interconnection with a second chip. The chip device can be thoroughly exercised electrically or may be burned-in before assembly. This testing is not possible in many other fabrication procedures. Typically, prior to testing the fingers extend beyond what is shown in FIG. 1. If the results of testing are positive, the fingers are cut to a shorter length for connection to outside circuitry. This allows testing apparatus to contact the fingers without affecting the integrity of a later bond.

As shown in FIG. 1, the fingers 12 have portions which extend beyond the insulative tape 16. These portions 22 are referred to in the art as "outer leads." For the purpose of describing the present invention, one conductive finger 24, with its outer lead 26, is illustrated as being spaced apart from the remainder of the fingers 12.

Referring now to FIG. 2, a properly functioning semiconductor chip is interconnected with other circuitry by attachment of the outer leads 22 and 26 of the fingers 12 and 24. The tape automated bonding frame 10 is mounted to a substrate 28 in a manner such that the outer leads are aligned with substrate traces 30 and 32. The substrate traces 30 and 32 act as connection sites for attachment to the outer leads. Alignment of the outer leads 22 and 26 is followed by bonding of the outer leads to the substrate traces 30 and 32. The attachment may be by any one of the techniques of thermocompression bonding, ultrasonic bonding or thermosonic bonding. The problem which is experienced in the art is one of reworking or replacing the semiconductor chip after the microbonding. Removal of the chip from the substrate 28 may require disconnection of more than 400 outer leads 22 and 26 from the connection sites of the substrate traces 30 and 32. Even after removal, the task of replacing a chip is a laborious one since each connection site on the substrate must be cleaned and prepared for connection to a replacement chip and tape automated bonding frame.

The present invention overcomes the problem of reworking a tape automated bonding frame 10 or replacing a defective semiconductor chip 14 by providing a hierarchy of bonding and tensile strengths. With reference to FIG. 3, a substrate trace 32 is a metallic member which is photolithographically patterned and etched on the substrate 28. The substrate 28 is a package of a multi-chip module. However, this is not critical. Alternatively, the substrate may be a standard printed circuit board or part of a single-chip package. The attachment of the substrate trace 32 to the substrate 28 defines a first bond strength.

As noted above, the outer lead 26 is attached to the substrate trace 32 by any one of the techniques of thermocompression bonding, ultrasonic bonding or thermal sonic bonding. The attachment provides a second bonding strength. In attaching the outer lead, the relevant parameters are controlled so that the second bonding strength is less than the first bonding strength of the trace 32 to the substrate 28. Thus, a force applied to the outer lead 26 in a direction away from the substrate 28 will overcome the bonding strength of the outer lead to the substrate trace 32, while leaving intact the bond of the trace 32 to the substrate. In this manner, the tape automated bonding frame 10 of FIG. 2 can be removed from the substrate 28 without application of a solder tip. Instead, the outer leads are peeled away from the substrate.

As shown in FIG. 2, the width of the conductive fingers 12 and 24 increases at the outer leads 22 and 26 of the conductive fingers. Preferably, the tensile strength of the conductive fingers at the start of the outer leads is less than the bonding strength of the outer leads to the substrate traces 30 and 32. Removal of a tape automated bonding frame 10 then becomes a two-step process. The first step is to apply force to the tape automated bonding frame in a direction away from the substrate 28. This first step causes breakage of the conductive fingers, leaving only the outer leads still attached to the substrate traces. The second step is to peel the outer leads away from the substrate traces. A replacement tape automated bonding frame 10 can then be attached to the substrate traces.

Alternatively, breaking of a conductive finger can be controlled by structurally weakening the conductive finger at the desired location of breakage. Referring again to FIG. 3, the outer lead 26 is shown as including a score 34 which may be a manufacturing score or may be provided by the person removing the lead frame. The outer lead 26 can then be broken along the scores in the outer leads so as to remove a defective semiconductor chip. This is shown in FIG. 4. Peeling of the remainder of the outer lead 26 from the substrate trace 32 is illustrated in FIG. 5. The substrate trace remains firmly bonded to the substrate 28.

After removal of the defective semiconductor chip or tape automated bonding frame, a replacement is attached to the same substrate traces. As shown in FIG. 6, a replacement outer lead 36 is bonded to the substrate trace 32. Again, the bonding strength of the outer lead to the substrate trace is less than the bonding strength of the substrate trace to the substrate 28.

Still referring to FIG. 6, the preferred embodiment is described above as a package 28 of a multi-chip module having a metallic substrate trace 32 photolithographically patterned and etched thereon, and a nickel-plated, gold-coated copper finger 36 of a tape automated bonding frame. In using thermocompression bonding at a temperature of 500.degree. C. and a dwell time of 1 second, it was discovered that a force of 500 grams was insufficient in providing the necessary bonding strength. At the opposite extreme, a force of 2,000 grams at the same temperature and same dwell time provided a greater bonding strength than that of the substrate trace 32 to the substrate 28. However, a force in the range of 1,000 grams to 1,500 grams provided a bonding strength greater than the tensile strength of the conductive finger but less than the bonding strength of the substrate trace 32 to the substrate 28. This range of force was successful with an embodiment in which both the outer leads and the substrate traces were 10 mils in width and had a 10 mils pitch. The successful range will differ with the dimensions of the components and with the temperature and the dwell time used in the thermocompression bonding.