Variable Gain Amplifier

This invention relates generally to amplifiers, and more particularly to those amplifiers capable of varying their gain in response to a control signal.

Typical variable gain amplifiers commonly operate by varying a voltage potential coupled to the collector of a transistor amplification device. However, depending upon the type of amplification device chosen, the application of very low collector voltages to control the gain of the device may cause the occurrence of parametric regeneration, wherein the device begins to oscillate. Such condition is significantly detrimental to the performance of the amplifier and designers of amplification circuits strive to avoid or reduce the probability of such occurence whenever possible. Accordingly, a need exists for variable gain amplifier that avoids the parametric regeneration phenomena.

Accordingly, it is an object of the present invention to provide a variable gain amplifier that avoids the detriments of the prior art.

Briefly, according to the invention, an application device has its gain controlled by varying the current flowing into the amplification device. The current is varied by a means of a variable bias network that adapts the input current in response to a control signal. In this way, the application is provided with variable gain while avoiding the parametric regeneration condition.

FIG. 1 is a schematic diagram of a variable gain amplifier in accordance with the present invention.

FIG. 2 is a schematic diagram of an alternative variable gain amplifier in accordance with the present invention.

FIG. 1 schematically illustrates a variable gain amplifier 10 in accordance with the present invention. Operationally, a signal to be amplified is received by an input port 12 and presented to an input matching network 14, the purpose and design of which are well known in the art. Following the matching network 14, the signal flows through a DC blocking capacitor 16 into an amplification device 18, which preferably comprises an MRF 8372 manufactured by Motorola, Inc., or its functional equivalent. Schematically, the amplification device appears as a transistor amplifier 18 arranged in the common emitter mode. Accordingly, the input signal is received on the base and the output signal taken from the collector of the amplification device via another DC blocking capacitor 20. An output matching network 22 (also designed in a conventional manner) provides the amplified signal at an output port 24.

According to the invention, the gain of the amplification device 18 is controlled by varying the current flowing into the amplification device 18 from a biasing network. The magnitude of the current is set by a voltage source 30 and three resistors 32, 34 and 36, wherein at least one of the resistors (36 in this example) is a voltage variable resistor (i.e., its resistance changes in response to a control voltage). By varying the control voltage (and hence the resistance of the resistor 36), the current may be varied and set to any level desired. This level is maintained by the operation of a transistor 28 and resistor 26, which forms a feedback network about the amplification device 18 to maintain the current constant at whatever level it is set to by the variable control signal. Preferably, the control voltage resides in a range from 4 to 10 volts DC (although other voltage ranges could be used), which is divided by a resistor divider 38 and 40; the divided voltage being presented at the base of a transistor 42. By varying the base voltage of the transistor 42, the transistor 42 becomes a voltage variable resistor, which resistance is added in series to a resistor 44 to provide the total of all resistance of the voltage variable resistor 36. Thus, by varying the control voltage within the control voltage range, a resistance value for the resistor 36 is set that determines the current for the amplifier 18, which current is provided via an RF choke 33 to the collector.

Once a current magnitude has been determined by the control voltage, that current level is maintained constant by operation of the remaining portions of the biasing network. Since the voltage source 30 provides a constant voltage output, the voltage at the base of the transistor 28 will also remain constant since it is set by the voltage division of the resistors 34 and 36. If the collector current begins to increase, the voltage at the emitter of the transistor 28 will begin to fall. This decreases the base emitter voltage drop, which tends to shut off the PNP transistor 28. As the transistor 28 begins to shut off, its collector current begins to fall, which is used to supply the base current to the transistor 18 via the resistor 26. The falling base current of the transistor 18 tends to decrease the collector current, thus offsetting the attempted rise in collector current that triggered the adjustment. Conversely, a decreasing collector current tends to force the transistor 28 into a more active mode, increasing the current through the resistor 26 and into the base of the amplifier 18. This tends to increase the collector current, which offsets the initial drop that triggered the adjustment. In this way, the collector current is maintained at whatever level it is set at via the control voltage.

In the arrangement of FIG. 1, the control voltage and the current relationship is set in a positive relationship. That is, increasing control voltage tends to increase the collector current and hence the gain of the amplifier 18. An increasing control voltage tends to turn the transistor 42 into a more active mode which decreases its resistance. The decreased overall resistance of the resistor 36 causes the transistor 28 to become more active, sending an increasing current through the resistor 26 and into the base of the amplifier 18. This increases the collector current and hence the gain of the amplifier 18.

Referring to FIG. 2, an alternate embodiment of the invention is shown having a negative relationship between the control voltage and the amplifier gain. That is, the amplifier 10' of FIG. 2 operates so that with increasing control voltage, the gain of the amplifier is decreased. Operationally, the control voltage causes the voltage at the base of the transistor 28 to rise over that value that it would otherwise be biased to in the absence of the control voltage. The increase base voltage cuts back on the operation of the amplifier 28, and reduces the current into the base of the amplifier 18 via the resistor 26. This reduced current operates to reduce the current and hence the gain of the amplifier 18. Of course, once the device current has been established, the circuit of FIG. 2 operates as described in conjunction with FIG. 1 to maintain that current constant avoiding fluctuation in the collector current.