Image Processing Apparatus With Real-Time Texture Processing

1. Field of the Invention

The present invention relates to an image processing apparatus for concentration modulating input image data.

2. Related Background Art

Hitherto, an apparatus which can execute a process (hereinafter, referred to as a texture process) for concentration modulating image data by using arbitrary pattern data has been limited to a relatively large scale computer. The texture process will now be briefly described. For instance, the texture process denotes that an input image as shown in FIG. 7A is concentration modulated by using pattern data as shown in FIG. 7B, so that an output image as shown in FIG. 7C is obtained. Assuming that the texture pattern of FIG. 7B is a pattern of a cloth design, for example, the cloth pattern can be synthesized to the area in the L-shaped character of FIG. 7A.

In an image processing apparatus for outputting an image from an image input in a real-time manner, the apparatus which can execute such a texture process does not exist.

On the other hand, hitherto, in the case of executing the texture process on a plurality of areas, the process must be sequentially executed for every area, which is troublesome. Therefore, in the case of synthesizing the same texture pattern with each of a plurality of areas, it takes time in proportion to the number of areas.

In addition, in the case of executing the texture process on a non-rectangular area instead of a rectangular area, a mask must be produced to designate such an area, which is very complicated.

Further, in the case of variably magnifying a texture pattern and executing concentration modulation thereof with the input image data, after the variably magnifying process is executed on the texture pattern every process, the texture process must be performed, which is troublesome.

On the other hand, for instance, an apparatus of a construction shown in FIG. 1 is considered as a method of realizing the texture process executed on an input image in a real-time manner. That is, according to this method, a pattern image for the texture process is read and in advance, and when an original image which is to be subjected to the texture process is read, the stored pattern image is read out and calculated by an image modulator and the concentration is modulated.

However, in such an apparatus, since there is a limitation in the capacity of a memory unit to store the pattern image for the texture process, if the pattern image to be processed is smaller than the original image data to be processed, the pattern image must be repetitively used.

In the case of repetitively using the pattern image as mentioned above, no problem occurs for an image such that the patterns are relatively continuous at the right/left and upper/lower joint surfaces of the pattern image. However, in many cases, since the patterns at the joint surfaces are discontinuous, there is a drawback that the image after completion of the texture process suddenly changes at the joint surfaces of the pattern and an unnatural line of the concentration difference appears in the image. For instance, FIG. 16A shows a finite size pattern. FIG. 16B shows concentration difference lines which are generated when the texture process of the repetitive pattern was executed to an area larger than the size of the finite size pattern of FIG. 16A.

Such a drawback inevitably occurs in the image process for concentration modulating an image in accordance with a certain pattern.

The present invention is made in consideration of the above conventional technique and it is the first object of the invention to provide an image processing apparatus which can execute the texture process in a real-time manner.

To accomplish the above object, according to a first aspect of the present invention, there is provided an invention in which by providing means for producing at least one area signal, particularly, a non-rectangular area signal, a texture process is executed on at least one area and the result can be output in a real-time manner.

The second object of the invention is to provide an image processing apparatus which can execute a variety of texture processes.

To accomplish the second object, according to a second aspect of the present invention, there is provided an invention in which by providing means for storing a modulation pattern and means for controlling addresses of a memory to store the modulation pattern, variable-magnification processes which are different in the horizontal and vertical directions are executed independently of image data to be modulated, texture processes are executed, and the result can be output in a real-time manner.

The third object of the invention is to provide an image processing apparatus which can prevent a deterioration in picture quality when a texture process is executed.

To accomplish the third aspect of the present object, the third invention comprises: input means for inputting first image data; memory means for storing the first image data; means for executing a proper process to the first image data; input means for inputting second image data; and means for modulating a concentration of the second image data by an output from the means for executing the proper process.

The above and other objects and features of the present invention will become more fully apparent from the following detailed description of the preferred embodiments with reference to the accompanying drawings.

FIG. 1 is a whole block diagram of an image processing apparatus of the first embodiment of the present invention;

FIG. 2 is a diagram for explaining a texture processing circuit;

FIG. 3 is an explanatory diagram of an area generating circuit 111;

FIGS. 4A and 4B are diagrams showing a practical example of a texture process;

FIG. 5 is an explanatory diagram of the area generating circuit 111 in the second embodiment of the invention;

FIGS. 6A and 6B are diagrams showing a practical example of a texture process in the second embodiment of the invention;

FIGS. 7A to 7C are diagrams showing the relation between the texture and the modulation pattern;

FIG. 8 is a whole block diagram of an image processing apparatus in the third embodiment of the invention;

FIGS. 9-1 and 9-2 are block diagrams of image modulators;

FIGS. 10-1 and 10-2 are flowcharts for the operation of the image processing apparatus of the third embodiment of the invention;

FIG. 11-1 is a constructional diagram of an RAM for a texture pattern;

FIG. 11-2 is a diagram showing a method of calculating coordinates for a filtering process;

FIG. 11-3 is a diagram showing a practical example of the calculation of the coordinates for the filtering process;

FIG. 12-1 is a diagram showing a range which is subjected to the filtering process;

FIG. 12-2 is a diagram showing an example of a smoothing filter which is used in the filtering process;

FIG. 12-3 is a diagram showing a texture pattern before the filtering process is executed;

FIG. 12-4 is a diagram showing the texture pattern after completion of the filtering process;

FIG. 13-1 is a diagram showing the case where the texture pattern before the filtering process was repeated;

FIG. 13-2 is a diagram showing the case where the texture pattern after completion of the filtering process was repeated;

FIG. 14 is a diagram showing a filter matrix;

FIG. 15 is a diagram showing an algorithm of the fourth embodiment of the invention;

FIGS. 16A to 16C are diagrams for explaining a problem in the conventional texture process;

FIGS. 17A to 17C are diagrams for explaining a practical example of the texture process in the embodiment;

FIGS. 18A and 18B are diagrams showing states of a pattern memory in the fourth embodiment of the invention;

FIG. 19 is a block diagram of the fifth embodiment of the invention;

FIG. 20 is a diagram showing pulses for the texture process according to the fifth embodiment of the invention;

FIG. 21 is a diagram showing counters which are used in the texture process in the fifth embodiment of the invention; and

FIG. 22 is a diagram showing the sixth embodiment of the invention.

FIG. 1 is a block diagram, including a texture process portion of a color copying apparatus as an image processing apparatus of the embodiment. The apparatus of the embodiment comprises: a CPU 108 for processing and calculating which is connected to a CPU bus 117; a ROM 109 in which programs for the texture process and the like are previously stored; a RAM 110 for auxiliary storage which is used as a work area; a CCD 100 to read image data; an A/D conversion unit 101 for converting an analog signal into a digital signal; a color masking unit 102; an undercolor removing unit or undercolor removal unit (hereinafter, simply referred to as an UCR unit) 103 for removing the undercolor from output data 123 of the color masking unit 102; a gradation correction unit 104 on execute the gamma conversion to image data 124; an operation unit 105 to execute various inputs; an image modulator 114 to execute the texture process on the basis of image data 120 and data from RAM 113; an area generation circuit 111 to generate an area signal (particularly, the area signal is used as an enable signal of a counter 112 and an enable signal of the texture process in image modulator 114); an enlargement/reduction unit 115 to execute an enlarging/reducing process in the horizontal direction on image data 126; and a printer unit 116 to output a final hard copy. A digitizer 106 is connected to the apparatus through a serial I/F 107.

A color laser beam printer is used as a printer unit 116 in the example. The printer unit 116 sequentially develops the colors of Y (yellow), M (magenta), C (cyan), and K (black) and obtains a full-color image output.

FIG. 3 is an explanatory diagram of the area generation circuit 111. The area designation circuit 111 comprises: a counter 300 which is counted up by the input of an image clock VCK and is reset by the input of a horizontal sync signal HSYNC and outputs a count signal 304; comparators 301 and 302 to indicate an active start point and an active end point of the area signal on the basis of data which is input from the digitizer 106; and a JK flip-flop (JK F/F) 303 which executes toggling operation on the basis of outputs of the two comparators 301 and 302 and generates an area signal, that is, an enable signal 128-1 of the texture process. In the case of using a plurality of area signals 128-1, 128-2, . . . , it is sufficient to provide the plural blocks shown by broken lines equal in number to the areas.

FIG. 2 is a diagram for explaining a texture processing circuit as a characteristic section of the invention. Explanation will now be made individually hereinbelow with respect to a writing unit to write modulation data (texture pattern) 218 into the RAM 113 and a calculating unit (texture processing unit) of data 216 from the RAM 113 and image data 215 which is to be subjected to the texture process.

1. Writing of modulation data (texture pattern) from a CCD

A calculator (1) 201 comprises: luminance to concentration converters for receiving input signals of R (red), G (green), and B (blue) and outputting signals of Y (yellow), M (magenta), and C (cyan); and a YMC mean value circuit. For RGB input signals 122, (Y+M+C)/3, that is, concentration data 219 of eight bits, is obtained. The concentration data 219 is input to the B side of a selector 200. On the other hand, data 120 of eight bits is input to the A side of the selector 200 through the CPU bus 117. This 8-bit data is the video data and is the read image data which is not transmitted through the calculator (1) 201. When data is written into the memory, the selector 200 selects the concentration data on the B side in response to an instruction of the CPU 108. Then, a selector 202 selects its A side.

On the other hand, an OR circuit 207 calculates the OR of the enable signal 128 and the VCK and outputs the result to the B input of selector 208, which selects its B side by an instruction of the CPU 108. To write the modulation pattern into the memory 113, a signal 220 is input as an enable signal to a WE input terminal of the memory 113 and to a driver 203.

A memory address signal is produced by a vertical counter 212 which is counted up synchronously with the horizontal sync signal HSYNC and a horizontal counter 211 which is counted up synchronously with the image clock VCK. A selector 210 selects its B side (output from counters 211 and 212) and the selected memory address signal is input to an address in the memory 113.

As mentioned above, the concentration pattern of the input image is written into the memory 113. In general, for such a pattern, the position of an original is designated by the digitizer 106 and the CCD 100 then the pattern of the designated position is written into the memory 113.

2. Writing of modulation data (texture pattern) from the CPU

In the case where the modulation data from the CPU 108 is written into the memory 113, the selector 202 selects the B side receive as input the CPU data. On the other hand, the selector 208 selects the WE signal of the CPU on the A side. The WE signal is input as a WE signal to the memory 113 and as an enable signal to the driver 203. For the memory address, the CPU address signal on the A side is selected by the selector 210 and is input to an address in the memory 113. In this manner, by switching the addresses in the case where the pattern data from the reader is stored into the memory 113 and the case where the pattern data from the CPU 108 is stored, the pattern data even from any input can be stored. As mentioned above, an arbitrary concentration pattern is written into the memory 113.

The above calculation is realized by a calculator (2) 215. The calculator (2) comprises a multiplier. The calculation using the data 216 and 215 is executed only in the portion where the enable signal 128 generated by the area generation circuit 111 is active, so that the texture process is executed. When the enable signal 218 is in the disable state, the data 215 is set to the through state, so that the image data 126 of eight bits which is not subjected to the texture process is output.

When the texture process is executed on the broken line area of an image as shown in FIG. 4A, the OR of the area signals of .circle. to .circle. is input as an enable signal, so that an output image as shown in FIG. 4B can be obtained. (It is here assumed that the modulation pattern is as shown in FIG. 7B.)

As mentioned above, by calculating the OR of a plurality of area signals, the process to synthesize the same texture pattern can be executed by merely the adding a procedure to designate a plurality of areas.

The calculation to synthesize the data (texture pattern data) 216 of the RAM 113 and the image data 221 is realized by the calculator (2) 215. The calculator (2) comprises a multiplier. The calculation of the data 216 of the calculator and the data 215 is executed in only the portion where the enable signal 218 to control whether the texture process is executed or not is active. When the signal 218 is in the disable state, the data 215 is set to the through state.

The input image data 215 is the data 120 on the A side which is selected by the selector 200, that is, the video data. Another input data 216 is the texture pattern data which is output from the memory 113. In a manner similar to the writing mode, when the data from the memory 113 is read out as well, in the case where pattern data 219 from the CCD has been stored, the address control is executed by using the horizontal counter 211 and vertical counter 212 on the B side of the selector 210. When the pattern data from the CPU 108 has been stored, the CPU address on the A side of the selector 210 is used.

A method of variably magnifying the modulation data (texture pattern data) independently of the input image data will now be described.

The reducing process is executed when image data 217 is written into the memory 113. Data are set into two r.m.p.'s (rate multipliers) 213 and 214 by the CPU 108 so that the image clocks VCK are thinned out by the r.m.p. 213 and the horizontal sync signals HSYNC are thinned out by the r.m.p. 214. Due to this, the counting-up speeds of the horizontal counter 211 and vertical counter 212 become slow, so that the reduced data is written into the memory 113. When the calculation of the data 216 of the RAM 113 and the image data 215 is executed (when the texture process is performed), data are set into the r.m.p.'s 213 and 214 from the CPU 108 so that the VCK and HSYNC are not thinned out, respectively.

On the contrary, when image data is written into the memory 113, data are respectively set into the r.m.p.'s 213 and 214 by the CPU 108 so that the clocks which are not thinned out are set into the two counters.

When the calculation of the data 216 of the RAM 113 and the image data 215 is executed (when the texture process is performed), data are respectively set into the two r.m.p.'s so that the VCK and HSYNC are thinned out. Due to this, the counting-up speeds of the two address counters become slow, so that the texture pattern is modulated in an enlarged form.

Although the same enlarging/reducing processes in the horizontal and vertical directions have been executed in the above embodiment for simplicity of explanation, since an r.m.p. is independently provided for each process, by changing the data which are set into the r.m.p. 213 and 214, it is possible to independently variably magnify in the horizontal and vertical directions in a manner such as to enlarge in only the horizontal direction and to reduce in only the vertical direction, or to reduce in the horizontal direction and to enlarge in only the vertical direction, or the like.

By repeating the counting operations until certain values of the horizontal counter 211 and vertical counter 212, the same pattern is repeated and the texture process can be executed.

On the other hand, a fineness of the repetitive pattern can be arbitrarily determined by means of the above enlarging and reducing processes.

The fundamental construction is similar to FIG. 1. The point of difference relates to a construction of the area generation circuit 111. In this embodiment, the area generation circuit 111 comprises the circuits shown in FIGS. 3 and 5.

FIG. 5 will now be described. The area generation circuit 111 outputs a "1" signal from an AND gate 507 when the area signal generated from the circuit of FIG. 3 is set to 1 and when color separation data R (122-1), G (122-2), and B (122-3) of the input image data lie within a predetermined luminance range which has been preset by the CPU 108. Reference numeral 511 denotes a timing circuit which is provided to synchronize the enable signal 128. With the above construction, from an original as shown in FIG. 6A such that red characters are drawn on a green background, an output image in which the texture process has been executed on only the red character portion as shown in FIG. 6B can be obtained. A modulation pattern as shown in FIG. 7B is used here.

By providing the circuit shown in FIG. 5, the non-rectangular texture process can be executed without using a memory to designate an area although it is difficult to adjust the timing.

As described above, according to the apparatus of this embodiment, the texture process can be easily executed on at least one area, particularly, a non-rectangular area in a real-time manner. The apparatus can be widely applied to the design field.

On the other hand, since the modulation pattern can be variably magnified independently of the image data to be modulated, the image data can be easily modulated by the variably magnified modulation pattern in a real-time manner. This provides the advantage that the apparatus can be widely applied to the design field.

According to the third embodiment of the invention which will be explained hereinlater, by executing a filtering process on an area near the outer frame portion of the pattern image for the texture process, particularly, since the memory unit to store the pattern image has a limited size, in the case where the pattern image must be continuously used or the like, any discontinuity at the joint surfaces of the images in the right/left and upper/lower positions is weakened, thereby enabling the image process to be more continuously executed.

FIG. 8 is a block diagram including the texture process in the image processing apparatus of the third preferred embodiment of the invention. The fundamental construction of the image processing apparatus in the embodiment is also similar to that in FIG. 1. Therefore, the description of each section is omitted.

FIG. 9-1 is a diagram for explaininq a texture processing circuit. Since the construction of FIG. 9-1 is also similar to FIG. 2, its description is omitted.

The image processing apparatus using the invention includes the operation unit (105 in FIG. 8) having: means (key input means) for selecting the texture mode; and means (key input means) for making the effect of the filtering process of the invention operative or inoperative in the texture process. Each means can set, check, and change. When the texture mode is selected by the mode selecting key, the operating mode is set to the texture processing mode from the ordinary processing mode.

The operation of this embodiment of the invention will now be described herein below.

FIG. 10-1 is a flowchart showing an outline of the operation of the apparatus.

First, an operation command is input from the operation unit 105 (step S-400). A check is made to see if the operation command is a copy start command or not. If it is not the copy start command, a check is made to see if the operation command is a texture pattern reading command or not (S-402). If the operation command is the texture pattern reading command (S-403), an original is scanned and the image data obtained is stored in the texture pattern RAM 113 (S-408). On the other hand, if the operating command is not the reading command, a check is made to see if the operating command indicates to execute an other process or not (S-405). If YES, the other process is executed (S-407). When the reading operation is finished, if the execution of the filtering process has not been set (S-410), the apparatus again waits for the input of the operation command (S-400). If the execution of the filtering process has been set (S-409), the filtering process as will be explained hereinafter is performed.

A general filter of an average in a block as shown in FIG. 12-2 is used as a smoothing filter.

For instance, it is now assumed that the size of RAM 113 for the texture pattern is set to 512 dots.times.512 dots as shown in FIG. 11-1.

When executing the filtering process on the contents of the RAM 113 using a matrix of 3.times.3, the address calculations of the memory are as shown in FIG. 11-2.

FIG. 11-2 shows a matrix of 3.times.3 indicative of the addresses in the memory.

If all of a total of nine pixels (3.times.3) which are used in the filtering process lie within an area of 512 dots.times.512 dots, the filtering process can be directly executed. However, in the case of filtering the outer peripheral portion of the texture pattern, some of the nine pixels are out of the area of 512 dots.times.512 dots. Therefore, in such a case, the address calculations are executed by setting as follows with respect to the x and y directions, respectively, ##EQU1## Due to this, unnecessary lines among the repetitive patterns in the repetition of the texture pattern as shown in FIG. 13-1 can be prevented (FIG. 13-2).

FIG. 11-3 shows a practical example. As shown in the diagram, to execute the filtering process on (1, 1), it is necessary to use the texture data of x=512 or y=512. Therefore, all of the texture data are first stored into the RAM 113 and some of the texture data which are necessary to the filtering process are input to the CPU 108 and calculated on the basis of the address calculations mentioned above. That is, when the images each having the size of 512 dots.times.512 dots are arranged, the calculation is executed with respect to the adjacent pixels at the edges of the image patterns.

The operation which is executed in the circuit of FIG. 9-1 will be described with reference to a flowchart for the CPU 108 in FIG. 10-2. The texture pattern data which was set through the selector 202 is now stored in the RAM 113. First, the first block data of 3.times.3 pixels (FIG. 12-2) is read out of the RAM 113 and is input to the CPU 108 through the drivers 204 and 206 (S-500). The calculation is executed in accordance with the smoothing calculating equation shown in FIG. 12-2 (S-501). The result of the calculation is written as a value of a central pixel e into the RAM 113 through the driver 205, selector 202, and driver 203 (S-502). In the address control of the RAM 113 in such a case, an address control signal of the CPU 108 on the A side of the selector 210 is used. The above calculation is sequentially executed (S-503) with respect to the hatched area in FIG. 12-1, which will be explained later, that is, the peripheral area of the texture pattern.

In the above example, the smoothing calculation has been performed for every pixel (refer to S-503). However, it is also possible to construct the device such that all of the data in the RAM 113 are read out and input to the CPU 08 and the calculations are executed in a lump and the results of the calculations are sequentially written into the RAM 113. On the other hand, as shown in FIG. 9-2, it is also possible to construct it in a manner such that a smoothing circuit 600 to execute the smoothing calculation as shown in FIG. 12-2 is provided for the hardware construction and the enable control is performed by the CPU 108 so as to execute the smoothing process with respect to a predetermined area.

The filtering process is executed on the area near the outer frame of the texture pattern as shown in FIG. 12-1. The filtering process is performed on only the portion in a range from the pixel of the outermost position to the pixel which is inside therefrom by only a proper number of pixels. If the width of such portion is narrowed, the effect decreases. However, if the width is set to be too wide, the effect of the texture process is reduced. The width corresponding to the number of pixels can be set to be large or small by the operation unit 105. The CPU 108 changes the size of area which is subjected to the smoothing process in accordance with the setting of such a width by the operation unit 105. FIG. 12-4 shows the result in the case where the area near the outer frame of the pattern shown in FIG. 12-3 has been subjected to the filtering process. FIGS. 13-1 and

10 13-2 show the patterns in which the areas subjected to the filtering process are repetitively arranged. Although the drawings relate to the case where the pattern has been repeated only in the lateral direction, the effect similar to the case of the lateral direction can be also obtained with regard to the vertical direction.

On the other hand, if the operation command is a copy start command (S-401), a check is made to see if the texture process has been selected or not. If the texture process has been selected (S-412), the image modulator 114 is made operative. If the texture process is not selected (S-413), the operating mode of the image modulator 114 is s t to the image through mode and the ordinary original reading operation is executed (S-416).

In this embodiment, the matrix of size 3.times.3 has been used to execute the filtering process. However, the matrix size is not limited to 3.times.3. A matrix of size 5.times.5, 7.times.7, or the like can be also used.

The width of the area which is subjected to the filtering process, that is, the width of the hatched area of FIG. 12-1 can be properly determined in accordance with a degree of a desired filtering effect. On the other hand, it is also possible to execute the filtering process in only the vertical or the lateral direction.

Further, the kind of filter is not limited to the average in the matrix but can be also set to the maximum value (FIG. 8), minimum value, or the like in the matrix.

As mentioned above, according to the embodiment, as the result of that a sample image for the texture process was repetitively arranged, if the joint surfaces of the sample images become unnatural, by executing the filtering process on the outside frame portion of the sample image, a situation such that the process unnaturally changes at the joint surfaces can be avoided. Even in the case where the memory size of the sample image is relatively small, the natural texture effect can be also derived.

As described above, according to this embodiment, by providing,

inputting means (CCD 100 or the like) for inputting first image data,

memory means (RAM 113) for storing the first image data,

means (image modulator 114) for executing the filtering process to the first image data, and

means (image modulator 114) for modulating a concentration of the second image data by an output from the means for executing the filtering process,

the generation of the lines of the concentration difference due to a sudden change in concentration when the concentration modulation is executed on the image data can be prevented.

The above embodiment has been described with respect to the filtering process in the case of executing the texture process by using a repetitive pattern. However, even in the case of using the repetitive pattern, when the texture process is executed to a part of the original image, an effect such that the boundary with the non-processing portion becomes smooth can be obtained.

In a manner similar to embodiment 3, embodiment 4 also is intended to prevent the concentration different lines which are generated when a texture pattern is repeated. In the embodiment, such an object is accomplished by the folding-back process of the data in the texture pattern memory 113.

A whole construction of the fourth embodiment of the invention is similar to FIG. 1. In addition, since the circuits to execute the texture process are also substantially similar to those in FIG. 3, their descriptions are omitted.

FIG. 15 is a diagram for explaining an algorithm of the embodiment.

In step 1, a concentration pattern (texture pattern) of an original put on an original base is read. The reading operation is similar to that in the case of the first embodiment.

In step 2, a folding-back operation, which will be explained later, is executed on contents of the memory into which the read pattern was stored. A pattern which is point symmetrical with respect the center of the memory as an origin is formed. FIGS. 17A to 17C, 18A, and 18B are diagrams for explaining a practical example.

Assuming that the pattern memory size is set to n x m, first, the following substitution is executed (FIG. 18A),

where, x=1 to n/2, y=1 to m/2

Thus, the content of the pattern memory becomes as shown in FIG. 17B.

Next, the following substitution is performed (FIG. 18B),

where, x=1 to n, y=1 to m/2

Thus, the content of the pattern memory becomes as shown in FIG. 17C. A pattern which is point symmetrical with respect to the center of the memory as an origin is produced. The above process is executed in accordance with a procedure of the program of the CPU 108. The operation of the texture processing circuit (FIG. 2) is similar to the case of the embodiment 3.

In step 3, the texture process is executed by the pattern produced.

In the pattern produced, the concentrations of the left, right, upper, and lower edges are equally repeated. Even if the patterns are arranged in the upper, lower, right, and left positions, no concentration variation occurs at the boundaries.

Therefore, if the texture process is executed by using the produced pattern, even if a texture pattern of a limit size is used, the texture process such as not to cause any concentration different line at the boundaries is executed and a good image pattern can be output.

That is, for instance, if the texture pattern as shown in FIG. 16A is read, the texture process is executed by the pattern as shown in FIG. 16C.

In this embodiment, a point symmetrical pattern has been used as a pattern for the concentration modulation. However, by executing the similar process, a line symmetrical pattern is generated and the concentration modulation can be also executed on the basis of the line symmetrical pattern. In this case, it is possible to execute the texture process having no concentration different line with respect to at least either the vertical or lateral direction.

Embodiment 5 relates to the case where when a texture pattern is read, that is, when the concentration modulation is executed, a pattern which is point symmetrical with respect to the center of the pattern as an origin is read out.

The fundamental system of embodiment 5 is substantially the same as the fourth embodiment and can be realized by replacing the horizontal counter 211 and vertical counter 212 in FIG. 3 with counters shown in FIG. 19.

The system of FIG. 19 comprises: a horizontal up counter 801; a horizontal down counter 802; a vertical up counter 803; a vertical down counter 804; OR gates 805, 806, 807, 811, and 817; AND gates 810 and 816; EXOR gates 813 and 819; frequency demultipliers 808 and 814; D flip-flops (D F/F) 809 and 815; and selectors 812 and 818.

Since horizontal and vertical counters have substantially the same construction except that the clocks are different, explanation will now be made by using the horizontal counters hereinafter.

Assuming that the texture pattern has a size of n.times.m, first, when the address of the up counter is equal to or larger than the length of 1/2 of the pattern size (until n/2 in the horizontal direction), a waveform is formed by the frequency demultiplier so as to select the address of the down counter by a selector (a (a') in FIG. 20). At the changing point of the selection of the counter, the values set by the CPU 108 are loaded into the counters, respectively, (load pulse in FIG. 20). Practically speaking, .phi. is loaded into the horizontal up counter 801 and n/2 is loaded into the horizontal down counter 802.

FIG. 21 is a diagram showing the case where the above operation is applied in the horizontal and vertical directions. Due to this, even if the pattern of FIG. 17A is the read pattern, a pattern as shown in FIG. 17C can be read out.

When the pattern is read, by using .phi. as a register value which is set into the gates 810, 811, 816, and 817, the horizontal up counter and the vertical up counter are selected, so that the ordinary pattern is read.

As described above, by generating a pattern which is point symmetrical with respect to the center of a texture pattern of a limited size, it is possible to provide a cheap image processing apparatus of a high performance which can reduce the concentration diffferent line of the boundary portions which are generated in the case of executing the texture process to an area larger than the size of the pattern memory by using the pattern memory of the limited size.

In the above embodiments 1 to 5, the concentration modulation has been executed on multivalue color image data by using the multivalue single color concentration data. However, in the sixth embodiment, the concentration modulation is executed by using the multivalue color image data.

Therefore, as shown in FIG. 22, in the sixth embodiment, the texture processing unit in FIG. 2, from which the calculator (1) to execute the mean value process of each color component is omitted, is provided for each color component of R, G, and B (900, 901, 902), thereby enabling the texture process to be executed for every color component. Each of the texture processing units 900 to 902 has a construction similar to that FIG. 2. The address signal of the memory and the enable signal can be commonly used for the R, G, and B signals. In such a case, the counters and the like can be commonly used.

This embodiment can be also applied to embodiments 1 to 5. According to embodiment 6, since the mutual calculations among the multivalue color image data are executed, the effect of the texture process becomes typical.

A printer which can output a color image such as a color laser printer, color ink jet printer, color dot printer, color thermal copy transfer printer, color printer using a recording material responsive to three primary colors of light, etc. can be used as a printer unit 116 which is used in the invention.

In these embodiments, the construction of the texture process for executing the concentration modulation to the color image input in a real-time manner has been shown. However, a white and black image may be also used as an image which is subjected to the texture process.

In the above embodiments, both of the texture pattern and the image to be texture processed use multivalue data. However, either one or both of them can use binary data.

Various kinds of arithmetic operating circuits such as adders, AND circuits, OR circuits etc. can be also used in place of the multipliers.

Also, the method of forming the pattern data is not limited to (R+G+B)/3. That is, the pattern data can be formed on the basis of the maximum or minimum value among the R, G, and B signals.

Image inputting means is not limited to the CCD but, for instance, external inputting means such as still video camera, video camera, or the like can be also used.

The memory to store the pattern data is not limited to the RAM but memory means such as a magnetic disk or the like can be also used.

The present invention is not limited to the foregoing embodiments but many modifications and variations are possible within the spirit and scope of the appended claims of the invention.