Three Stage Switching Apparatus

The present invention relates to a three stage switching apparatus and, more particularly, to a network of a three stage switching apparatus and its structure.

Three stage switching networks are often used as switching networks having N input terminals and N output terminals and freely connecting the input and output terminals. An example of a three stage switching network is described in "A Study of Non-Blocking Switching Networks" on BELL SYSTEM TECHNICAL JOURNAL Vol. 32, No. 2, pp. 406 to 424. As described in this paper, a switching network can be conveniently applied to a large telephone switching system since the larger the number N of input/output terminals, the smaller the number of crosspoints than N.sup.2.

However, in the conventional three stage switching networks, redundancy is not considered. Therefore, even when a single switch is failed, one of the most important functions of a switching network to connect arbitrary input and output terminals is lost.

In a conventional switching system having a three stage switching network, since printed circuit boards constituting the respective stages are connected to each other through a back wired board, the number of signal lines is limited and the wiring is complex.

It is an object of the present invention to provide a three stage switching network wherein the above drawbacks of the conventional technique are removed and its function is not degraded even if one of its switches is failed.

It is another object of the present invention to provide a three stage switching apparatus wherein wiring can be easily performed even when the number of signal lines is increased.

The three stage switching apparatus according to the present invention has first, second, third stage networks between N input terminals and N output terminals and comprises: at least N/n first matrix switches constituting the first stage, each of the first matrix switches having n input lines connected to the N input terminals in one-to-one correspondence and at least 2n-1 output lines, the input and output lines of each of the first matrix switches being internally, freely connected to each other, at least 2n-1 second matrix switches constituting the second stage, each of the second matrix switches having input lines of the same number as that of the first matrix switches and at least N/n output lines, the input and output lines of each of the second matrix switches being internally, freely connected to each other, at least N/n third matrix switches constituting the third stage, each of the third matrix switches having input lines of the same number as that of the second matrix switches and n output lines, the input and output lines of each of the third matrix switches being internally, freely connected to each other, and means for connecting the input terminals and the first matrix switches, the first matrix switches and the second matrix switches, the second matrix switches and the third matrix switches, and the third matrix switches and the output terminals such that the number of paths connecting arbitrary one of the input terminals and arbitrary one of the output terminals is 2n.

The three stage switching apparatus according to the present invention also comprises: a plurality of first printed circuit boards respectively having first matrix switches of a first stage, arranged to be parallel to each other, and having fixed output ends of the first matrix switches, a plurality of second printed circuit boards respectively having second matrix switches of a second stage, arranged to be parallel to each other, and having fixed input and output ends of the second matrix switches so as to be perpendicular to the plurality of first printed circuit boards, a plurality of third printed circuit boards respectively having third matrix switches of a third stage, and fixed input ends of the third matrix switches so as to be perpendicular to the plurality of second printed circuit boards, a first connector for supporting the output ends of the first printed circuit boards and the input ends of the second printed circuit board and electrically connecting the first and second matrix switches, and a second connector for supporting the output ends of the second printed circuit board and the input ends of the third printed circuit board and electrically connecting the second and third matrix switches.

FIG. 1 is a block diagram of a circuit arrangement according to an embodiment of the present invention;

FIG. 2 is a block diagram of a circuit arrangement according to another embodiment of the present invention;

FIG. 3 is a block diagram of a circuit arrangement according to still another embodiment of the present invention; and

FIG. 4 is a perspective view schematically showing the structure of the apparatus of the present invention.

Preferred Embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a three stage switching network according to an embodiment of the present invention.

Referring to FIG. 1, the three stage switching network has N input terminals T.sub.1 to T.sub.N, N output terminals E.sub.1 to E.sub.N, and first, second, and third stages provided between the input and output terminals T.sub.1 to T.sub.N and E.sub.1 to E.sub.N.

The input terminals T.sub.1 to T.sub.N are divided into N/n groups each having n input terminals T.sub.ni-(n-1) to T.sub.ni (i=1 to N). Each input terminal group i corresponds to a first stage matrix switch 1.sub.i which has the same number i same as the group i.

The output terminals E.sub.1 to E.sub.N are divided into N/n groups each having n output terminals E.sub.ni-(n-1) to E.sub.ni (i=1 to N). Each output terminal group i corresponds to a third stage matrix switch 3.sub.i which has the same number i same as the group i.

The first stage comprises N/n matrix switches 1.sub.1 to 1.sub.N/n. Each matrix switch 1.sub.i (i=1 to N/n) has n input lines G.sub.1 to G.sub.n respectively connected to the input terminals T.sub.ni-(n-1) to T.sub.ni and 2n-1 output lines A.sub.1 to A.sub.(2n-1). An input line G.sub.j (j is an arbitrary number) and an output line A.sub.k (k is an arbitrary number) are internally, freely connected in each matrix switch 1.sub.i.

The second stage comprises (2n-1) matrix switches 2.sub.1 to 2.sub.(2n-1). Each matrix switch 2.sub.i (i=1 to 2n-1) has N/n input lines B.sub.1 to B.sub.N/n and (N/n)+1 output lines C.sub.1 to C.sub.(N/n)+1. An input line B.sub.j and an output line C.sub.k are internally, freely connected in each matrix switch 2.sub.i. The output lines A.sub.1 to A.sub.(2n-1) of the matrix switch 1.sub.i (i=1 to N/n) are connected to the matrix switches 2.sub.1 to 2.sub.(2n-1) in one-to-one correspondence, and the input lines B.sub.1 to B.sub.N/n of the matrix switch 2.sub.j (j=1 to 2n-1) are connected to the matrix switches 1.sub.1 to 1.sub.N/n in one-to-one correspondence between the first and second stages.

The third stage comprises (N/n)+1 matrix switches 3.sub.1 to 3.sub.(N/n)+1. Each matrix switch 3.sub.i (i=1 to (N/n)+1 has (2n-1) input lines D.sub.1 to D.sub.(2n-1) and n output lines F.sub.1 to F.sub.n. An input line D.sub.j and an output line F.sub.k are internally, freely connected in each matrix switch 3.sub.i. The second and third stages are connected to each other such that the output lines C.sub.1 to C.sub.(N/n)+1 of the matrix switch 2.sub.i (i=1 to 2n-1) correspond to the matrix switches 3.sub.1 to 3.sub.(N/n)+1 in one-to-one correspondence and that the input lines D.sub.1 to D.sub.(2n-1) of the matrix switch 3.sub.j (j=1 to (N/n)+1) correspond to the matrix switches 2.sub.1 to 2.sub.(2n-1) in one-to-one correspondence.

N/n switching circuits 4.sub.1 to 4.sub.N/n are provided between the third stage and the output terminals E.sub.1 to E.sub.N. The switching circuits 4.sub.1 to 4.sub.N/n correspond to the matrix switches 3.sub.1 to 3.sub.N/n in one-to-one correspondence, and each switching circuit 4.sub.i is connected to the matrix switches 3.sub.(N/n)+1.

Each of the switching circuits 4.sub.1 to 4.sub.N/n has n switches SW.sub.1 to SW.sub.n. The center taps of the switches SW.sub.1 to SW.sub.n, respectively, of the switching circuit 4.sub.i (i=1 to N/n) are connected to the output terminals E.sub.ni-(n-1) to E.sub.ni, respectively, and respective contacts a thereof are connected to the output lines F.sub.1 to F.sub.n, respectively, of the matrix switch 3.sub.i. Respective contacts b of the switches SW.sub.1 to SW.sub.n of each of the switching circuits 4.sub.1 to 4.sub.N/n are connected to the output lines F.sub.j (j=1 to n) of the matrix switch 3.sub.(N/n)+1. Each of the switches SW.sub.1 to SW.sub.n is switched from the contact a to the contact b or vice versa so that the n output terminals E.sub.ni-(n-1) to E.sub.ni (i=1 to N/n) thereof are connected to the output lines F.sub.1 to F.sub.i of the matrix switch 3.sub.i or the output lines F.sub.1 to F.sub.n of the matrix switch 3.sub.(N/n)+1.

The operation of the three stage switching network shown in FIG. 1 will be described. Assuming that the first stage matrix switch 1.sub.1 connects its input and output lines G.sub.1 and A.sub.1, that the second stage matrix switch 2.sub.1 connects its input and output lines A.sub.1 and C.sub.1, that the third stage matrix switch 3.sub.1 connects its input and output lines D.sub.1 and F.sub.1, and that the switch SW.sub.1 of the switching circuit 4.sub.1 is switched to the contact a, the input and output terminals T.sub.1 and E.sub.1 are connected. In this state, when the third stage matrix switch 3.sub.1 fails, the input and output terminals T.sub.1 and E.sub.1 are disconnected. In this case, when the switch SW.sub.1 of the switching circuit 4.sub.1 is switched to the contact b. At the same time, for example, the matrix switch 3.sub.(N/n)+1 connects its input and output lines D.sub.1 and F.sub.1 . When the second stage matrix switch 2.sub. 1 connects its input and output lines B.sub.1 and C.sub.(N/n)+1, the input and output terminals T.sub.1 and E.sub.1 are connected to each other again.

FIG. 2 shows another embodiment of the present invention. The same reference numerals in FIG. 2 denote the same part as in FIG. 1 and a detailed description thereof is omitted.

The embodiment of FIG. 2 is different from that of FIG. 1 in the following respects. The number of first stage matrix switches is (N/n)+1 which is increased by one. The number of third stage matrix switches is N/n which is decreased by one. Each of 2n-1 second stage matrix switches 5.sub.1 to 5.sub.(2n-1) has input lines B.sub.1 to B.sub.(N/n)+1 corresponding to the matrix switches 1.sub.1 to 1.sub.(N/n)+1 in one-to-one correspondence and output lines C.sub.1 to C.sub.N/n corresponding to the matrix switches 3.sub.1 to 3.sub.N/n in one-to-one correspondence. The switching circuits 4.sub.1 to 4.sub.N/n are provided between the input terminals T.sub.1 to T.sub.N and the first stage.

The operation of the three stage switching network shown in FIG. 2 will be described.

Assume that the input and output terminals T.sub.1 and E.sub.1 are connected to each other in the same manner as in FIG. 1. In this state, if the first stage matrix switch 1.sub.1 fails and the input and output terminals T.sub.1 and E.sub.1 are disconnected, the switch SW.sub.1 of the switching circuit 4.sub.1 is switched from contact a to contact b. The matrix switch 1.sub.(N/n)+1 connects its input and output lines G.sub.1 and A.sub.1, and the matrix switch 5.sub.1 connects its input and output lines B.sub.(N/n)+1 and C.sub.1. As a result, the input and output lines T.sub.1 and E.sub.1 are connected to each other again.

FIG. 3 is a block diagram of a three stage switching network according to still another embodiment of the present invention. The same reference numerals as in FIG. 1 or 2 denote the same parts in FIG. 3 and a detailed description thereof will be omitted.

Referring to FIG. 3, N/n matrix switches 11.sub.1 to 11.sub.N/n constitute a first stage. Each of the matrix switches 11.sub.1 to 11.sub.N/n has n input lines and 2n output lines A.sub.1 to A.sub.2n. The input and output lines of each matrix switch can be internally, freely connected to each other.

2n matrix switches 12.sub.1 to 12.sub.2n constitute a second stage. Each of the matrix switches 12.sub.1 to 12.sub.2n has N/n input lines B.sub.1 to B.sub.N/n and N/n output lines C.sub.1 to C.sub.N/n. The input and output lines of each matrix switch can be internally, freely connected to each other.

N/n matrix switches 13.sub.1 to 13.sub.N/n constitute a third stage. Each of the matrix switches 13.sub.1 to 13.sub.N/n has 2n input lines D.sub.1 to D.sub.2n and n output lines. The input and output liens of each matrix switch can be internally, freely connected to each other.

Connections between the first and second stages and that between the second and third stages are performed in the same manner as described with reference to FIGS. 1 and 2.

In the network shown in FIG. 3, paths of 2n combinations are available for connecting arbitrary one of the input terminals T.sub.1 to T.sub.N and arbitrary one of the output terminals E.sub.1 to E.sub.N, while the number of path combinations necessary for connecting arbitrary input and output terminals is 2n-1 as follows.

(1) When an arbitrary input terminal of the first stage matrix switch is connected, the number of path combinations used by the remaining n-1 input terminals is n-1.

(2) When an arbitrary output terminal of the third stage matrix switch is connected, the number of path combinations used by the remaining n-1 output terminals is n-1.

(3) The number of path combinations for connecting arbitrary input and output terminals is 1.

Therefore, paths of at least (n-1)+(n-1)+1=2n-1 combinations are necessary.

In other words, the three stage switching network shown in FIG. 3 has one end-to-end spare path.

In the three embodiments described above, the number of path combinations for connecting one of the input terminals T.sub.1 to T.sub.N and one of the output terminals E.sub.1 to E.sub.N is 2n. Either network has one spare path and has thus redundancy. In the conventional three stage switching system, the number of output lines of each first stage matrix switch, the number of the second stage matrix switches, and the number of input lines of each third stage matrix switch are 2n-1 each. Therefore, even when one matrix switch of any stage fails, the function of connecting arbitrary input and output terminals is lost. In contrast to this, the three stage switching system of the circuit arrangement of the present invention has a spare path, as described above. Therefore, even when one matrix switch fails, the function of connecting arbitrary input and output terminals is not lost.

FIG. 4 is a perspective view schematically showing a structure of the three stage switching apparatus according to an embodiment of the present invention.

Referring to FIG. 4, printed circuit boards 21.sub.1 to 21.sub.N/n respectively have the first stage matrix switches 11.sub.1 to 11.sub.N/n shown in FIG. 3 and are parallel to each other. One end of each printed circuit board on the output lines A.sub.1 to A.sub.2n side is fixed to a connector 24 and the other end thereof on the input line side is open.

Printed circuit boards 22.sub.1 to 22.sub.2n respectively have the second stage matrix switches 12.sub.1 to 12.sub.2n shown in FIG. 3, are parallel to each other, and are perpendicular to the printed circuit boards 21.sub.1 to 21.sub.N/n. One end of each printed circuit board on the input lines B.sub.1 to B.sub.N/n side is fixed to the connector 24 and the other end thereof on the output lines C.sub.1 to C.sub.N/n side is fixed to a connector 25.

Printed circuits boards 23.sub.1 to 23.sub.N/n respectively have the third stage matrix switches 13.sub.1 to 13.sub.N/n, are parallel to each other, and are perpendicular to the printed circuit boards 22.sub.1 to 22.sub.2n. One end of each printed circuit board on the input lines D.sub.1 to D.sub.2n side is fixed to the connector 25 and the other end thereof is open.

The output lines A.sub.1 to A.sub.2n of the first stage are connected to the input lines B.sub.1 to B.sub.N/n of the second stage through the connector 24, and the output lines C.sub.1 to C.sub.N/n of the second stage are connected to the input lines D.sub.1 to D.sub.2n of the third stage through the connector 25.

In the conventional three stage switching system, since the printed circuit boards are electrically connected to each other using a back wired board, the number of signal lines that can be packaged on the back wired board is limited, and the wiring on the back wired board is complex, resulting in poor electrical characteristics.

In contrast to this, according to the present invention, since the second stage printed circuit boards are three-dimensionally arranged to be perpendicular to the first and third stage printed circuit boards, the connecting points of the respective printed circuit boards are close to each other, and connection of the respective printed circuit boards can be performed easy, resulting in improved electric characteristics.