Hair Curling Appliance Power Control Circuit

The present invention relates to a power control circuit for supplying electrical power from a power source to an electrical appliance having a heating element.

According to the invention there is provided a power control circuit for supplying electrical power from a power source to an electrical appliance having a heating element, the circuit comprising an input for connection to a said power source, an output for connection to a said heating element, and supply means between the input and the output for supplying power at a first, relatively higher level for a predetermined start-up time interval, and at a second, relatively lower level after the predetermined start-up time interval has elapsed.

Preferably, power is supplied continuously to the heating element during the start-up time internal and is supplied intermittently thereafter so as to provide a timeaveraged lower level of power.

More preferably, said supply means comprises first timing means for determining the start-up time interval, and second timing means for providing a signal to control the supply of power to a said heating element.

Preferably, the second timing means is in use inhibited from providing the signal by the first timing means during the start-up time interval.

The invention also provides an electrical hair curler incorporating such a power control circuit.

Other preferred features and advantages of the invention will be apparent from the following description and the accompanying claims.

The invention will now be more particularly described, by way of example only, with reference to the accompanying drawings, in which:

FIG. 1 is a schematic circuit diagram of an embodiment of a power control circuit in accordance with the invention, and

FIG. 2 is a perspective view of an electrical hair curler incorporating the power control circuit of FIG. 1.

In the drawings, FIG. 1 shows an embodiment of a power control circuit 10 in accordance with the invention, for supplying electrical power from a power source V.sub.ac to a heating element HT.sub.1 of an electrical hair curler 20 (FIG. 2) which is also in accordance with the invention. The power control circuit 10 comprises an input 11 for connection to the power supply V.sub.ac, an output 12 for connection to the heating element HT.sub.1, and supply means 13.

The heating element HT.sub.1 is connected in series with a silicon controlled rectifier SCR.sub.1 across the output of a bridge rectifier D.sub.1 -D.sub.4 whose input 11 is connected to the power supply V.sub.ac.

SCR.sub.1 is switched on and off to control the supply of power to the heating element HT.sub.1. Switching of SCR.sub.1 is controlled by a NAND gate A.sub.4 and transistor Q.sub.1. The inputs P.sub.1 and P.sub.2 to NAND gate A.sub.4 are controlled respectively by a turn-on/turn-off circuit 16 and timing circuits 14 and 15. Circuit 16 serves to control the initial turn on of the power control circuit 10 which is operated manually by a user at switch SW.sub.2 and also turned off at switch SW.sub.1. A master timer 17 in circuit 16 switches off the supply of power to heating element HT.sub.1 automatically after a predetermined time interval set by capacitor C.sub.5 and resistor R.sub.8, e.g. after from 30 to 90 minutes, which can be factory set.

On initial turn on at switch SW.sub.2, the first and second timing circuits 14, 15 are, in effect, bypassed and the output from gate A.sub.4 is set low to turn off the transistor Q.sub.1 and hence turn on SCR.sub.1 to supply power continuously to heating element HT.sub.1. Timing circuit 15 comes into effect after a start-up period determined by timing circuit 14. When timing circuit 15 is brought into effect, it controls gate A.sub.4, switching its output alternately high and low, thus turning transistor Q.sub.1 and hence SCR.sub.1 off and on. Hence the time-averaged power fed to heating element HT.sub.1 is reduced according to the on-off time of SCR.sub.1.

The power control circuit 10 and its operation will now be described in more detail.

First timing means 14 includes a capacitor C.sub.4, a charging path a-b formed by a diode D.sub.10 and a resistor R.sub.12 for the capacitor C.sub.4, and a discharging path c-d formed by a diode D.sub.9 and a resistor R.sub.11 for the capacitor C.sub.4. The second timing means 15 is an oscillator which includes a logic NAND gate A.sub.3, a capacitor C.sub.3, a charging path e-f formed by a diode D.sub.6 and a resistor R.sub.10 for the capacitor C.sub.3, and a path g-h formed by a resistor R.sub.9 through which the capacitor C.sub.3 can be charged or discharged.

The NAND gate A.sub.3 has an output P.sub.4 and two inputs P.sub.5 and P.sub.6 to which the capacitors C.sub.4 and C.sub.3 respectively are connected. The two paths e-f and g-h are both connected across the input P.sub.6 and the output P.sub.4 of the NAND gate A.sub.3 so that the second timing means will oscillate, i.e. the capacitor C.sub.3 charging and discharging alternately, when the input P.sub.5 is at logic high.

The output signal of the second timing means 15 is taken at the output P.sub.4 of the NAND gate A.sub.3, and is in turn fed to an input P.sub.2 of a logic NAND gate A.sub.4. An output P.sub.3 of the NAND gate A.sub.4 serves to provide a firing signal which is fed to an inverter formed by a NPN transistor Q.sub.1 and resistors R.sub.3, R.sub.4, R.sub.5 and R.sub.6, connected in the usual manner. The inverted firing signal is taken at circuit node i between the two resistors R.sub.4 and R.sub.5, and is fed to the gate terminal of a silicon-controlled rectifier SCR.sub.1.

The SCR.sub.1 and the heating element HT.sub.1 are connected in series across the anode and cathode of a bridge rectifier D.sub.1 -D.sub.4. The two a.c. inputs of the bridge rectifier D.sub.1 -D.sub.4 serve as the input 11 of the power control circuit 10, and the bridge rectifier D.sub.1 -D.sub.4 converts an a.c. voltage received from the power source V.sub.ac into a pulsating d.c. voltage, which is in turn fed by means of a diode D.sub.11 and a resistor R.sub.2 to a smoothing capacitor C.sub.1. A zener diode D.sub.5 is connected across the capacitor C.sub.1 for limiting and stabilising the d.c. voltage which is in turn applied to the heating element HT.sub.1 by means of the SCR.sub.1.

Two fuses F.sub.1 and F.sub.2 are connected respectively at the anode and cathode of the rectifier SCR.sub.1 for protection. A neon indicator lamp N.sub.1 is connected in series with a resistor R.sub.1 across the heating element HT.sub.1 for indicating when power is being supplied to the heating element HT.sub.1, i.e. when SCR.sub.1 is conducting.

The supply means 13 further comprises a NAND gate A.sub.2, third timing means 17 and manually operable switch means 18 for controlling the operation thereof. The NAND gate A.sub.2 is connected at its output P.sub.10 to circuit nodes a and c for controlling the charging and discharging of the capacitor C.sub.4, and to an input P.sub.1 of the NAND gate A.sub.4 for controlling the provision of the firing signal by the NAND gate A.sub.4.

The third timing means 17 includes a capacitor C.sub.5 and a charging path f-j for the capacitor C.sub.5, the charging path f-j consisting of a diode D.sub.7 and a resistor R.sub.8. Through the path f-j, the capacitor C.sub.5 can be charged whenever the output P.sub.4 of the NAND gate A.sub.3 is at logic high. The capacitor C.sub.5 is connected to inputs P.sub.8 and P.sub.9 of the NAND gate A.sub.2.

A pushbutton switch SW.sub.2 is connected across the capacitor C.sub.5 for quick discharging of the capacitor C.sub.5 as hereinafter described.

The manually operable switch means 18 includes a capacitor C.sub.2, a pushbutton switch SW.sub.1 connected across the capacitor C.sub.2, a resistor R.sub.7 connecting the capacitor C.sub.2 to voltage source V.sub.DD, a logic NAND gate A.sub.1 connected at its inputs P.sub.12 and P.sub.13 to the capacitor C.sub.2, and a diode D.sub.8 connecting an output P.sub.11 of the NAND gate A.sub.1 to the capacitor C.sub.5.

FIG. 2 shows an electrical hair curler 20 having a handle 21 in which the power control circuit 10 is housed. Otherwise the curler 20 is of conventional construction and comprises a rod-shaped body 22 in which the heating element HT.sub.1 of the circuit 10 is located, and a plate 23 hinged to the body 22, the plate 23 being co-operable with the body 22 to grip hair. The two switches SW.sub.1 and SW.sub.2 and the indicator lamp N.sub.1 are located on the handle 21, and the input 11 of the circuit 10 is connected to a power plug 24 by means of wire leads 25.

In use, the power plug 24 is connected to the power source V.sub.ac, and immediately the inputs P.sub.12 and P.sub.13 of the NAND gate A.sub.1 are effectively earthed by the capacitor C.sub.2, which initially is fully discharged. The output P.sub.11 of the NAND gate A.sub.1 is therefore initially at logic high, and this initiates quick charging up of the capacitor C.sub.5, causing the output P.sub.10 of the NAND gate A.sub.2 to go logic low almost instantaneously. This causes the NAND gate A.sub.4 to provide a logic high output, and which in turn turns on the transistor Q.sub.1 to inhibit the conduction of the SCR.sub.1. As a result, the heating element HT.sub.1 is not energised.

When the power source V.sub.ac is connected, the capacitor C.sub.2 starts to be charged through resistor R.sub.7. Resistor R.sub.7 and capacitor C.sub.2 are arranged so that approximately 1 second later capacitor C.sub.2 will be fully charged after connection to V.sub.ac, causing the output P.sub.11 of the NAND gate A.sub.1 to go logic low. Under this condition, the manually operable switch means 18 will have no further effect on the capacitor C.sub.5 until it is manually activated.

To energise the heating element HT.sub.1, the switch SW.sub.2 is momentarily closed to discharge quickly the capacitor C.sub.5, whereupon the output P.sub.10 of the NAND gate A.sub.2 goes logic high. The capacitor C.sub.4 starts to be charged via the charging path a-b from substantially ground level. As the input P.sub.5 of the NAND gate A.sub.3 is effectively earthed, by the as yet fully discharged capacitor C.sub.4, the second timing means 15 will be controlled by the first timing means 14 to continue to provide a logic high output at the output P.sub.4 of the NAND gate A.sub.3. At this time, the inputs P.sub.1 and P.sub.2 of the NAND gate A.sub.4 are both at logic high, and the NAND gate A.sub.4 provides a logic low output. This causes the transistor Q.sub.1 to turn off, and which in turn causes the SCR.sub.1 to conduct to apply continuously the rectified d.c. voltage to the heating element HT.sub.1.

This operating condition continues until the capacitor C.sub.4 is sufficiently charged to provide a logic high capacitor voltage after a certain start-up time interval has elapsed, which is determined by the values of the resistor R.sub.12 and the capacitor C.sub.4. At this time the capacitor C.sub.4 raises the input P.sub.5 of the NAND gate A.sub.3 to logic high level.

When the output P.sub.4 of the NAND gate A.sub.3 is at logic high, the capacitor C.sub.3 will be charged via the paths e-f and g-h until it is sufficiently charged to raise the logic input P.sub.6 applied to the NAND gate A.sub.3 to logic high. At this time, the output P.sub.4 of the NAND gate A.sub.3 goes logic low. The capacitor C.sub.3 starts to discharge via the discharging path g-h until it discharges sufficiently to lower the logic input P.sub.6 applied to the NAND gate A.sub.3 to logic low, whereupon the capacitor C.sub.3 starts to be charged again as the logic output of the NAND gate A.sub.3 is now at logic high. Therefore, the second timing means 15 oscillates to provide an alternating logic signal at the output P.sub.4 of the NAND gate A.sub.3, and hence at the output P.sub.3 of the NAND gate A.sub.4.

As described above, the SCR.sub.1 will conduct when the output P.sub.3 of the NAND gate A.sub.4 is at logic low, and will not conduct when the output P.sub.3 is at logic high. It follows that the SCR.sub.1 will switch between conducting and non-conducting states when the second timer means 15 oscillates.

It is apparent that the SCR.sub.1 will conduct continuously during the start-up time interval, and in duty cycles thereafter controlled by second timing means 15. The heating element HT.sub.1 will therefore receive full power during the start-up time interval in order to reach its operating temperature as quickly as possible, and will receive reduced power thereafter in order to maintain the operating temperature. In this particular embodiment, the start-up time interval can be set from 30 to 90 seconds by the resistor R.sub.12, and the full power and the reduced, operating power ratings are arranged respectively to be 80W and 20W, the latter being provided by the second timing means 15 at an output signal of mark-to-space ratio of 1:3.

Immediately after the switch SW.sub.2 is momentarily closed, the capacitor C.sub.5 is graduately charged via the charging path f-j whenever the output P.sub.4 of the NAND gate A.sub.3 is at logic high. When the capacitor C.sub.5 is eventually charged to provide a logic high capacitor voltage, the output P.sub.10 of the NAND gate A.sub.2 will go logic low, and in turn the output P.sub.3 of the NAND gate A.sub.4 will go logic high, inhibiting the conduction of the SCR.sub.1. Therefore, the heating element HT.sub.1 will automatically be switched off after having been energised for a certain period of time. In this particular embodiment, this time period can be set in the range of 60.+-.15 minutes by the resistor R.sub.8.

The heating element HT.sub.1 can also be switched off manually by momentarily closing the switch SW.sub.1. When the switch SW.sub.1 is closed, the capacitor C.sub.2 will be quickly discharged so as to produce a logic high output at the output P.sub.11 of the NAND gate A.sub.1, and which in turn quickly charges up the capacitor C.sub.5 to provide a logic high capacitor voltage. Accordingly, the heating element HT.sub.1 will be switched off.

After the heating element HT.sub.1 has been switched off, either automatically or manually, the capacitor C.sub.4 will discharge via the discharging path c-d. It is apparent that the heating element HT.sub.1 can be switched again by momentarily closing the switch SW.sub.2.

The invention is described by way of example only, and various modifications may be made without departing from the scope of the invention.