Control Circuit for a Vibration Wave Motor

1. Field of the Invention

The present invention relates to a drive circuit for a vibration wave motor.

2. Related Background Art

In the past, in order to control a speed of a vibration wave motor, a drive frequency is changed or a drive voltage is changed.

In the former method, in order to control the speed over a wide range, the drive frequency must be changed from a high frequency far from a resonance frequency of the motor. On the other hand, the drive efficiency of a vibration wave motor is high for a predetermined range of frequencies near the resonance frequency, but when the motor is driven at a frequency far from the near-resonance frequency, the drive efficiency decreases. Thus, it is difficult to drive the motor at a high efficiency over the entire speed range.

In the latter method, a power supply which varies over a wide range is required and a power supply circuit is complex and of large size.

Thus, it may be proposed to change a combination of drive frequency and voltage to control the speed over a wide range in a frequency band which permits a high drive efficiency. However, it is not possible to continuously change the motor speed by simple combination of the frequency and the voltage.

For example, the frequency is changed from a first frequency to second frequency at a first voltage to set the motor speed to a first speed at the first frequency and to a second speed at the second frequency so that the motor speed is controlled between the first and second speeds by the combination of the first voltage and the first to second frequencies, and when the voltage is changed to a second voltage level, the motor speed is changed from the second speed to a third speed by the above frequency change at the second voltage. In this case, the following problem arises at the voltage switching point.

If the frequency is changed to the second frequency under the first voltage level to change the motor speed to the second speed and then the voltage is changed to the second voltage level to shift the motor speed toward the third speed, the voltage is set at the second level and the frequency is set at the second frequency. As a result, the motor speed is switched from the second speed to the third speed by the switching of the voltage level and a continuous change from the second speed to the third speed is not attained.

It is an object of the invention to provide a vibration wave motor control circuit which a drive frequency is changed from a first frequency toward a second frequency while a signal level applied to the motor is at a first level to vary a motor speed from a first speed to a second speed, and when the frequency reaches the second frequency, the signal level is switched from the first level to a second level, and the frequency is shifted from the second frequency by a predetermined amount toward the first frequency, and when the signal level reaches the second level, the frequency is again shifted from the shifted frequency toward the second frequency so that the motor speed is varied between the second speed and a third speed.

In accordance with one aspect of the present invention, the drive state of the motor is monitored, and when the frequency reaches a resonance or near-resonance frequency, the frequency is shifted and the signal level is switched.

It is another object of the present invention to provide a vibration wave motor in which first and second voltage levels are set for a drive voltage of the vibration wave motor, a frequency of the drive voltage is variable between first and second frequencies near a resonance frequency, the frequency at the first voltage level is changed between the first and second frequencies to vary a motor speed between a first speed and a second speed, and the frequency at the second voltage level is changed in the above range to change the motor speed from the second speed to a third speed, and when the frequency changes from the first frequency to the second frequency, the drive frequency is switched from the first voltage level to the second voltage level and the frequency is shifted from the second frequency to the first frequency. In switching the voltage, the motor speed is not rapidly changed but it may maintain the previous speed and the motor speed is continuously changed over a wide range from the first speed to the third speed.

FIG. 1 shows a sectional view of a vibration wave motor used in the present invention.

FIG. 2 shows an equivalent circuit of the motor of FIG. 1.

FIG. 3 illustrates a speed control characteristic by a drive circuit of a vibration wave motor of the present invention.

FIG. 4 shows an embodiment of the drive circuit of the vibration wave motor of the present invention.

FIG. 5A shows a circuit diagram of a comparator 9 of FIG. 4.

FIG. 5B shows an output wave form of the circuit of FIG. 5A.

FIG. 5C shows a circuit diagram of a shift register 8 of FIG. 4, and

FIG. 6 illustrates a program contained in a computer of FIG. 4.

FIG. 1 is a sectional view of a vibration wave motor as viewed in a circumferential direction. Numeral 1 denotes a rotor, numeral 3 denotes a vibration member, numeral 4 denotes a polarized piezoelectric element attached to the vibration member 3, and numeral 5 denotes electrodes. The vibration member 3 and the piezoelectric element 4 form a stator 2, and the rotor 1 frictionally contacts to the vibration member 3. The piezoelectric element 4 may be substituted by an electrostrictive element.

The electrodes 5a are arranged at an interval of .lambda./2 where .lambda. is a wavelength of a bending travelling wave in the vibration member 3. The electrodes 5b are drive electrodes which are also arranged at the interval of .lambda./2 on the piezoelectric element 4. Numeral 5s denotes a vibration detecting electrode. The drive electrodes 5a and the vibration detecting electrode 5s are positionally shifted by .lambda./2 (that is, in phase). The electrodes 5b and 5s are positionally shifted by 3.lambda./4. A portion of the piezoelectric element to which the drive voltages are applied by the electrodes 5a form a phase A piezoelectric element, and a portion of the piezoelectric element to which the drive voltages are applied by the electrodes 5b form a phase B piezoelectric element. The polarization of the piezoelectric element and the arrangement of the electrodes have been well known and detailed explanation thereof is omitted.

In the above arrangement, when periodic voltages having a phase difference of 90.degree. therebetween are applied to the electrodes 5a and 5b, a travelling vibration wave is generated on the vibration member 3 and the rotor 1 is driven by the vibration wave. When the drive signal to the electrodes 5a is of a resonance frequency fr, a signal waveform from the electrode 5s is -90.degree. phase-shifted from the drive signal to the electrodes 5a,and when the drive signal deviates from the resonance frequency, the phase difference between the electrodes 5a and 5s deviates from -90.degree.. In the present invention, this phase difference is detected to detect the deviation of the drive frequency from the resonance frequency fr.

The phase difference between the signals of the electrodes 5a and 5s deviates from -90.degree. depending on the relative position of the electrodes 5s and 5a. However, since the phase difference between the signals of the electrodes 5a and 5s is in a predetermined relationship if the resonance drive state is maintained, the deviation of the drive frequency from the resonance frequency fr can be detected by detecting the deviation of the phase difference between the signals of the electrodes 5a and 5s from the predetermined phase difference.

FIG. 2 shows an electrical equivalent circuit of the vibration wave motor of FIG. 1, and FIG. 3 shows a characteristic of a driving A.C. signal to the vibration wave motor versus a rated speed to the applied voltage.

FIG. 4 shows an embodiment of a drive circuit for the vibration wave motor of the present invention. Numeral 2 denotes a stator of the vibration wave motor of FIG. 1. Numeral 12 denotes a voltage controlled oscillator which oscillates at a frequency determined by an input voltage, numeral 14 denotes an amplifier and numeral 16 denotes a matching coil. A periodic signal from the oscillator 12 is applied to the electrodes 5a through the amplifier and the coil. Numeral 7 denotes a comparator which shapes a waveform applied from the amplifier 14 through the coil 16 (a voltage waveform applied to the stator of the vibration wave motor) to a pulse signal. Numeral 8 denotes a shift register which shifts the pulse from the comparator 7 by 90.degree.. The pulse from the register 8 is applied to the electrodes 5b through a rotation direction switch 13, an amplifier 15 and a coil 17. In this arrangement, the periodic voltages having the phase differences of 90.degree. are applied to the electrodes 5a and 5b. Numeral 18 denotes an edge-triggered phase comparator. The output of the oscillator 12 is applied to one input of the comparator 18 and an output of a 1/N frequency divider (1/32 frequency divider) 21 is applied to the other input. Numeral 20 denotes a voltage controlled oscillator which generates a frequency determined by the output of the comparator 18 supplied through a lag lead filter 19. The comparator 18 is open when the phase difference between the both input signals thereto is zero to maintain the output of the oscillator 20 as it is. When there is a phase difference between the input signals, the comparator 18 produces a signal having a duty determined by the direction and amount of the phase difference to increase or decrease the output frequency of the voltage controlled oscillator 20.

The phase difference between the output pulse of the oscillator 12 and the output pulse of the frequency divider 21 is detected, and when the phase of the output pulse of the frequency divider 21 retards with respect to the output pulse of the oscillator 12, that is, when the frequency of the output pulse of the frequency divider 21 decreases, the output of the comparator 18 is high for a period corresponding to the phase difference to increase the output frequency of the oscillator 20. When the phase of the output pulse of the frequency divider 21 advances with respect to the output pulse of the output pulse of the oscillator 12, that is, when the frequency of the output pulse of the frequency divider 21 increases, the output of the comparator 18 is low for a period corresponding to the phase difference to decrease the output frequency of the oscillator 20.

In this manner, the two inputs of the comparator 18 are controlled to be in phase so that the output of the frequency divider 21 is in phase with and of the some frequency as the output of the oscillator 12. Accordingly, the output frequency of the oscillator 20 is N (32) of the output frequency of the oscillator 12. Since it is used as a clock signal to the shift register 8, the output of (N/4)th stage of the register 8 is 90.degree. phase-shifted with respect to the output of the oscillator 12. In this manner, the periodic signals having the 90.degree. phase difference and supplied to the electrodes 5b and 5a. A specific configuration of the shift register 8 is shown in FIG. 5c.

Numeral 6 denotes a comparator for shaping the pulse from the electrode 5s to a pulse, and numeral 9 denotes an edge triggered phase comparator which is configured as shown in FIG. 5A. The comparator detects the phases of the pulses at the inputs R.sub.1 and V.sub.1. When the phase at the input R.sub.1 is in advance of the phase at the input V.sub.1 as shown in FIG. 5B, the output V.sub.1 is low for a period corresponding to the phase difference, and when the phase of the input R.sub.1 retards with respect to the phase of the input V.sub.1, the output D.sub.1 is low for a period corresponding to the phase difference. When the phases are same, both the outputs V.sub.1 and D.sub.1 are high.

Numeral 10 denotes an AND gate connected to the outputs V.sub.1 and D.sub.1 of the comparator 9, and numeral 22 denotes a counter having a reset terminal thereof connected to the AND gate 10. When the output of the AND gate 10 is high, the counter 22 is released from the reset state and counts the clock pulse of the oscillator 20. Numeral 24 denotes a numeric information setter, numeral 23 denotes a comparator for comparing the count of the counter 22 with the content of the numeric information setter to produce a high level output when the count is smaller than the content of the setter, numeral 25 denotes a free-running frequency setter of the voltage controlled oscillator, and numeral 27 denotes a microcomputer.

The operation of the embodiment of FIG. 4 is explained with reference to a program shown in FIG. 6. The program is contained in the computer 27.

When a power switch (not shown) is turned on, the program proceeds to a step 1 in which an initial free-running frequency f.sub.o is set into the free-running frequency setter 25. The free-running frequency f.sub.o is set to be sufficiently higher than a mechanical resonance frequency f.sub.r of the vibration wave motor and lower than f.sub.rx (n+1).sup.2 n.sup.2 (where n is the number of waves generated by the motor). The voltage controlled oscillator 12 oscillates at the set frequency f.sub.o. The computer 27 sets a drive voltage Vmin and the voltage switch 26 selects Vmin as the drive voltage.

Under this condition, the clock signal which is N times as high as the output frequency f.sub.o of the oscillator 12 is supplied to the shift register 8 as a shift pulse. Therefore, the signal which is shifted by .+-.90.degree. (.+-.N/4 stages) with respect to the output of the voltage controlled oscillator 12 is applied to the electrode 5b through the amplifier 15 and the coil 17, and the periodic voltages having the 90.degree. phase difference are applied to the electrodes 5a and 5b. In a step 2, the switch 13 is actuated in accordance with forward/ backward rotation information which is set by a switch (not shown) to select .+-.90.degree..

Under this condition, since the periodic signals having the .+-.90.degree. phase difference are applied to the electrodes 5a and 5b, the motor rotates forward or backward. As the motor rotates, a signal is produced from the electrode 5s and it is shaped into a pulse by the comparator 6 and the pulse is applied to the input R.sub.1 of the comparator 9.

At the initial stage of the motor drive, the frequency fo of the oscillator is higher than the resonance frequency and the motor rotates at a minimum rotation speed. The phase of the signal from the electrode 5s which is generated as the motor rotates and the phase of the drive signal of the electrodes 5a have 90.degree. phase difference therebetween when the motor is driven at the resonance frequency, and the phase difference goes away from 90.degree. as the drive frequency deviates from the resonance frequency. The signal V.sub.1 derived from the periodic signal of the electrodes 5a by shifting it by the 90.degree. shift register 8 and the signal R.sub.1 from the electrode 5s are in phase at the resonance state, and the phase difference increases as the drive frequency deviates from the resonance frequency. The output V.sub.1 or D.sub.1 of the comparator 9 is low for a period corresponding to the phase difference, and the output of the AND gate 10 is also low for the period corresponding to the phase difference. At the initial stage, since the frequency f.sub.o of the drive signal is fairly away from the resonance frequency, the period of low output of the AND gate 10 is long and the count of the counter 22 is smaller than the setting. Thus, the comparator 23 produces a high level output.

The computer 27 detects the output of the comparator 23 in a step 4. When it detects the high level output of the comparator 23, the program proceeds to a step 5 where the setting frequency f.sub.o of the selfrunning frequency setter 25 is gradually decreased. That is, the frequency f.sub.o is changed to f.sub.o -f.sub..DELTA.. The steps 4 and 5 are repeated so that the drive signal frequency of the electrodes 5a gradually approaches to the resonance frequency f.sub.rL under the drive voltage Vmin. On the other hand, as the drive frequency approaches to the resonance frequency f.sub.r, the period of low level output of the AND gate 10 gradually decreases and the count of the counter 22 gradually increases.

By the repetition of the steps 2, 3, 4 and 5, the drive frequency of the electrodes 5a gradually decreases, and when it reaches the resonance frequency f.sub.rL, the count of the counter 22 exceeds the setting. Thus, the comparator 23 produces a low level output and the computer 27 responds to the low level output to store the setting frequency of the self-running frequency setter 25. Then, the program proceeds to a step 6 where the status of the drive voltage is detected. Since the drive voltage V.sub.o has been set to Vmin at the initial stage, the program proceeds to a step 7 where n is changed to n+1, and then the program proceeds to a step 8.

In the step 8, the frequency f.sub.o is shifted

by f.sub.s (n)=f.sub.s (1) toward incremental direction with respect to the resonance frequency f.sub.rL under the low voltage Vmin (f.sub.o =f.sub.o +f.sub.s (n)=f.sub.rL +f.sub.s (1)). The frequency f.sub.s (1) is a shift amount of frequency necessary to rotate the motor under the drive voltage Vmax at the same speed as that under the drive voltage Vmin at the resonance frequency f.sub.rL.

In a step 9, f.sub.o =f.sub.o +f.sub.s (n)=f.sub.rL +f.sub.s (1) obtained in the step 8 is stored as f.sub.M (1). In a step 10, the drive voltage V.sub.o is incremented by V.sub..DELTA. to set a new drive voltage V.sub.o =V.sub.o +V.sub..DELTA. =Vmin+ V.sub..DELTA.=Vmax, which is outputted from the switch 26 as a drive voltage.

In the steps 1-10, the frequency gradually changes from f.sub.max under the drive voltage Vmin to the resonance frequency f.sub.rL, the motor speed gradually increases from MS.sub.1 to MS.sub.2, and when the motor speed reaches MS.sub.2, the drive voltage is switched to Vmax and the frequency is switched to f.sub.rL +f.sub.s (1) so that the motor rotates at the speed MS.sub.2.

Since the voltage is switched in the step 10 and the frequency is shifted in the step 9, the motor deviates from the resonance state after it has reached the maximum speed MS.sub.2 under the drive voltage Vmin. As a result, the period of low level output of the AND gate 10 increases and the count of the counter 22 becomes smaller than the setting. Thus, the steps 4 and 5 are again repeated and the drive frequency gradually decreases from f.sub.M (1).

Since the drive voltage is now Vmax, the motor speed gradually increases from MS.sub.2 as the frequency decreases. When the drive frequency reaches the resonance frequency f.sub.rH under the drive voltage Vmax in the repetition of the steps 4 and 5, the comparator 23 produces a low level output. When this is detected in the step 4, the program proceeds to the step 6. Since the drive voltage is now Vmax, the program proceeds to the step 2 from the step 6, and then repeats the steps 2, 4 and 6 so that the motor is driven at the frequency f.sub.rH under the drive voltage Vmax and the motor rotates at the maximum speed MS.sub.3.

After the motor speed has reached MS.sub.2, the frequency under the drive voltage Vmax changes between f.sub.M (1) and f.sub.rH and the motor speed changes from MS.sub.2 to MS.sub.3.

In the present invention, since the drive frequency of the motor is mainly between f.sub.rL +f.sub.s (1) and f.sub.rH, the motor speed can be changed over a wide range with a high drive efficiency.

In the course of speed control (MS.sub.1 -MS.sub.3) in the steps 1-10, if an operator manipulates a fixed command member (not shown), the computer 27 responds thereto and the program branches in the step 3. As a result, the steps 3 and 2 are repeated and the motor rotates at the drive voltage and the frequency when the fixed command member is activated. Accordingly, the motor maintains the current rotation and the operator can select any rotation speed.

The above operation is carried out when an acceleration command to the motor is detected in the step 3. (The acceleration command is issued by the computer 27 by the manipulation of an acceleration/ deceleration command member (not shown)). An operation when the deceleration command has been issued is explained.

The step 3 and then the step 11 are executed to check whether the drive frequency f.sub.o is equal to the stored frequency f.sub.M (1)=f.sub.rL +f.sub.s (1).

Assuming that the deceleration command has been issued while the motor was driven at the maximum speed MS.sub.3, that is, under the drive voltage Vmax and the drive frequency f.sub.rH, the frequency f.sub.rH is not equal to f.sub.M (1) Accordingly, the program proceeds to the step 12 where the drive frequency is incremented by f.DELTA.. Then, the steps 2, 3, 11 and 12 are repeated so that the drive frequency is gradually decreased until it reaches the stored frequency f.sub.M (1) and the motor speed is also gradually decreased from MS.sub.3. When the drive frequency reaches f.sub.M (1), that is, when the motor speed reaches MS.sub.2, the program proceeds to a step 13 where the drive voltage is detected. Since the drive voltage is now Vmax, the program proceeds to a step 14 from the step 12 where the drive frequency is shifted by f.sub.s (1) in a decrement direction. As a result, the drive frequency shifts to f.sub.M (1)-f.sub.s (1)=f.sub.rL +f.sub.s (1)-f.sub.s (1)=f.sub.rL. In a step 15, n is changed to n-1=0. In a step 16, the drive voltage is decreased by V.DELTA.. That is, Vmax-V.DELTA.=Vmin is supplied from the voltage switch 16 as a drive voltage.

The motor speed is thus reduced to MS.sub.2 from MS.sub.3 and then the drive voltage is switched to Vmin and the drive frequency is shifted to f.sub.rL. The steps 2, 3 and 11 are then repeated. Since the frequency has been switched to f.sub.rL in the step 14, f.sub.M (1).noteq.f.sub.rL is detected in the step 11, and the program proceeds to the step 12. Accordingly, the motor speed is decreased to MS.sub.2 and the steps 2, 3, 11 and 12 are repeated under the drive voltage Vmin so that the drive frequency gradually increases from f.sub.rL and the motor is thereafter gradually decelerated. In the course of the deceleration control, when the drive frequency reaches the stored frequency f.sub.M (1)=f.sub.rL +f.sub.s (1)O, the program proceeds to the step 13 where the drive voltage is detected. Since the drive voltage is now Vmin, the steps 2, 3, 11 and 12 are repeated so that the motor is driven at the drive voltage Vmin and the drive frequency f.sub.rL +f.sub.s (1) and the motor maintains the rotation at the current speed MSL.

In this manner, in the deceleration mode, the motor rotates between MS.sub.3 and MSL. In the deceleration mode, since the motor rotates at the drive frequency and the voltage which were present when the operator manipulated the fixed command member, the motor speed can be selected between MS.sub.3 and MSL.

In accordance with the present invention, the motor can be driven between the motor speeds MSL and MS.sub.3 in the drive frequency range between f.sub.rL +f.sub.s (1) and f.sub.rH which permits high efficiency drive.

In the present embodiment, the voltage is switched between two states, high and low, although it may be switched among multiple states such as three or four states.