US 4,928,073 AGrant
DC Amplifier
Issue Date:1990-05-22
•2 Claims
•1 Drawing Sheets
Abstract
A DC amplifier includes first and second transistors, an emitter resistor, and a load resistor. The first and second transistors constitute a differential amplification transistor pair. The emitter resistor is connected between the emitters of the first and second transistors. The load resistor is connected between the collectors of the transistors. The resistance of the load resistor is set to be 1/2 that of the emitter resistor. The emitters of third and fourth transistors equivalent to the first and second transistors are series-connected to the collectors of the first and second transistors through the load resistor. The biases of the third and fourth transistors are set to be close to those of the first and second transistors.
Metadata
Assignee
- Iwatsu Electric Co., Ltd.
Inventors
- Minoru Arai
- Yukihiro Katoh
Application Information
Application Number:US 3388786
Filing Date:1989-04-14
Priority Date:1988-05-07
Art Unit:252
Classifications
IPC:
H03F 345
Field of Search:
330252;261;311;69
Patent Drawings (1 sheets)
Description
Background of the Invention
The present invention relates to a DC differential amplifier and, more particularly, to a highly stable DC amplifier having less temperature dependency and a large margin with respect to changes in gain due to absolute value variations of circuit elements such as transistors and resistors constituting the amplifier.
FIG. 3 shows a typical conventional DC differential amplifier. As shown in FIG. 3, in this amplifier, a pair of transistors Q.sub.1 and Q.sub.2 each having a base as an input terminal constitute a differential amplification transistor pair, and their emitters are connected to each other through an emitter resistor R.sub.E and are connected to a constant voltage source V.sub.E through resistors R.sub.1 and R.sub.2. The collectors of the pair of transistors Q.sub.1 and Q.sub.2 are respectively cascode-connected to the emitters of common base transistors Q.sub.3 and Q.sub.4, and are further connected to to a constant voltage source V.sub.C through load resistors R.sub.L1 and R.sub.L2. In this case, the resistors R.sub.1 and R.sub.2 and the constant voltage V.sub.E have predetermined values so as to cause the transistors Q.sub.1 and Q.sub.2 to be driven by a current source. The transistors Q.sub.3 and Q.sub.4 are cascode-connected to each other so as to reduce the Miller effect. However, A DC operation is kept unchanged without them. Note that reference symbol V.sub.B denotes a constant voltage source for applying a constant bias potential to the bases of the transistors Q.sub.3 and Q.sub.4.
In the amplifier having the above-described arrangement, if a load resistor is represented by R.sub.L =R.sub.L1 =R.sub.L2, input and output voltages are respectively represented by V.sub.in and V.sub.out, and the emitter resistance of the transistor is represented by r.sub.E, an output voltage from the half of the differential amplifier can be given by the following equation:
In this case, if the operation state of the transistor is carefully checked, it is found that an amount of heat generated by the transistor (P.apprxeq.I.sub.C .times.V.sub.CE ; I.sub.C : a collector current; V.sub.CE a voltage between the collector and the emitter) is changed upon application of the input voltage V.sub.in. Upon this change, a slight change (.DELTA.V.sub.BE) of a voltage between the base and emitter of the transistor occurs. This change is equivalent to a further change in input voltage V.sub.in. The output voltage V.sub.out at this time can be represented by the following equation:
As described above, the conventional amplifier cannot be free from the influence of the change .DELTA.V.sub.BE. Note that the change .DELTA.V.sub.BE is generally given as
Summary of the Invention
It is an object of the present invention to provide a DC differential amplifier which is highly stable with respect to temperature changes.
It is another object to provide a DC differential amplifier whose margin with respect to changes in gain due to absolute value variations of circuit elements can be increased.
In order to achieve the above objects, according to the present invention, there is provided a DC amplifier comprising first and second transistors constituting a differential amplification transistor pair, an emitter resistor connected between emitters of the transistors, and a load resistor connected between collectors of the first and second transistors, wherein a resistance of the load resistor is set to be 1/2 that of the emitter resistor, emitters of third and fourth transistors equivalent to the first and second transistors are series-connected to the collectors of the first and second transistors through the load resistor, and biases of the third and fourth transistors are set to be close to those of the first and second transistors.
According to the DC amplifier of the present invention, therefore, an output voltage is not influenced by the base-emitter voltage V.sub.BE of each transistor, so that stability in operation can be increased. In addition, the margin of the amplifier with respect to changes in gain due to absolute value variations of circuit elements such as transistors and resistors constituting the amplifier.
Brief Description of the Drawings
FIG. 1 is a circuit diagram showing a DC amplifier according to an embodiment of the present invention;
FIG. 2 is a circuit diagram showing a DC amplifier according another embodiment of the present invention; and
FIG. 3 is a circuit diagram showing a conventional cascode type differential amplifier.
Detailed Description of the Preferred Embodiments
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
FIG. 1 shows a DC amplifier according to an embodiment of the present invention. Reference symbols Q.sub.1 to Q.sub.6 denote identical NPN transistors; R.sub.1, R.sub.2, R.sub.E, R.sub.L1, and R.sub.L2, resistors; and V.sub.E, V.sub.B, V.sub.BB, and V.sub.C, constant voltage sources.
Referring to FIG. 1, the pair of transistors Q.sub.1 and Q.sub.2 constitute a differential amplification transistor pair, and an input voltage V.sub.in is applied between the bases thereof. The emitters of the transistors Q.sub.1 and Q.sub.2 are connected to the constant voltage source V.sub.E through the resistors R.sub.1 and R.sub.2. At the same time, these emitters are connected to each other through a resistor, i.e., the emitter resistor R.sub.E. The collectors of the pair of transistors Q.sub.1 and Q.sub.2 are respectively cascode-connected to the emitters of common base transistors Q.sub.3 and Q.sub.4. The bases of the transistors Q.sub.3 and Q.sub.4 are commonly connected to the constant voltage source V.sub.B. In addition, the collectors of the transistors Q.sub.3 and Q.sub.4 are respectively connected to the emitters of the transistors Q.sub.5 and Q.sub.6 through the load resistors R.sub.L1 and R.sub.L2. The bases and collectors of the transistors Q.sub.5 and Q.sub.6 are commonly connected to the constant voltage sources V.sub.BB and V.sub.C, respectively. In this case, output terminals are formed between the collectors of the transistors Q.sub.3 and Q.sub.4. Note that the same reference symbols in FIG. 1 denote the same parts as in FIG. 3.
In the DC amplifier having the above-described arrangement, the half thereof will be described below. In this case, an output voltage V.sub.out' can be represented as follows:
where R.sub.E <<R.sub.1 =R.sub.2.
In equation (4), the first term of the right-hand side is an output voltage determined by the input voltage V.sub.in, and a value defined by the second term is generated when heat generated by the transistors Q.sub.1 and Q.sub.2 is changed upon a bias change due to the input voltage V.sub.in, and their base-emitter voltage V.sub.BE is changed. In addition, the third term corresponds to the base-emitter voltage V.sub.BE of the transistor Q.sub.5. If the base currents of the transistors Q.sub.1, Q.sub.3, and Q.sub.5 can be neglected, an entire operating current of the transistor Q.sub.1 is supplied through the transistor Q.sub.5. Therefore, changes in V.sub.BE caused by this current become equal in the transistors Q.sub.1 and Q.sub.5. In addition, if collector-emitter voltages V.sub.CE of the transistors Q.sub.1 and Q.sub.5 are set to be equal to each other, collector losses in operative states of transistors are equal to each other. Hence, changes in V.sub.BE due to heat are equal to each other.
If the resistance of the load resistor R.sub.L (R.sub.L1 =R.sub.L2) is determined so as to set the coefficient of .DELTA.V.sub.BE of the second term of equation (4) to be "1", the following equations can be established:
If equation (6) is substituted into equation (4),
Therefore, if the resistor R.sub.E is used as the load resistor R.sub.L in parallel connection, a high-performance DC amplifier having a gain of "1" and free from the influence of the absolute value of the resistor R.sub.E and the change .DELTA.V.sub.BE can be realized.
FIG. 2 is a circuit diagram showing another embodiment of the present invention. Similar to FIG. 1, FIG. 2 shows a DC amplifier having a gain of "2" and free from the influences of the absolute value of a resistor and the change .DELTA.V.sub.BE and an input voltage. Referring to FIG. 2, reference symbols Q.sub.1a to Q.sub.6a and Q.sub.1b to Q.sub.6b denote identical NPN transistors; R.sub.1a, R.sub.1b, R.sub.2a, R.sub.2b, R.sub.Ea, R.sub.L1, and R.sub.L2, resistors, respectively; D.sub.1 and D.sub.2, diodes; and V.sub.E, V.sub.Ba, V.sub.Bb, V.sub.BB, and V.sub.C, constant voltage sources, respectively.
In this case, two pairs of transistors Q.sub.1a and Q.sub.2a and Q.sub.1b and Q.sub.2b respectively constitute differential amplification transistor pairs connected in parallel. An input voltage V.sub.in is applied between the bases of the transistors Q.sub.1a and Q.sub.1b and of the transistors Q.sub.2a and Q.sub.2b. The emitters of the two transistors Q.sub.1a and Q.sub.2a and the two transistors Q.sub.1b and Q.sub.2b are connected to each other through the resistors R.sub.Ea and R.sub.Eb, respectively. These emitters are connected to a constant voltage source V.sub.E through the resistors R.sub.1a, R.sub.1b, R.sub.2a, and R.sub.2b.
The collectors of the transistors Q.sub.1a and Q.sub.2a are respectively cascode-connected to the emitters of the common base transistors Q.sub.3a and Q.sub.4a. The collectors of the transistors Q.sub.3a and Q.sub.4a constitute output terminals of the amplifier and are respectively connected to the emitters of the transistors Q.sub.5a and Q.sub.6a through the load resistors R.sub.L1 and R.sub.L2. In addition, the collectors of the transistors Q.sub.1b and Q.sub.2b are respectively cascode-connected to the emitters of the common base transistors Q.sub.3b and Q.sub.4b. The collectors of the transistors Q.sub.3b and Q.sub.4b are respectively connected to the emitters of the transistors Q.sub.5b and Q.sub.6b, and at the same time, are connected to the bases of the transistors Q.sub.5a and Q.sub.6a.
The common bases of the transistors Q.sub.3a and Q.sub.4a and of the transistors Q.sub.3b and Q.sub.4b are respectively connected to the constant voltage sources V.sub.Ba and V.sub.Bb. The constant voltage source V.sub.BB is connected to the common base of the transistors Q.sub.5b and Q.sub.6b. Furthermore, the collectors of the transistors Q.sub.5a and Q.sub.6a are respectively connected to the cathodes of the diodes D.sub.1 and D.sub.2. The anodes of the diodes D.sub.1 and D.sub.2 and the collectors of the transistors Q.sub.5b and Q.sub.6b are connected to the constant voltage V.sub.C.
In the DC amplifier having the above-described arrangement, the transistors Q.sub.1a to Q.sub.6a constitute differential amplification transistor pairs. A fundamental operation of this amplifier is the same as that of the amplifier shown in FIG. 1, and the transistors Q.sub.1b to Q.sub.6b are the same as those used in the amplifier in FIG. 1. The embodiment in FIG. 2 is different from that in FIG. 1 in that the transistors Q.sub.1b to Q.sub.6b constitute a single differential amplifier circuit so that a base-emitter voltage .DELTA.V.sub.BE of a transistor can be added.
Similar to the case of FIG. 1, the half of the differential amplifier will be described below. In this case, an output voltage V.sub.out" can be represented as follows:
for R.sub.E =R.sub.Ea =R.sub.Eb <<R.sub.1a =R.sub.1b =R.sub.2a =R.sub.2b.
In equation (8), the first term of the right-hand side is an output voltage determined by the input voltage V.sub.in, and a value defined by the second term is generated when heat generated by the transistors Q.sub.1a, Q.sub.2a, Q.sub.1b, and Q.sub.2b are changed upon a bias change due to the input voltage V.sub.in, and the voltage V.sub.BE is changed. In addition, if the base current of each transistor is neglected, the third term represents a sum of the base-emitter voltage V.sub.BE of the transistor Q.sub.5a driven by an operating current of the transistor Q.sub.1a of the differential amplification transistors Q.sub.1a and Q.sub.2a, and the base-emitter voltage V.sub.BE of the transistor Q.sub.5b driven by an operating current of the transistor Q.sub.1b of the differential amplification transistors Q.sub.1b and Q.sub.2b.
If the resistance of the load resistor R.sub.L is determined so as to set the coefficient of .DELTA.V.sub.BE of the second term of equation (8) to be "2", the following equations can be established:
If r.sub.E <<R.sub.E,
Therefore, if equation (11) is substituted into equation (8),
As is apparent from the above equation, a high-performance DC amplifier having a gain of "2", which does not include an error due to the absolute value of the resistor R.sub.E (R.sub.L) and variations in base-emitter voltage V.sub.BE of each transistor, can be realized.
In the above-described embodiments, the collectors of the differential amplification transistors are cascode-connected to the emitters of the common base transistors. However, the present invention is not limited to this circuit arrangement, and various changes and modifications can be made within the spirit and scope of the invention.
As has been described above, according to the present invention, if only relative precision of circuit elements such as resistors and transistors constituting an amplifier is high, a stable DC amplifier having a gain of "1"or "2"can be realized. This amplifier is suitably applied to formation of an amplifier IC. The present invention is advantageous in obtaining a DC amplifier especially exhibiting highly stable characteristics with respect to temperature variations.
Claims
What is claimed is:
1. A DC amplifier comprising a first differential amplification circuit including first and second transistors forming a first differential amplification transistor pair, an emitter resistor connected between emitters of said first and second transistors, and load resistors connected to collectors of said first and second transistors respectively, and a second differential amplification circuit including third and fourth transistors equivalent to said first and second transistors and forming a second differential amplification transistor pair, bases of said third and fourth transistors being commonly connected to bases of said first and second transistors, respectively, and an emitter resistor connected between emitters of said third and fourth transistors, wherein a resistance of each of said load resistors is set to be equal to that of each of said emitter resistors, emitters of fifth and sixth transistors equivalent to said first and second transistors are respectively connected to the collectors of said first and second transistors through said respective load resistors, emitters of seventh and eighth transistors equivalent to said third and fourth transistors are respectively connected to collectors of said third and fourth transistors, bases of said fifth and sixth transistors are respectively connected to the emitters of seventh and eighth transistors, and biases of said first to eighth transistors are set to be close to each other.
2. The DC amplifier defined by claim 2 further comprising ninth and tenth transistors having collectors respectively coupled to the emitters of said seventh and eighth transistors, having emitters respectively coupled to the collectors of said third and fourth transistors and wherein the base of said ninth transistor is coupled to the base of said tenth transistor.
Patent Citations (1)
| Patent | Date | Inventor | Cited By |
|---|---|---|---|
| US4605906 | 1986-08-01 | Miller |