Failure Detection Mechanism for Microcontroller Based Control System

This invention relates to a failure detection mechanism which inhibits control of electrically actuated mechanisms during malfunction of a microcontroller normally used to control such mechanisms.

Microcontrollers have been increasingly used in recent years in various control systems, particularly those used on motor vehicles. For example, such microcontroller based control systems have been used to control the fuel management system and the braking system of automotive vehicles. When such devices are used to control the braking systems, such as vehicle anti-lock or adaptive braking systems, care must be taken that the solenoid valves which control communication of braking pressure to the brakes of the vehicle are not in a condition permitting decay of braking pressure during a system malfunction. It is a requirement of such systems that, in a case of a malfunction, that the system, at most, reverts to normal braking, that is, braking that would be available in the total absence of such an adaptive braking system. Such adaptive braking systems include wheel speed sensors, which respond to rotation of one or more of the vehicle's wheels in order to supply a signal which varies as the speed of the wheel varies, an electrically actuated control valve, which controls communication of braking pressure to the brakes of the vehicle, and a microcontroller which processes the wheel speed signals and generates output signals controlling the control valve in response to the input signals. The control valve includes one or more electrically activated solenoids.

Although the most common failure of such systems is a defective sensor or solenoid, failures of the microcontroller do occur. As discussed above, it is a requirement that in the case of any single failure, the system functions as it would function without the electronic control. Accordingly, the microcontroller has been provided with a so called "watchdog" port, which, during normal operation of the microcontroller, is provided with a signal that pulsates at a predetermined frequency. Theoretically, in case of failure of a microcontroller, the pulses at the watchdog port are discontinued. This watchdog signal is used in the prior art to disable the microcontroller. However, certain failures, particularly those involving program execution and timing, result in failures in which pulses continue to be transmitted to the watchdog port, although it is highly unlikely that these pulses will be transmitted at the prescribed normal operating frequency.

The present invention provides a watchdog circuit which is connected to the watchdog port of the microcontroller and which transmits an enable signal to the solenoid drive circuits which are responsive to the output signals from the microcontroller. The drive circuits, and thereby the solenoids, are enabled only when the enable signal is transmitted from the watchdog circuit, and the enable signal is transmitted by the watchdog circuit only when the pulses at the watchdog port of the microcontroller are within a predetermined, relatively narrow frequency range about the standard operating frequency of pulses at the watchdog port. Accordingly, the present invention has the advantage of detecting failures of program execution by the microcontroller which may affect control of the solenoids, but which causes the microcontroller to fail in such a way that pulses are still transmitted to the watchdog port. Accordingly, the present invention assures that, except in the extremely unlikely chance that the microcontroller will fail with the watchdog pulses at the prescribed frequency, the solenoid valves will not be actuated during failure of the microcontroller or of any other component in the system.

These and other advantages of the present invention will become apparent from the following description, with reference to the accompanying drawings, in which:

FIG. 1 is a system schematic of a vehicle control system made pursuant to the present invention;

FIG. 2 is a system diagram of the watchdog circuit which provides an important component of the present invention;

FIG. 3 is a detailed electrical schematic of the watchdog control circuit; and

FIG. 4 is a diagrammatic illustration of an alternate embodiment of the the watchdog circuit used in the present invention.

Referring now to the drawings, a vehicle adaptive braking system is indicated schematically by the numeral 10. The adaptive braking system 10 includes an electronic control unit generally indicated by the numeral 12 which receives input signals from wheel speed senors 14 (only two of which are being shown, but any number may be used) and transmits control signals which actuates solenoids (not shown) on control valve 16. Control valve 16 controls fluid communication to the brakes of the vehicle, to thereby control braking pressure.

The electronic control unit 12 includes a microcontroller generally indicated by the numeral 18 which is programmed to generate signals controlling the control valve 16 in response to input signals received from the sensors 14. Electronic control unit 12 further includes signal conditioning circuitry 20 which receives signals from the speed sensors 14 and transmits them to the microcontroller 18. The signal conditioning circuits 20 includes self-test circuitry which tests for correct operation of the signal conditioning circuit 20 and also checks that the sensors 14 are not disconnected or short-circuited. The microcontroller initiates the self-check circuits of the signal conditioning circuitry 20 upon system power-up by generating a control signal through output line 22, which connects the microcontroller with the conditioning circuits 20. The microcontroller 18 actuates the self-check circuits and looks for appropriate responses back through the normal signal paths indicated by lines 24 on FIG. 1. The microcontroller 18, in response to the signals received from sensors 14, generates output signals which are transmitted by output bus 26 to solenoid drive circuit 28, which drives the electrically actuated solenoids contained within the control valve 16. The microcontroller 18 monitors operation of the drive circuit 28 through a feedback loop 30, which is used by the microcontroller 18 to verify that the control commands transmitted through bus 26 are correctly implemented by the drive circuit 28. The microcontroller 18, in a manner known to those skilled in the art, can also determine if the solenoids within the control valve 16 have a short or open circuit by interpreting the feedback response received through feedback line 30.

The microcontroller 18 is also capable of checking itself. Internal programs within the microcontroller 18 verify that all program memory is operable and also verifies random access memory (RAM) by writing and reading various bit patterns to and from the RAM. Test routines also verify data instruction decoding logic within the microcontroller 18. The various input/output ports are checked as part of the sensor and signal conditioning 20 and drive circuit 28 tests. Stimuli for these tests are transmitted from the microcontroller and the appropriate responses are returned as described above. Assuming that everything is operating properly, the microcontroller program is arranged to toggle a watchdog output line generally indicated by the numeral 32 at a predetermined rate. The pulsed output signal at a predetermined frequency transmitted through output line 32 is received by a watchdog circuit indicated at 34, which will be described hereinafter. The watchdog circuit 34 generates an enable signal which is transmitted to the drive circuit 28 through circuit path 36. The drive circuit 28 includes logic, such as a simple "AND" gate, and assures the aforementioned solenoid valves will be actuated only when signals are simultaneously received both through the output bus 26 and from the solenoid enable line 36.

Referring now to FIG. 2, the watchdog circuit 34 includes a low pass filter 38 connected to the watchdog output line 32. The output of filter 38 is connected to the input of a conventional frequency-to-voltage converter 40. The output of the frequency of the voltage converter 40 is connected to a threshold comparator 42, the output of which is transmitted through solenoid enable line 36 to the drive circuit 28. The low pass filter 38 passes signals to the frequency-to-voltage converter 40 only if the frequency of the signal being transmitted is less than the limit of the low pass filter 38. The frequency-to-voltage converter 40 converts the signal, if any, transmitted from the low pass filter 38 into an output signal which varies as a direct function of the frequency of the input signal to voltage converter 40. The output of the frequency-to-voltage convert 40 is compared with a predetermined reference level by threshold comparator 42, and an output signal is generated on solenoid enable line 36 only if the level of the signal generated by the frequency-to-voltage converter 40 is above the predetermine reference level. Accordingly, a signal is generated on solenoid enable line 36 only if the frequency of the signal on line 32 is within a relatively narrow range centered about the predetermined frequency. Frequencies above the predetermined frequency range are screened out by the low pass filter 38. Signals below the predetermined frequency level, when converted to an output signal by the frequency-to-voltage converter 40, will be less than the predetermined threshold level when compared in the threshold comparator 42.

Referring now to FIG. 3, the low pass filter 38 includes a field effect transistor 44 which is switched by the pulsating signal on the line 32 from microcontroller 18 so that when the line 32 goes high the signal is transmitted to a RC circuit comprising resistor 46 capacitor 48. Accordingly, when the output line 32 goes low, the capacitor 48 is charged at a predetermined rate established by the values of the resistor 46 and the capacitor 48. However, when the output on line 32 goes high, the capacitor 48 is immediately drained to ground through grounding line 50. The capacitor 48 is connected to the positive input 52 of a comparator 54, the other terminal 56 of which is connected to a predetermined value established by voltage dividing resistors 58, 60. Accordingly, when the value at terminal 52 exceeds the value at terminal 56, comparator 54 turns on to transmit a signal to the input of frequency-to-voltage converter 40. It will, accordingly, be noted that at sufficiently high frequencies, capacitor 48 will never be charged sufficiently to exceed the value on terminal 56. Accordingly, comparator 54 will only pass a signal to the frequency-to-voltage converter 40 if the frequency of the signal on input line 32 is sufficiently low that the capacitor 48 has a chance to charge to a value that exceeds the value on terminal 56 before the signal on line 32 goes high. The frequency-to-voltage converter 40 generates a signal on output 62 which is a function of the frequency of the signal transmitted by the comparator 54. This signal is connected to the inverting terminal 64 of another voltage comparator 66, the other terminal 68 of which is connected to the voltage dividing resistors 58, 60. Accordingly, when the value at terminal 64 increases above the value at terminal 68 in an amount sufficient to cause the comparator 66 to change states, the output transistor 70 will be turned off, the signal on line 36 goes high thereby generating a solenoid enable signal on output line 36. If the signal at output 62 of frequency-to-voltage converter 40 is less than the value at terminal 68 of comparator 66, the transistor 70 will be turned on, thereby turning off the solenoid enable signal on line 36. As discussed above, the drive circuit 28 requires an input on the solenoid enable line 36 in order to actuate the solenoid valves contained within control valve 16.

Referring to FIG. 4, a modified embodiment of the watchdog circuit 34 is disclosed. In this embodiment, a window comparator 72, of conventional design, switches in response to the output of the frequency-to-voltage converter 40 so that an output is present on solenoid enable line 36 only if the output of the frequency-to-voltage converter 40 is within predetermined limits. Since the pulsed signal on the watchdog line 32 is converted to a signal which varies as a function of the frequency by frequency-to-voltage converter 40, the window comparator 72 will generate a signal on line 36 only if the frequency of the signal on line 32 is within predetermined limits.