Discharge Lamp Driving Circuit

1. Field of the Invention

The present invention is directed to a discharge lamp driving circuit, and more particularly to a circuit for operating a high-pressure gaseous discharge lamp without causing a harmful acoustic resonance.

2. Description of the Prior Art

There has been a growing demand for a discharge lamp operating circuit which is operated at a higher frequency in order to reduce the weight and bulk of the ballasting inductor On the other hand, it is also known that discharge lamps, particularly high-pressure discharge lamps Such is mercury high pressure lamps and sodium vapor lamps suffer from unstable discharge arcs due to "acoustic resonance" when operated at certain high frequencies. U.S. Pat. No. 4,291,254 proposed to select a stable frequency for avoiding such "acoustic resonance". However, such stable frequency is seen only in a limited range and differs from different kinds of lamps, thus reducing the flexibility of circuit design. Further, it is known that an extreme high frequency drive, for example, over 100 KHz may be effective for elimination of the "acoustic resonance", but this eventually results in considerable switching losses and noises which are not acceptable for the lamp operation. To this end, there has been proposed in Japanese Patent Publication (KOKAI) No. 60-262392 to drive the lamp by a composite lamp driving Current having a repeating cycle of an alternating current interrupted by a dc current. This patent is based upon the findinq that the repetitive interruption of the alternating current by the dc current can restrain the occurrence of the "acoustic resonance", even the alternating current is in a frequency range which would otherwise cause the "acoustic resonance". In this sense, this patent is advantageous in selecting a lamp drive frequency without having to consider the "acoustic resonance". Notwithstandinq this advantage, the patent has a certain drawback in that two independent switching circuits, i.e., chopper and inverter circuits, are required for providing the dc current and the alternating current, respectively. This requires duplication of switching elements with consequent complexity in incorporating the respective drivers in circuits for the duplicated switching elements, thus eventually resulting in increased cost and bulk of the physical circuit assembly.

The present invention eliminates the above problem by commonly utilizing at least one switching element for chopper and inverter switching circuits and provides an improved discharge lamp driving circuit with simplified circuit arrangement.

It is therefore a primary object of the present invention to provide an improved discharge lamp driving circuit which is simple in configuration, yet preventing the acoustic resonance as well as assurinq to make compact the physical arrangement of the circuit.

An improved discharge lamp driving circuit in accordance with the present invention comprises a dc (direct current) voltage source, chopper means, and inverter means. The chopper means comprises a first switching circuit which is coupled to the dc voltage source to provide therefrom a periodically interrupted current and smooth the same for producing a smoothed dc current. The inverter means comprises a second switching circuit which is also coupled to the dc voltage source for producing therefrom a high frequency alternating current. Included in the circuit is control means which is connected to the chopper means and the inverter means in order to apply to the discharge lamp a repeating cycle of a composite lamp driving current composed of the high frequency alternating current supplied from the inverter means and is interrupted by the smoothed dc current supplied from the chopper means.

A characterizing feature of the present invention resides in that the first and second switching circuits of the chopper and inverter means are arranged to have at least one common switching element which operates both in producing the dc current and the high frequency alternating current. With this result, the circuit Configuration can be considerably simplified with consequent reduction in cost and bulk of the device.

In a preferred embodiment, the chopper means is configured in a bridge arrangement to apply to the discharge lamp the smoothed dc current which is reversed in polarity from one cycle to the subsequent cycle of the composite lamp driving current. Thus, the deterioration of lamp electrodes can be reduced to a minimum, thereby giving rise to an enhanced life time of the discharge lamp.

The lamp driving circuit of the present invention can be broadly classified into two types with and without a transformer which operates to apply the high frequency alternating current to the discharge lamp. In the former type, the first switching circuit of the chopper means comprises at least one switching element common to the second switching circuit of the inverter means. The common switching element is coupled in series circuit with an inductor and a parallel combination of the discharge lamp and a bypass capacitor of which series circuit is connected across the dc voltage source. During a first period of time, the common switching element is controlled to turn on and off at a first high frequency to produce the interrupted current which is smoothed by the first inductor and of which high frequency component is bypassed through the bypass capacitor for giving the smoothed dc current to the discharge lamp within each cycle of the composite lamp driving current. The second switching circuit of the inverter means comprises a pair of first and second switching elements at least one of which is common to the first switching circuit of the chopper means. The first and second switching elements are connected in series across the dc voltage and is connected in circuit with a dc blocking capacitor and the transformer with a primary winding and a secondary winding which is inserted in series relation with the discharge lamp and in parallel relation with the bypass capacitor. The blocking capacitor is connected in series with the primary winding of the transformer and in parallel with one of the first and second switching elements to form therewith a series oscillating circuit. During a second period of time alternating with the above first period of time, the first and second switching elements are controlled to alternately turn on and off at a second frequency to provide a high frequency alternating current in the series oscillating circuit as repeating to charge and discharge the dc blocking capacitor, whereby inducing the corresponding high frequency alternating current in the circuit of the secondary winding and the discharge lamp to drive the discharge lamp by such high frequency alternating current within each cycle of the composite lamp driving current.

In the other type of the circuit without the transformer, the first and second switching circuits of the chopper and inverter means commonly includes a pair of first and second switching elements arranged in a half- or full-bridge configuration with a pair of capacitors or with a pair of like switching elements. The bridge has its input ends connected across the dc voltage source and has its output ends connected across a series circuit composed of an inductor and a parallel combination of the discharge lamp and a bypass capacitor. During a first period of time, one of the first and second switching elements is controlled to turn on and off at a first frequency with the other switching element beinq kept turned off to provide a dc current which is smoothed by the inductor and is removed of its high frequency component by the bypass capacitor for feeding the smoothed dc current to the discharge lamp within each cycle of the composite lamp driving current. During a second period of time alternating with the first period of time, the first and second switching elements are controlled to alternately turned on and off at a second high frequency in such a manner as to provide to the discharge lamp said high frequency alternating current within each cycle of said composite lamp driving current. The second high frequency is determined to be lower than the first high frequency to such an extent that the second high frequency alternating current is supplied to the discharge lamp within each cycle of the composite lamp driving current while allowing the second high frequency component to be substantially fed to the discharge lamp without being bypassed through the bypass capacitor.

FIG. 1 is a schematic diagram of a discharge lamp driving circuit illustrating one basic version in accordance with the principle of the present invention;

FIG. 2 is a waveform chart illustrating a composite lamp driving current in a conceptual form obtained in the present invention;

FIG. 3 is a circuit diagram of a discharge lamp driving circuit in accordance with a first embodiment of the present invention;

FIG. 4 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 3;

FIG. 5 is a waveform chart illustrating a composite lamp driving current in a conceptual form obtained in the circuit of FIG. 3;

FIG. 6 is a circuit diagram of a modification of FIG. 3;

FIG. 7 is a circuit diagram of a second embodiment of the present invention;

FIG. 8 is a timing diagram of waveforms illustrating the operation of the four switching transistors shown in FIG. 7;

FIG. 9 is a timing diagram of waveforms illustrating another operation of the four switching transistors shown in FIG. 7 in accordance with a modification of the second embodiment;

FIG. 10 is a waveform chart illustrating a lamp driving current in a conceptual form obtained by the switching operation of FIG. 9;

FIG. 11 is a circuit diagram of a third embodiment of the present invention;

FIG. 12 is a timing diagram of waveforms illustrating the operation of the four switching transistors shown in FIG. 11;

FIG. 13 is a timing diagram of waveforms illustrating another operation of the four switching transistors shown in FIG. 11 in accordance with a modification of the third embodiment;

FIG. 14 is a circuit diagram of a fourth embodiment of the present invention;

FIG. 15 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 14;

FIG. 16 is a waveform chart illustrating a composite lamp driving current in a conceptual form obtained by the switching operation of FIG. 15;

FIG. 17 is a circuit diagram of a fifth embodiment of the present invention;

FIG. 18 is a timing diagram of waveforms illustrating the operation of the three switching transistors shown in FIG. 17;

FIG. 19 is a circuit diagram of a sixth embodiment of the present invention;

FIG. 20 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 19;

FIG. 21 is a circuit diagram of a seventh embodiment of the present invention;

FIG. 22 is a circuit diagram of an eighth embodiment of the present invention;

FIG. 23 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 22;

FIG. 24 is a circuit diagram of a ninth embodiment of the present invention.

FIG. 25 is a circuit diagram of a tenth embodiment of the present invention;

FIG. 26 is a timing diagram of waveforms illustrating the operation of the four switching transistors shown in FIG. 25; and

FIG. 27 is a timing diagram of waveforms illustrating another operation of the four switching transistors shown in FIG. 25 in accordance with a modification of the tenth embodiment.

Referring now to FIG. 1, one version of a discharge lamp driving circuit in accordance with the present invention is shown in a general form for easy understanding of the principle of the present invention. The circuit comprises a switching section 1 which is connected across a dc voltage source V.sub.1 and includes at least two switching elements or transistors collectively indicated in FIG. 1 as S. The switching section 1 has a first pair of output ends 1a and 1b between which is connected a series circuit of an inductor L.sub.1 and a parallel combination of a discharge lamp 10 and a bypass capacitor C.sub.1. Also provided at the switching section 1 is a second pair of output ends 1c and 1d between which is connected a circuit of a dc blocking capacitor C.sub.2 and a transformer T with a primary winding L.sub.21, and a secondary windinq L.sub.22. The secondary winding L.sub.22 is coupled in series with the discharge lamp 10 in parallel relation with the bypass capacitor C.sub.1. The switching section 1 is controlled, during a first period of time T.sub.DC (t.sub.1 -t.sub.2), to repetitively interrupt the dc voltage at a first high frequency for providing a chopped voltage between the first pair of output ends 1a and 1b. The chopped voltage is then smoothed by the inductor L.sub.1 and has its high frequency component bypassed through the bypass capacitor C.sub.1 to thereby feed a smoothed dc current I.sub.DC to the discharge lamp 10 during the first period T.sub.DC, as shown in FIG. 2 which shows a composite lamp driving current Ia in a conceptual waveform. During a second period of time T.sub.HF (t.sub.2 -T.sub.3) alternating with the first period of time T.sub.HF, the switching section 1 is controlled to repetitively interrupt the dc voltage at a second high frequency in order to repeat producing a voltage between output ends 1c and 1d and shorting the same. While the positive voltage is developed across the output ends 1c and 1d, the voltage is applied through the dc blocking capacitor C.sub.2 to the primary winding L.sub.21 of the transformer T so as to flow a current in one direction in the primary winding L.sub.21 as charging the blocking capacitor C.sub.2. Upon subsequent shorting between the output ends 1c and 1d, the blocking capacitor C.sub.2 discharges to feed an opposite current through the primary winding L.sub.21. consequently, the above repetition of developing the voltage and shorting between the output ends 1c and 1d will induce an alternating current with the second high frequency at the secondary winding L.sub.22 of the transformer T such that the resulting high frequency alternating current is caused to circulate through the closed loop of the lamp 10 and the bypass capacitor C.sub.1 as it is blocked by the inductor L.sub.1, whereby providing to the lamp the high frequency alternaing current I.sub.AC during the second period of time T.sub.HF, as shown in FIG. 2. In this manner, the switching section 1 provides a repeated cycle of a composite lamp driving current composed of the high frequency alternating current I.sub.AC interrupted by the dc current I.sub.DC. With this result, the lamp 10 can be kept free from causing an acoustic resonance or instable lamp operation even if the alternating current has a high frequency which might cause such acoustic resonance when utilized alone. The second frequency of the alternating lamp current may be suitably selected to be equal to or different from the first frequency a which the switching section 1 is operated to chop the dc voltage. With the circuit arrangement of FIG. 1, it is possible to share at least one switching element in the switching section 1 which operates both in a chopper mode for providing the dc current I.sub.DC and in an inverter mode of providing the high frequency alternating current I.sub.AC. It is also noted in this connection that other components can be commonly and effectively utilized in the above two different operation modes. For example, the bypass capacitor C.sub.1, which acts to bypass the high frequency component of the dc current in the chopper mode, serves to complete the closed loop with the secondary winding L.sub.22 and the discharge lamp 10 to effectively apply to the discharge lamp 10 the alternating voltage developed at the secondary winding L.sub.22 in the inverter mode. Also the inductor L.sub.1, which smooths the chopped voltage in the chopper mode, serves to block the high frequency voltage and prevent it from being applying to the circuit other than the closed loop, thereby applying the high frequency voltage effectively to the discharge lamp 10 in the inverter mode. Further, the secondary windinq L.sub.22 of the transformer T, which develops the high frequency voltage as a power source in the inverter mode, can serve to block the high frequency component of the chopped voltage in the chopper mode, assisting to bypass the high frequency component through the bypass capacitor C.sub.1. The discharge lamp 10 may be a high pressure gaseous discharge lamp such as mercury high pressure discharge lamp with metal halogen additives, sodium vapor lamp, and the like, or may be a low pressure lamp. The present invention is now discussed in more detail with reference to preferred embodiments. Like numerals designate like parts throughout the following embodiments for easy reference.

In this embodiment, the circuit comprises a pair of first and second switching transistors Q.sub.1 and Q.sub.2 which are cooperative with a pair of capacitors C.sub.3 and C.sub.4 to form a half-bridge having its input ends connected across a dc voltage source V.sub.1. Connected across the output ends of the of half-bridge is a series circuit composed of an inductor L.sub.1 and the parallel combination of a discharge lamp 10 and a bypass capacitor C.sub.1. The first and second switching transistors Q.sub.1 and Q.sub.2 are cooperative with the series circuit to form a chopper which provides a dc current to the discharge lamp 10. A transformer T is incorporated in the circuit with its primary winding L.sub.21 connected in series with a dc blocking capacitor C.sub.2 across the second switching transistor Q.sub.2 and with its secondary winding L.sub.22 inserted in series with discharge lamp 10 and in parallel with the bypass capacitor C.sub.1. The series connection of the primary winding L.sub.21 and the blocking capacitor C.sub.2 is cooperative with the first and second switching transistors Q.sub.1 and Q.sub.2 to form an inverter or series oscillating circuit which provides a high frequency alternating current to the discharge lamp 10. As discussed in the below, the first and second switching transistors Q.sub.1 and Q.sub.2 are controlled to provide repeating cycles of a composite lamp driving current composed of the dc current fed from the chopper and the high frequency alternating current from the inverter, as shown in FIG. 5. Typical values for the above circuit are as follows. The voltage of the dc voltage source V.sub.1 is 280 V, the bypass capacitor C.sub.1 has a capacitance of 0.22 .mu.F, the inductor L.sub.1 has an inductance of 0.2 mH, the primary winding L.sub.21 has an inductance of 0.5 mH, and the blocking capacitor C.sub.2 has a capacitance of 0.1 pF. The first and second switching transistors Q.sub.1 and Q.sub.2 are operated at 40 KHz both in the chopper and the inverter mode. The operation of the chopper is now explained with reference to FIG. 4. During each first period of time T.sub.DC alternating with a second period of time T.sub.HF, one of the first and second switching transistors Q.sub.1 and Q.sub.2 is controlled to turn on and off at a first high frequency while the other switching transistor is kept turned off. For example, during the first period of time T.sub.DC (t.sub.1 -t.sub.2) of FIGS. 4 and 5, the first switching transistor Q.sub.1 repeats turning on and off at a frequency of 40 KHz while the second transistor Q.sub.2 is kept turned off. When the first transistor Q.sub.1 is on, the capacitor C.sub.3 will discharge a current through a route of the first switching transistor Q.sub.1, secondary winding L.sub.22, discharge lamp 10, and inductor L.sub.1. When the first transistor Q.sub.1 is turned off, the inductor L.sub. 1 acts to continuously flow the current in the same direction. Thus, the dc current from the capacitor C.sub.3 is smoothed by the inductor L.sub.1 and has its high frequency component bypassed through the bypass capacitor C.sub.1 so as to feed the smoothed dc current to the discharge lamp 10. During the first period of time T.sub.DC (t.sub.3 -t.sub.4), the second switching transistor Q.sub.2 turns on and off at the same frequency While the first switching transistor Q.sub.1 is kept turned off, thereby producing the like dc current but in opposite polarity, as shown in FlG. 5. With this provision of reversing the polarity of the dc current from one cycle to the subsequent cycle of the composite lamp driving current, the discharge lamp 10 can have an elongated operation life. The second period of time T.sub.HF in which the inverter is active to provide the high frequency alternating current is initiated by driving to turn on and off the one of the switching transistor which is kept turned off in the previous first time of period while keeping the other switching transistor turning on and off. For example, in the second period of time T.sub.HF (t.sub.2 -t.sub.3), the second switching transistor Q.sub.2, which has been off in the previous first time of period T.sub.DC, begins to turn on and off while the first switching transistor Q.sub.1 continues to turn on and off. During this period, the first and second switching transistors Q.sub.1 and Q.sub.2 are alternately turned on and off with a dead-time therebetween, in which both of the switching transistors are simultaneously off, in order to provide the high frequency alternating current. The inverter operation in this period is explained in terms of the repeating sequence of the following four consecutive occurrences (1) to as indicated in FIG. 4.

At the first occurrence (1), the second switching transistor Q.sub.2 is turned on while the first switching transistor Q.sub.1 is off such that the blocking capacitor C.sub.2 which has been charged due to the previous turning on of first switching transistor Q.sub.1 will begin discharging to cause a current to flow through the primary winding L.sub.21, second switching transistor Q.sub.2, and back to the blocking capacitor C.sub.2. At the second occurrence (2) in which both of the first and second switching transistors Q.sub.1 and Q.sub.2 are off, the primary winding L.sub.21 in turn causes the current to continuously flow through a first diode D.sub.1, dc voltage source V.sub.1, blocking capacitor C.sub.2 and back to the primary winding L.sub.21. At the third occurrence (3), the first switching transistor Q.sub.1 is on while the second switching transistor Q.sub.2 is off so that the capacitor C.sub.3 discharges its energy, causing a current to flow in the opposite direction through the first switching transistor Q.sub.1, primary winding L.sub.21, blocking capacitor C.sub.2, capacitor C.sub.4, and back to the capacitor C.sub.3. At the fourth occurrence 4) where both of the first and second switching transistors Q.sub.1 and Q.sub.2 are off, the primary winding L.sub.21 acts to continuously flow the current through a second diode D*, blocking capacitor C.sub.2, and back to the primary windinq L.sub.21 in this sense, the first and second diodes D.sub.1 and D.sub.2, which are connected in antiparallel relation respectively to the first and second switching transistors Q.sub.1 and Q.sub.2, provide first and second bypass routes for continuously flowing the instantaneous currents discharged from the primary windinq L.sub.21 at the second and fourth occurrences in which both of the switching transistors Q.sub.1 and Q.sub.2 are off. Likewise, in the next second period of time T.sub.HF (t.sub.4 -t.sub.5) which is initiated by turning on and off the first switching transistor Q.sub.1 which has been on in the previous first time of period T.sub.DC, the first and second switching transistors Q.sub.1 and Q.sub.2 are controlled to alternately turn on and off to produce the high alternating current through the primary winding L.sub.21.

In this manner, during each second period of time T.sub.HF, the high frequency alternating current continues to flow through the primary winding L.sub.21 to thereby induce at the secondary winding L.sub.22 the corresponding high frequency alternating current which circulates through the closed loop of the secondary winding L.sub.22, discharge lamp 10, and the bypass capacitor C.sub.1 as the inductor L.sub.1 acts to block such high frequency alternating current, whereby driving the discharge lamp 10 by thus obtained high frequency alternating current, as shown in FIG. 5.

It is noted at this connection that the second frequency is determined so that the inductor L.sub.1 blocks such high frequency for circulating the high frequency alternating current through the closed loop of the secondary winding L.sub.22, discharge lamp 10, and bypass capacitor C.sub.1. Due to the above the circuit arrangement, the first and second switching transistors are commonly utilized both in the chopper mode of providing the dc current and in the inverter mode of providing the high frequency alternating current to the discharge lamp. In brief, the inverter mode of providing the high frequency alternating current is terminated by deactivating one of the switching transistors, which in turn immediately initiates the chopper mode of providing the dc current to the discharge lamp. Thus, by repeating the above operations, the high frequency alternating current can be repetitively interrupted by the dc current, as shown in FIG. 5, to thereby inhibit the occurrence of the acoustic resonance which would be otherwise develop due to the high frequency lamp driving.

The ratio of the period I.sub.DC to the period of one complete cycle (T.sub.DC +T.sub.HF) of the composite lamp driving current may be Suitably selected depending upon the kind of discharge lamp utilized for prevention of the acoustic resonance, as the suitable ratio will vary with different kinds of lamps.

This modification shows a circuit arrangement which is identical to that of FIG. 3 except that the dc blocking capacitor C.sub.2 is inserted between the primary winding L.sub.21 and the connection of the capacitors C.sub.3 and C.sub.4. The circuit provides the like composite lamp driving current of FIG. 5 by the like switching operations of FIG. 4, but in which each of the capacitors Q.sub.3 and Q.sub.4 is additive to the blocking capacitor C.sub.2 to act as a voltage source to provide the high frequency alternating current during the second period of Lime T.sub.HF. The other functions are identical to those of the first embodiment. In other words, during the second period of time for providing the high alternating current, the capacitors Q.sub.3 and Q.sub.4 can be made mainly responsible for producing the high frequency alternating current, while the blocking capacitor C.sub.2 is responsible for blocking the dc current. Accordingly, the constant of the blocking capacitor C.sub.2 can be determined relatively freely without taking into account for utilizing it as the voltage source for the alternating current, thus giving rise to an improved design flexibility of the circuit. Typical values for this circuit when operated on the dc voltage V.sub.1 of 280 V are as follows. C.sub.1 =0.22 .mu.F, L.sub.1 =0.22 mH, L.sub.21 =0.9 mH, and C.sub.2 =0.01 pF. The first and second switching transistors Q.sub.1 and Q.sub.2 are operated at 40 KHz and 60 KHz, respectively in the chopper mode and the inverter mode.

Referring to FIG. 7, a second embodiment of the present invention is shown to be identical to the first embodiment of FIG. 3 except for utilizing additional third and fourth switching transistors Q.sub.3 and Q.sub.4 which are coupled with the first and second switching transistors Q.sub.1 and Q.sub.2 to form a chopper circuit of full-bridge configuration with third and fourth diodes D.sub.1 and D.sub.4 connected in antiparallel relation to the third and fourth switching transistors Q.sub.3 and Q.sub.4 respectively. Thus, as shown in FlG. 8, the one of the two diagonally disposed pairs of switching transistors Q.sub.1, Q.sub.4, and Q.sub.2 Q.sub.3 is rendered to be active while the other pair is inactive during the first period of time T.sub.DC providing the dc current to the discharge lamp 10. For example, during the first period of time T.sub.DC (t.sub.1 -t.sub.2), the first switching transistor Q.sub.1 is controlled to turn on and off at a first high frequency with the fourth switching transistor Q.sub.4 being kept turned on, while the second and third switching transistors Q.sub.2 and Q.sub.4 are kept turned off. In this manner the switching transistors are controlled to provide the dc lamp current which is opposite in polarity from the period t.sub.1 -t.sub.2 to the period t.sub.3 -t.sub.4. In the inverter mode of providing the high frequency alternating current, or in the second period of time T.sub.HF (t.sub.2 -t.sub.3 , t.sub.4 -t.sub.5), the first and second switching transistors Q.sub.1 and Q.sub.2 are controlled in the same manner as in the first embodiment while the third and fourth switching transistors Q.sub.3 and Q.sub.4 are kept turned off, during which the first and second switching transistors Q.sub.1 and Q.sub.2 are cooperative with the primary winding L.sub.21 and the blocking capacitor C.sub.2 to oscillate an alternating current through the primary winding L.sub.21 and the blocking capacitor C.sub.2, as repeating the four occurrences which are similar to those discussed with reference to the first embodiment but differ in that the dc voltage V.sub.1 will supply an energy to the series oscillating circuit of the primary winding L.sub.21 and the blocking capacitor C.sub.2 when the first switching transistor Q.sub.1 is on and the second switching transistor Q.sub.2 is off.

Referring to FIGS. 11 and 12, a third embodiment of the present invention is shown to comprise the same like circuit as in the second embodiment except that the blocking capacitor C.sub.2 has its one end connected to the connection between the third and fourth switching transistors Q.sub.3 and Q.sub.4 The switching transistors Q.sub.1 to Q.sub.4 are controlled to turned on and off in accordance with a timing diagram of FIG. 12 to provide the like composite lamp driving current as shown in FIG. 5 for the first embodiment. In the chopper mode, the two diagonally disposed switching transistors, for example, Q.sub.1 and Q.sub.4, are controlled to turn on and off in a synchronized manner while the other two switching lransistors, for example, Q.sub.2 and Q.sub.3 are kept turned off during each first period of time T.sub.DC in order to provide the dc current to the discharge lamp 10. Due to the synchronous operation of the diagonally disposed switching transistors Q.sub.1, Q.sub.4 and Q.sub.3, Q.sub.4 in the chopper mode, the inductor L.sub.1 acts upon the subsequent turning off of the all switching transistors to cause the instantaneous dc current to continuously flow through a closed loop to the dc voltage supply V.sub.1, thus feeding back the energy thereto. For example, when all of the switching transistors are turned off immediately after the first and fourth switching transistors Q.sub.1 and Q.sub.4 being turned on, the inductor L.sub.1 cause the current to flow through the diode D.sub.3, dc voltage source V.sub.1, diode D.sub.2, secondary winding L.sub.22, discharge lamp 10 and back to the inductor L.sub.21. On the other hand when all the switching transistors are turned off after the second and third switching transistors Q.sub.2 and Q.sub.3 being simultaneously turned on, the instantaneous current from the inductor L.sub.21 flows through the discharge lamp 10, the secondary winding L.sub.22, diode D.sub.1, dc voltage source, diode D.sub.4, and back to the inductor L.sub.21.

In the inverter mode of providing the high frequency alternating current during the second period of time T.sub.HF (t.sub.2 -t.sub.3, t.sub.4 -t.sub.5), the two switching transistors, for example, Q.sub.1 and Q.sub.4 in one diagonally disposed pair are controlled to simultaneously turn on and off while the switching transistors Q.sub.2 and Q.sub.1 in the other pair are controlled to simultaneously turn on and off in an alternating manner therewith. Thus, the alternating current appears in the series oscillating circuit including the primary winding L.sub.21 and the blocking capacitor C.sub.2 with no substantial direct current being caused to flow through the discharge lamp 10 and the inductor L.sub.1, whereby inducing at the secondary winding L.sub.22 the high frequency alternating current which circulates the closed loop of the secondary winding L.sub.22, discharge lamp 10, and bypass capacitor C.sub.1. Also in the inverter mode, when all the switching transistors are simultaneously turned off, the primary winding L.sub.21 acts to fed back its accumulated energy to the dc voltage V.sub.1 through the diodes D.sub.3 and D.sub.4 or the diodes D.sub.1 and D.sub.4.

A modification of the third embodiment utilizes the same circuit of FIG. 11 but in which the switching transistors Q.sub.1 to Q.sub.4 are controlled in a somewhat different manner from the third embodiment. As shown in FIG. 13, the difference is seen in that, during first period of time T.sub.DC (chopper mode), the first switching transistor Q.sub.1 is controlled to turn on and off while the fourth switching transistor Q.sub.4 is kept turned on (t.sub.1 -t.sub.2), and the third switching transistor Q.sub.3 is controlled to turn on and off while the second switching transistor Q.sub.2 is on (t.sub.3 -t.sub.4). Thus, upon the turning off of the first switching transistor Q.sub.1, the switching transistor Q.sub.4 is cooperative to the diode D.sub.2 to form a closed loop including the inductor L.sub.1 for circulating therethrough the current which is otherwise fed back to the dc voltage source V.sub.1 through the diodes D.sub.3 and D.sub.2 as seen in the third embodiment. Likewise, upon turning off of the third switching transistor Q.sub.3, the second switching transistor Q.sub.2 is cooperative with the diode D.sub.4 to circulate the current which is otherwise fed to the dc voltage source V.sub.1 through the diodes D.sub.1 and D.sub.4 as seen in the third embodiment.

A fourth embodiment of the present invention comprises first and second switching transistors Q.sub.1 and Q.sub.2 connected across the dc voltage source V.sub.1 with first and second diodes D.sub.1 and D.sub.2 connected in antiparallel respectively with the first and second switching transistors Q.sub.1 and Q.sub.2. The inductor L.sub.1 is connected in series with a parallel combination of the discharge lamp 10 and bypass capacitor C.sub.1, which series-parallel combination is connected in parallel with the second switching transistor Q.sub.2. Also included in the circuit is the transformer T of which primary winding L.sub.21 is connected in series with the dc blocking capacitor C.sub.2 across the second switching transistor Q.sub.2. The secondary winding L.sub.22 is inserted in series with the discharge lamp 10 in parallel with the bypass capacitor C.sub.1. In this circuit, the chopper is defined by the first switching transistor Q.sub.1, and the series-parallel combination of the inductor L.sub.1, discharge lamp 10, bypass capacitor C.sub.1, as enclosed in dotted lines CH in FIG. 14. Also, as enclosed in phantom lines IV in the figure, the inverter is defined by, in additions to the above components common the to the chopper, the second switching transistor Q.sub.2 and the series circuit of the primary winding L.sub.21 and the blocking capacitor C.sub.2, and the secondary winding L.sub.22.

In operation, the first and second switching transistors Q.sub.1 and Q.sub.2 are controlled in a manner as shown in FlG. 15 to provide a composite lamp driving current of FIG. 16. That is, in the chopper mode during the first period of time T.sub.DC (t.sub.1 -t.sub.2 and t.sub.3 -t.sub.4), the first switching transistor Q.sub.1 is driven to turn on and off at a first high frequency to provide to the chopped dc voltage which is smoothed by the inductor L.sub.1 and of which high frequency component is bypassed through the bypass capacitor C.sub.1 to flow the resulting smoothed dc current to the discharge lamp 10. In the inverter mode during the second period of time T.sub.HF (t.sub.2 -t.sub.3), the first and second switching transistors Q.sub.1 and Q.sub.2 are driven to alternately turn on and off with a dead-time therebetween at a second high frequency, which may be equal to or different from the first high frequency, to cause an oscillating current through the circuit of the primary winding L.sub.21 and the blocking capacitor C.sub.2 as repeating to charge and discharge the blocking capacitor C.sub.2 in the same manner as effected in the previous embodiments. Thus, there is developed at the secondary windinq L.sub.22 the induced current which will circulate through the closed loop of the secondary winding L.sub.22, discharge lamp 10, and the bypass capacitor C.sub.1 as the inductor L.sub.1 acts to block such high frequency alternating current. In the inverter mode, the current flowing to the inductor L.sub.1 is kept at a minimum by suitably selecting the values for the inductor L.sub.1, bypass capacitor C.sub.1, the secondary winding L.sub.22, and the driving frequency or the second frequency at which the first and second switching transistors Q.sub.1 and Q.sub.2 are operated.

The discharge lamp driving circuit comprises the first and second switching transistors Q.sub.1 and Q.sub.2 connected across the dc voltage source V.sub.1 with first and second diodes D.sub.1 and D.sub.2 connected in antiparallel relation respectively to the first and second switching transistors Q.sub.1 and Q.sub.2. A third switching transistor Q.sub.3 is connected in series with the inductor L.sub.1 and the parallel combination of the discharge lamp 10 and the bypass capacitor C.sub.1 across the first switching transistor Q.sub.1. The transformer T is connected in circuit with its primary winding L.sub.21 connected in series with the blocking capacitor C.sub.2 across the second switching transistor Q.sub.2 and with its secondary winding L.sub.22 inserted in series with the discharge lamp 10 and in parallel with the bypass capacitor C.sub.1. In this embodiment, the chopper is defined by the second and third switching transistors Q.sub.2 and Q.sub.3, the series-parallel circuit of inductor L.sub.1, discharge lamp 10 and bypass capacitor C.sub.1, as enclosed in the dotted lines CH in FIG. 17, while the inverter is defined by, in addition to the second switching transistor Q.sub.2, the parallel combination of discharge lamp 10 and bypass capacitor C.sub.1 common to the chopper, the transformer T and the blocking capacitor C.sub.2, as enclosed in phantom lines IV in the figure. These switching transistors Q.sub.1, Q.sub.2, and Q.sub.3 are controlled in accordance with a timing chart of FIG. 18 so as to provide the like composite lamp driving current as seen shown in FIG. 16 of the fourth embodiment. That is, in the chopper mode during the period T.sub.DC (t.sub.1 -t.sub.2 and t.sub.3 -t.sub.4), the second switching transistor Q.sub.2 is driven to turn on and off at a first high frequency while the first and third switching transistors Q.sub.1 and Q.sub.3 are turned off and on, respectively, whereby providing the smoothed dc current to the discharge lamp 10 in the same manner as in the fourth embodiment. In the inverter mode during the period T.sub.HF (t.sub.2 -t.sub.3), the first and second switching transistors Q.sub.1 and Q.sub.2 are driven to alternately turned on and off with a dead-time therebetween at a second high frequency which may be equal to or different from the first high frequency, in order to produce an high frequency alternating current through the primary winding L.sub.21 and consequently circulate the resulting high frequency alternating current through the closed loop of secondary winding L.sub.22, discharge lamp 10, and bypass capacitor C.sub.1, in the same manner as seen in the previous fourth embodiment. In the inverter mode, the third switching transistor Q.sub.3 is kept turned off so that the discharge lamp 10 will not receive the current directly from the blocking capacitor C.sub.2 or from the dc voltage source V.sub.1.

Referring to FIG. 19, a sixth embodiment of the present invention is shown to comprises the first and second switching transistors Q.sub.1 and Q.sub.2 which are coupled with a pair of capacitors Q.sub.3 and Q.sub.4 in a half-bridge configuration having its input ends connected across the dc voltage source V.sub.1. First and second diodes D.sub.1A and D.sub.2A are connected in antiparallel relation to the first and second switching transistors Q.sub.1 and Q.sub.2, respectively. Included in the circuit is a diode network composed of a series combination of diodes D.sub.11 and D.sub.12 and another series combination of diodes D.sub.21 and D.sub.22. These series combinations are connected in parallel with one another between the first and second switching transistors Q.sub.1 and Q.sub.2. Another first diode D.sub.1B is connected in series with diode D.sub.21 in antiparallel relation to the first switching transistor Q.sub.1. Likewise, another second diode D.sub.2B is connected in series with diode D.sub.22 in antiparallel relation to the second switching transistor Q.sub.2. A series circuit of a first inductor L.sub.1 and the parallel combination of discharge lamp 10 and bypass capacitor C.sub.1 is connected between the output ends of the half-bridge or between the connection of diodes D.sub.11 and D.sub.12 and the connection of capacitors C.sub.3 and C.sub.4. Also included in the circuit is the transformer T with its secondary winding L.sub.22 connected in series with the discharge lamp 10 in parallel with the bypass capacitor C.sub.1 and with its primary winding L.sub.21 connected in parallel with a capacitor C.sub.5. The parallel combination of the primary winding L.sub.21 and capacitor C.sub.5 is connected in series with a second inductor L.sub.3 and a blocking capacitor C.sub.2 between the connection of capacitors C.sub.3 and C.sub.4 and the connection of diodes D.sub.21 and D.sub.22. ln the above circuit, the capacitors D.sub.3 and C.sub.4 are charged from the dc voltage V.sub.1 and in return supplies to the discharge lamp 10 the like composite lamp driving current of FIG. 5 as the first and second switching transistors Q.sub.1 and Q.sub.2 are driven in accordance with a timing diagram of FIG. 20.

In the chopper mode effected during the period T.sub.DC (t.sub.1 -t.sub.2 and t.sub.3 -t.sub.4 in FIG. 20), one of the first and second switching transistors Q.sub.1 and Q.sub.2 is driven to turn on and off at a first high frequency while the other switching transistor is kept turned off, in order to provide across the output ends of the half-bridge the chopped voltage from one of the corresponding capacitors C.sub.3 and C.sub.4. The chopped voltage is smoothed by the first inductor L.sub.1 and has its high frequency component routed through the bypass capacitor C.sub.1, whereby applying the resulting smoothed dc current to the discharge lamp 10. Such smoothed dc current has the polarity which is reversed from the period of t.sub.1 -t.sub.2 to the period of t.sub.3 to t.sub.4. The above chopper operation can be explained in terms of the following repeated sequence. For example, in the period T.sub.DC of t.sub.1 -t.sub.2, when the first transistor Q.sub.1 is on while the second switching transistor Q.sub.2 is off, the capacitor C.sub.3 supplies a current which flows through first switching transistor Q.sub.1, diode D.sub.11, first inductor L.sub.1, discharge lamp 10, secondary winding L.sub.22, bypass capacitor C.sub.1, and back to the capacitor C.sub.3. Upon the subsequent turning off of the first switching transistor Q.sub.1, the first inductor L.sub.1 acts to continuously flow the current through the discharge lamp 10, secondary winding L.sub.22, bypass capacitor C.sub.1, capacitor C.sub.4, diode D.sub.2A, and back to the first inductor L.sub.1. During the period T.sub.DC of t.sub.3 -t.sub.4, upon the turning on of the second switching transistor Q.sub.2, the capacitor C.sub.1, supplies a current which flows through secondary winding L.sub.22, discharge lamp 10, bypass capacitor C.sub.1, first inductor L.sub.1, diode D.sub.12, second switching transistor Q.sub.2, and back to capacitor C.sub.1. Upon the subsequent turning off of the second switching transistor Q.sub.2, the first inductor L.sub.1 causes the current to continuously flow therefrom and through diode D.sub.1A, capacitor C.sub. 3, secondary winding L.sub.22, discharge lamp 10, and back to the first inductor L.sub.1. With provision of the half-bridge configuration, the load circuit including the discharge lamp 10 receive one-half of the voltage of the dc voltage source.

For successfully bypassing the high frequency component of the chopped voltage through the bypass capacitor Chd 1 without causing an unstable lamp operation and at the same time without requiring the capacitor C.sub.1 and the secondary winding L.sub.22 to become bulky, the first high frequency, the inductor of the first inductor L.sub.1, and the capacitance C.sub.1 of the bypass capacitor C.sub.1 may be selected such that the combined impedance of the lamp 10 and the secondary winding L.sub.22 is to be 3 to 10 times that of the bypass capacitor C.sub.1.

In the inverter mode during the period T.sub.HF (t.sub.2 -t.sub.3 and t.sub.4 -t.sub.5), the first and second switching transistors Q.sub.1 and Q.sub.2 are controlled to alternately turn on and off with a dead-time therebetween at a second high frequency to provide a high frequency alternating current to the discharge lamp 10 as repeating the following four occurrences (1) to (4). At the first occurrence (1), for example, as indicated in the period of t.sub.2 -t.sub.3 in FIG. 20 in which the second switching transistor Q.sub.2 is turned on while the first switching transistor Q.sub.1 is off, the capacitor C.sub.4 is cooperative with blocking capacitor C.sub.2 to flow a current mainly through primary winding L.sub.21, capacitor C.sub.5, second inductor L.sub.3, blocking capacitor C.sub.2, diode D.sub.22, second switching transistor Q.sub.2, and back to capacitor C.sub.4. At the second occurrence (2) in which both of the first and second switching transistors Q.sub.1 and Q.sub.2, are simultaneously off, the second inductor L.sub.1 is cooperative with the primary winding L.sub.21 to release the accumulated energy to continuously flow the current mainly through blocking capacitor C.sub.2, diode D.sub.1B, capacitor C.sub.3, primary winding L.sub.21, capacitor C.sub.5, and back to the second inductor L.sub.3. At the third occurrence (3) in which the first switching transistor Q.sub.1 is on while the second switching transistor Q.sub.2 is off, the capacitor C.sub.3 is cooperative with the blocking capacitor C.sub.2 to flow a current in the opposite direction mainly through first switching transistor Q.sub.1, diode D.sub.21, blocking capacitor C.sub.2, second inductor L.sub.3, primary winding L.sub.21, capacitor C.sub.5, and back to the capacitor C.sub.3. At the fourth occurrence (4) in which both of the first and second switching transistors Q.sub.1 and Q.sub.2 are off, the second inductor L.sub.3 is cooperative with the primary winding L.sub.21 to continuously flow the current mainly through primary winding L.sub.21, capacitor C.sub.5, capacitor C.sub.4, diode D.sub.2B, blocking capacitor C.sub.2, and back to the second inductor L.sub.3.

In this connection, the diodes D.sub.1B and D.sub.2B, which are connected in antiparallel relation respectively to the first and second switching transistors Q.sub.1 and Q.sub.2, provide first and second bypass routes for continuously flowing the instantaneous currents released from the second inductor L.sub.3 and the primary winding L.sub.21 at the second and fourth occurrences in which both of the switching transistors Q.sub.1 and Q.sub.2 are off.

Likewise, in the net second period of time T.sub.HF (t.sub.4 -t.sub.5) which is initiated by turning on and off the first switching transistor Q.sub.1 which has been active in the previous first time of period T.sub.DC, the first and second switching transistors Q.sub.1 and Q.sub.2 are controlled to alternately turn on and off to produce the high alternating current through the primary winding L.sub.21.

In this manner, during each second period of time T.sub.HF, the high frequency alternating current continues to flow the primary winding L.sub.21 to thereby induce at the secondary winding L.sub.21 the corresponding high frequency alternating current which circulates through the closed loop of the secondary winding L.sub.22, discharge lamp 10, and bypass capacitor C.sub.1 as the inductor L.sub.1 blocks such high frequency alternating current, whereby driving the discharge lamp 10 by thus obtained high frequency alternating current.

It should be noted at this point that during the above inverter mode the first and second switching transistors Q.sub.1 and Q.sub.2 are driven at the second high frequency which is higher than the first high frequency at which they are driven in the above chopper mode, such that the first inductor L.sub.1 block the second high frequency to thereby allow only a minute current to divert into the circuit of first inductor L.sub.1 and capacitor C.sub.1. It should be also noted that, during the chopper mode, the above diode network of diodes D.sub.11, D.sub.12, D.sub.21, and D.sub.22 acts to prevent the current from diverting into the inverter circuit of blocking capacitor C.sub.2, second inductor L.sub.3 , and primary winding L.sub.21 since the diode network acts to maintain the voltage of the blocking capacitor C.sub.2 once it is charged up to one-half of the voltage of the dc voltage source V.sub.1.

To explain the diode network operation in detail with reference to the occurrences during the chopper operation T.sub.DC, diodes D.sub.12 and D.sub.21 are cooperative to block the current from diverting into the inverter circuit when the first switching transistor Q.sub.1 is on while the second transistor is off; diodes D.sub.11, D.sub.12, D.sub.21, and D.sub.22 are cooperative to block the same when both of the first and second switching transistors are off; and diodes D.sub.12 and D.sub.22 are cooperative to block the same when the second switching transistor Q.sub.2 is on while the first switching transistor Q.sub.1 is off.

With this arrangement of blocking the current from diverting into the inverter circuit during the chopper operation T.sub.DC, no substantial alternating current is induced at the secondary windinq L.sub.22 to thereby keep the smoothed dc current free from any ripple which would otherwise be superimposed thereupon in the absence of the diode network and would certainly result in unstable lamp operation.

In this embodiment, the discharge lamp 10 may be ignited with the addition of an L-C resonant starter circuit for inducing an increased ignition voltage across the secondary winding L.sub.22 while providing the high frequency alternating current to the discharge lamp 10 by the operation of the inverter. It is also effective to utilize a pulse-width-modulation technique for controlling the output of the circuit while monitoring the condition of the lamp 10 by means of the lamp current or the lamp voltage.

The period T.sub.HF of the high frequency alternating current within one cycle (T.sub.HF 30 T.sub.DC) of the composite lamp driving current may differ from differing discharge lamps utilized, but is found, for example, for a typical 80 W mercury-arc lamp having a rated lamp voltage of 115 V, to be preferably less than 20% of the on cycle in order to prevent the acoustic resonance and assure a stable lamp operation. In this instance, the one cycle (T.sub.HF +T.sub.DC) is preferably between several milliseconds and several tens of microseconds for the purpose of restraining flicker and noises.

The first and second switching frequencies can be suitably selected in relation to the inductances and capacitances of the circuit. For example, when first inductor L.sub.1, the bypass capacitor C.sub.1, second inductor L.sub.3 blocking capacitor C.sub.2, capacitor C.sub.5 are selected to have respective values that L.sub.1 =0.2 mH, C.sub.5 =0.1 .mu.F, L.sub.3 =0.2 mH, C.sub.2 =0.15 .mu.F, and C.sub.5 =0.033 .mu.F for driving the above mercury-arc lamp with the dc voltage source V.sub.1 of 280 V, the first and second switching transistors Q.sub.1 and Q.sub.2 are operated respectively at 40 KHz during the period T.sub.DC and respectively at 80 KHz during the period T.sub.HF for providing the composite lamp driving current as indicated in FIG. 5.

A seventh embodiment of the present invention has the similar circuit arrangement to that of the sixth embodiment except that the chopping operation is effected only by the first transistor Q.sub.1. That is, in the chopper mode, only the first switching transistor Q.sub.1 is driven to turn on and off, while in the inverter mode, both of the first and second switching transistors Q.sub.1 and Q.sub.2 are driven to operate in the same manner as in the sixth embodiment, thus providing the composite lamp driving current as seen in FlG. 16 The like diode network composed of diodes D.sub.11, D.sub.12, D.sub.21, and D.sub.22 is also included to prevent the diversion of the undesired current between the series circuit of first inductor L.sub.1, discharge lamp 10, bypass capacitor C.sub.1, and secondary winding L.sub.22 and the inverter circuit of blocking capacitor C.sub.2, second inductor L.sub.3, and primary winding L.sub.21.

Referring now to FIG. 22, an eighth embodiment of the present invention is shown to comprise first and second switching transistors Q.sub.1 and Q.sub.2 connected in series across a dc voltage source V.sub.1 with first and second diodes D.sub.1 and D.sub.2 connected in antiparallel relation to the first and second switching transistors Q.sub.1 and Q.sub.2, respectively. The first and second switching transistors Q.sub.1 and Q.sub.2 are coupled with capacitors C.sub.3 and C.sub.4 in a half-bridge configuration of which input ends are connected to the dc voltage source V.sub.1. Connected between the output ends of the half-bridge is a series circuit of an inductor L.sub.1 and a parallel combination of a discharge lamp 10 and a bypass capacitor C.sub.1. The first and second switching transistors Q.sub.1 and Q.sub.4 are controlled in accordance with a timing chart of FIG. 23 to provide the like composite lamp driving current as shown in FIG. 5, as repeating the chopper and inverter functions.

In the chopper mode defined within the period T.sub.DC (t.sub.1 -t.sub.2, t.sub.3 -t.sub.4) of FIG. 23, one of the first and second switching transistors Q.sub.1 and Q.sub.2 is driven to turn on and off at a first high frequency while the other switching transistor is kept turned off in order to provide a chopped voltage supplied from the corresponding one of the capacitors C.sub.3 and C.sub.4. The chopped voltage is then smoothed by the inductor L.sub.1 and of which high frequency component is bypass through the bypass capacitor C.sub.1, thus providing the resulting smoothed dc current to the discharge lamp 10. As apparent from FIG. 23, the first and second switching transistors Q.sub.1 and Q.sub.2 are alternately made active from one cycle to the subsequent cycle to thereby reverse the polarity of the dc current applied to the discharge lamp 10 in a repeated manner. Such polarity reversal is not essential and therefore only one of the switching transistors Q.sub.1 and Q.sub.2 may be made active in the chopper mode of providing the dc current.

In the inverter mode defined within the period T.sub.HF (t.sub.2 -t.sub.3, t.sub.4 -t.sub.5), the first and second switching transistors Q.sub.1 and Q.sub.2 are driven to alternately turn on and off with a dead-time therebetween at a second high frequency which is lower than the first high frequency, such that the discharge lamp 10 receives a resulting high frequency alternating current as the circuit repeats the following four occurrences (1) to (4), as indicated in FIG. 23. At the first occurrence (1) in which the first switching transistor Q.sub.1 is off and the second switching transistor Q.sub.2 is on, the capacitor C.sub.4 discharges and causes a current to flow therefrom mainly through the discharge lamp 10, inductor L.sub.1, second switching transistor Q.sub.2, and back to the capacitor Q.sub.4. At the second occurrences (2) in which the first and second switching transistors Q.sub.1 and Q.sub.2 are simultaneously off, the inductor L.sub.1 acts to continuously flow the current therefrom mainly through diode D.sub.1, capacitor C.sub.3, discharge lamp 10, and back to the inductor L.sub.1. At the third occurrence (3) in which the first switching transistor Q.sub.1 is on while second switching transistor Q.sub.2 is off, the capacitor C.sub.3 discharges and causes a current to flow therefrom in the opposite direction through first switching transistor Q.sub.1, inductor L.sub.1, discharge lamp 10, and back to the capacitor C.sub.3. At the fourth occurrence (4) when first and second switching transistors Q.sub.1 and Q.sub.2 are simultaneously off, the inductor L.sub.1 act to continuously flow the current therefrom through discharge lamp 10, capacitor C.sub.4, diode D.sub.2, and back to the inductor L.sub.1.

In the above circuit, the inductance of L.sub.1 is selected to have such a value that the second high frequency of the inverter operation will not be lowered to audio frequency. In this connection, the first high frequency of the chopper operation is selected to be higher than the second high frequency by such an extent as to increase the impedance of the inductor L.sub.1 which limits the current flowing through the discharge lamp 10.

Typical values for the components of the above circuit are, for instance, that C.sub.1 =0.7 .mu.F, L.sub.1 =0.1 mH when V.sub.1 =140 V and that Q.sub.1 and Q.sub.2 are driven to operate at 100 KHz in the chopper mode and at 30 KHz in the inverter mode.

A ninth embodiment of the present invention utilizes a dc voltage source comprising a diode bridge DB connected to an ac voltage source V.sub.AC through a filtering circuit FT. The lamp driving circuit of the present embodiment is similar to that of the eighth embodiment except that the output of the dc voltage source DB is connected across the first switching transistor Q.sub.1 through a second inductor L.sub.2. Thus, in the chopper mode, only the first switching transistor Q.sub.1 is driven to turn on and off in order to provide the smoothed dc current to the discharge lamp 10 in the manner as described with reference to the eighth embodiment. The inverter operation of the circuit is identical to that of the eighth embodiment. In this sense the first switching transistor Q.sub.1 is commonly utilized both in the chopper and inverter modes. The characterizing feature of the present embodiment resides in that, in the chopper mode, the first switching transistor Q.sub.1 is cooperative with the second inductor L.sub.2 and diode D.sub.2 to act as a positive booster for increasing the magnitude of the voltage acting to the series circuit of capacitors C.sub.3 and C.sub.4. That is, the energy accumulated in the second inductor L.sub.2 during the chopping operation is additive to the dc power source DB to apply the resultant added voltage to the capacitors C.sub.3 and C.sub.4 for charging the same at the high frequency up to the voltage higher than that of the ac voltage source V.sub.AC. Also with this result, the input current I.sub.AC can take the form of a sine wave, thereby making it possible to have an improved power factor of more than 90%.

A tenth embodiment of the present invention is similar to the eight embodiment except that another pair of switching transistors Q.sub.3 and Q.sub.4 is incorporated as replacing the pair of capacitors C.sub.3 and C.sub.4 to form a full-bridge configuration with diodes D.sub.3 and D.sub.4 connected in antiparallel relation to the switching transistors Q.sub.3 and Q.sub.4. These four switching transistors Q.sub.1 to Q.sub.4 are driven in accordance with a timing chart of FIG. 26 to provide the like composite lamp driving current as shown in FIG. 5.

In the chopper mode defined within the period of T.sub.DC (t.sub.1 -t.sub.2) during which the second and third switching transistors Q.sub.2 and Q.sub.3 are off, the first switching transistor Q.sub.1 is turned on and off at a first high frequency while the fourth switching transistor Q.sub.4 is kept turned on in order to provide from the dc voltage V.sub.1 a chopped voltage which is smoothed by the inductor L.sub.1 and of which high frequency component is bypassed through the bypass capacitor C.sub.1, thereby providing to the discharge lamp 10 the smoothed dc voltage. Also in the chopper mode defined within the period of T.sub.DC (t.sub.3 -t.sub.4) during which the first and fourth switching transistor Q.sub.1 and Q.sub.4 is off, the third switching transistor Q.sub.3 is driven to turn on and off at the first frequency while the second switching transistor Q.sub.2 is kept turned on, thereby providing the smoothed dc voltage of the opposite polarity in the like manner as above.

In the inverter mode defined within the period T.sub.HF (t.sub.2 -t.sub.3), the first and fourth switching transistors Q.sub.1 and Q.sub.4 are driven to turn on and off at a second high frequency, which is lower than the first high frequency, in synchronism with one another and in an alternate manner with the second and third switching transistors Q.sub.2 and Q.sub.3 turning on and off in synchronism with one another, thus providing the resulting high frequency alternating current to the discharge lamp 10 the high frequency alternating current. In the inverter mode defined within the period T.sub.HF (t.sub.4 -t.sub.5), these four transistors Q.sub.1 to Q.sub.4 are operated in the opposite manner to provide the like high frequency alternating current to the discharge lamp 10. The second frequency, at which the switching transistors Q.sub.1 to Q.sub.4 are operated to provide the high frequency alternating current during the period T.sub.HF (t.sub.2 -t.sub.3 and t.sub.4 -t.sub.5), is selected such as to cause a resonance in the series circuit of bypass capacitor C.sub.1 and inductor L.sub.1, enablinq to apply a high voltage sufficient to operate the discharge lamp stably. Typical values for the components of the above circuit are, for instance, that C.sub.1 =0.7 .mu.F, L.sub.1 =0.1 mH when V.sub.1 =140 V and that Q.sub.1 and Q.sub.2 are driven to operate at 100 KHz in the chopper mode and at 30 KHz in the inverter mode.

The circuit of FIG. 25 of the tenth embodiment may be operated in accordance with a timing chart of FIG. 27 for providing the like composite lamp driving current to the discharge lamp. In this modification which is identical to the tenth embodiment except for the switching operation in the chopper mode. That is, during the period T.sub.DC (t.sub.1 -t.sub.2), the first and fourth switching transistors Q.sub.1 and Q.sub.4 are driven to simultaneously turn on and off, and during the period T.sub.DC (t.sub.3 -t.sub.4) the second and third switching transistors Q.sub.2 and Q.sub.3 are driven to simultaneously turn on and off. With this result, upon the simultaneous off of the paired transistors, the energy stored in the inductor L.sub.1 in the previous turning on of the switching transistors is allowed to flow back to the dc voltage V.sub.1 through the corresponding two of the diodes D.sub.1 to D.sub.4. For example, when the switching transistors Q.sub.1 and Q.sub.4 are simultaneously off after being turned on during the period T.sub.DC of t.sub.1 -t.sub.2, the inductor L.sub.1 causes an instantaneous current to flow therefrom through diode D.sub.3, dc voltage source V.sub.1, diode D.sub.2, discharge lamp 10, and back to the inductor L.sub.1. And when the second and third switching transistors Q.sub.2 and Q.sub.3 are off after being turned on, the inductor L.sub.1 acts to continuously flow an instantaneous current in opposite direction therefrom through discharge lamp 10 and bypass capacitor C.sub.1, diode D.sub.1, dc voltage source V.sub.1, diode D.sub.4 and back to the inductor L.sub.1.