Circuitry for Electronically Commutating a Direct-Current Motor

The invention concerns circuitry for electronically commutating a multiphase direct-current motor, whereby markers are distributed around the circumference of a rotor, the markers provide, in conjunction with a sensor, the commutating pulses that activate the motor's phase conductors, the pulses supplied by the sensor advance a counter that has output terminals, the output terminals control switches that switch the phase conductors alternately to operating and to reference voltage, and the counter re-zeroes itself after a certain number of pulses. Circuitry of this type is known. It is described for example in German OS No. 3 435 270. Its purpose is to activate the motor's various phase conductors at appropriate instants. The markers on the circumference of the rotor can be light-permeable or reflecting points that operate in conjunction with light-sensitive sensors or they can be permanent magnets that act on a sensor in the form of a Hall generator. The markers generate a periodic sequence of pulses that activate the phase conductors, which a counter cyclically connects by way of bipolar switches to either operating voltage or reference voltage. The sequence is constructed when the counter re-zeroes itself subsequent to a certain number of pulses that is a whole-number divisor of the number of markers.

Sometimes, however, the counter will re-zero itself a pulse too early or too late, preventing optimum activation of the phase conductors. It is then no longer possible to attain optimum torque, and the efficiency of the motor is detrimentally affected.

The object of the invention is to ensure that the motor will always be at optimum torque.

This object is attained by way of the invention recited in the major claim. Further embodiments that attain the invention will be evident from the subsidiary claims.

The invention will now be described with reference to a head-drum motor for a videorecorder.

FIG. 1 illustrates a circuit for electronic commutation,

FIGS. 2, 3, and 4 are graphs that explicate FIG. 1, and

FIG. 5 illustrates various means of attaining the object of the invention.

The invention is illustrated in FIG. 1 by way of a circuit for commutating the head-drum motor in a videorecorder. The motor in the illustrated example has a stator with three phase belts L.sub.AB, L.sub.BC, and L.sub.CA, which drive a rotor in that the currents that flow into the belts act on permanent magnets mounted on the rotor. Rotor R is provided with markers M that commutate the motor in that they are associated with a sensor S that detects them and derives commutating pulses K from them. Indices M may consist of small magnets that operate in conjunction with a sensor in the form of a Hall generator. Indices M can also be light-permeable or reflecting points that operate in conjunction with an optical scanner or light barrier. The markers can also be magnets that operate in conjunction with a magnetic resistor. Commutating pulses K arrive at the input terminal of a counter Z that re-zeroes itself subsequent to a number of incoming pulses. This occurs in conjunction with a logic circuit L that creates a re-zeroing pulse from a desired terminal position on the part of the counter. The number x of counter pulses needed to re-zero counter Z equals a whole-number divisor of the number N of markers M on rotor R. The illustrated example utilizes 24 markers M to commutate the motor. Counter Z can for example be a synchronized BCD counter such as the Texas Instruments SN 74192. For x=6, counter Z will re-zero subsequent to 6 incoming pulses, on the occurrence of the seventh pulse, that is. The outputs from counter Z arrive in a decoder circuit D (e.g Texas Instruments 74/54) that supplies a pulse in cyclical sequence to each of its output terminals 1 through 6 whenever a commutating pulse K arrives at the input terminal of counter Z. The output terminals 1 through 6 of decoder circuit D are associated by way of inverter stages II through I6 and of OR-gates 01 through 06 in such a way that their output terminals activate switches S1 through S6 so that the requisite currents will flow into phase belts L.sub.AB, L.sub.BC, and L.sub.CA.

FIG. 2 is a graph illustrating the chronological relation between the voltages at points A, B, and C. Plotted in FIG. 2a is the sequence of pulses deriving from sensor S during one rotation of rotor R. It consists of 24 commutating pulses K that create 24 beats. One pulse K' in the series is employed to construct a head-switching pulse KU (FIG. 2b) for example, in conjunction with a monostable flip-flop MF.

The pulses illustrated in FIGS. 2c through 2h represent the output signals from decoder-circuit output terminals 1 through 6 as inverted by inverter stages I1 through I6. The curves in FIGS. 2i, 2k, and 2l represent the voltages at the points A, B, and C in FIG. 1.

At the first beat, output terminal A is provided with a positive voltage by closing switch S1, and output terminal C with reference voltage by closing switch S4, allowing a current I.sub.AB to flow. At the second beat, switches S1 and S6 are closed, allowing a current I.sub.AC to flow. Cyclic advancing of output terminals 1 through 6 provides currents I.sub.BC, I.sub.BA, and I.sub.CB, subsequent to which the sequence 1 through 6 is repeated. Switches S1 through S6 are for simplicity's sake illustrated as mechanical switches, although they are actually of course electronic switches like transistors or switch current sources.

Sometimes, even though the motor is rotating in the correct direction, counter Z will re-zero a beat too early or too late. In this case, the appropriate phase belts L.sub.AB, L.sub.BC, and L.sub.CA will not be supplied with current and optimum torque will be impossible.

FIG. 3 illustrates the effects of such a deleterious re-zeroing of the counter. The pulses at the output terminals 1' to 6' of inverter stages I1 through I6 illustrated in FIGS. 3b through 3g will be displaced one beat in relation to the pulses illustrated in FIG. 3a. The chronological activating voltages illustrated in FIGS. 3h through 3k as necessary for optimum torque will accordingly not occur at the points A, B, and C of the circuit illustrated in FIG. 1.

FIG. 4 illustrates the effect of the invention.

The motor begins to rotate at time to, and the first marker M to travel past sensor S releases a commutating pulse K, advancing counter Z. The output signals 1' through 6' at inverter stages I1 through I6 are plotted in FIGS. 4b through 4g. The situation is identical with that illustrated in FIG. 3 until time t.sub.1. As of time t.sub.1 counter Z is compulsorily re-zeroed, and the originally inappropriate activation illustrated in FIGS. 4a, 4i, and 4k will as of that point of time change to the desired type. This state is attained no later than subsequent to one revolution of the motor.

FIG. 5 illustrates three different ways of distributing additional markers M'. The special marker M' illustrated in FIG. 5a is identical with the marker that generates the head-switching pulses. The special marker M' illustrated in FIG. 5b is positioned in another row outside commutating markers M. The special markers M' can also be located between commutating markers M as illustrated in FIG. 5c, in which case they are utilized to generate a readying signal for re-zeroing counter Z, which is carried out by a chronologically subsequent commutating pulse. It is also possible to exploit some of markers M to commutate the motor.