Matched Spectral Null Trellis Codes for Partial Response Channels

U.S. applications Ser. Nos. 07/169,918 and 07/169,919, filed concurrently with this application, disclose other techniques for improving coding gain on partial response channels and different most probable sequence calculations for the outputs.

This invention relates to techniques for transmission of binary digital data over partial response channels using maximum likelihood sequence detection (PRML). More particularly, it relates to trellis codes for PRML channels which achieve significant coding gain at high rates with reduced hardware requirements.

The following prior art references are considered by applicants to be the most pertinent to the present invention:

[A] J. K. Wolf and G. Ungerboeck, "Trellis coding for partial-response channels", IEEE Trans. Comm., Vol. COM-34, No. 8, August 1986, pp. 765-773.

[B] T. A. Lee and C. Heegard, "An Inversion Technique for the Design of Binary Convolutional Codes for the 1-D.sup.N Channel", Proc. IEEE Regional Meeting, Johns Hopkins, February 1985.

[C] A. R. Calderbank, C. Heegard and T. A. Lee, "Binary convolutional codes with application to magnetic recording", IEEE Trans. Info. Th., Vol. IT-32, No. 6, November 1986, pp. 797-815.

[D] H. Thapar and A. Patel, "A Class of Partial Response Systems for Increasing Storage Density in Magnetic Recording", presented at Intermag 1987, Tokyo, Japan.

[E] R. Wood, "Viterbi Reception of Miller-Squared Code on a Tape Channel", Proceedings of IERE Video and Data Recording Conference, Southampton, England, 1982.

[F] K. Immink and G. Beenker, "Binary transmission codes with higher order spectral zeros at zero frequency", IEEE Trans. Info. Th., Vol. 33, No. 3, May 1987, pp. 452-454.

Reference [E] demonstrates the use of a simplified Viterbi detector in conjunction with the rate 1/2, Miller-squared code on a full response tape channel. The code has a spectral null at zero frequency, implying bounded accumulated charge, and the receiver operates with a degenerate state diagram which tracks only the accumulated charge. Coding gain arises from the fact that the code has minimum free Hamming distance 2, versus the minimum distance of 1 for uncoded binary data.

Reference [F] describes binary codes wherein both the code power spectral density and its low order derivatives vanish at zero frequency, and the minimum Hamming distance of a K-th order zero-disparity code is at least 2(K+1).

The techniques heretofore disclosed, including those in above-cited references [A], [B], [C], [E] and [F], do not teach the application of trellis codes with K-th order spectral zeros to enable high-rate reliable transmission on partial response channels. Nor do they describe methods for obtaining enhanced coding gain by exploiting the memory inherent in the partial response channel function.

There is a need for techniques which can provide high rate codes that improve upon those found in the prior art by enabling significantly reduced hardware requirements, particularly in the maximum-likelihood detector, for specified coding gains. In addition, such techniques should provide high rate codes with significant coding gains suitable for partial response channels, such as disclosed in reference [D], which are not addressed by the prior art techniques.

Toward this end and according to the invention, an improved method is described for coding input strings at high rate to improve the coding gain of partial response channels and provide an output of improved reliability. This method involves determining each frequency at which there is a zero in the transfer function of a partial response channel, and encoding an input string into a binary code string having a power spectrum value of zero for each such frequency. (Those frequencies at which the power spectrum value is zero are herein defined as "spectral null frequencies"; i.e., those frequencies at which no energy is transmitted.) A channel output sequence is generated responsively to transmission of the code string through the channel. The most probable code sequence is calculated from the channel output sequence, and decoded to provide the output.

The code strings have the property that the code power spectrum vanishes at those frequencies where the channel transfer function vanishes. This "matching" of spectral null frequencies produces enhanced coding gains by exploiting the memory inherent in the channel. Additional coding gain is achieved by increasing the order of the spectral null of the code strings at these frequencies.

Hardware requirements are reduced by means of a detector which keeps track of only the frequency spectral content of the code strings. This simplified detector achieves substantially the performance of a full maximum likelihood detector for the code.

FIG. 1 is a block diagram of a recording system employing a trellis coding technique according to the invention;

FIG. 2 is a canonical state diagram for binary sequences having a spectral null at zero frequency; i.e., where f=0;

FIG. 3 is a canonical state diagram for binary sequences having a spectral null at one-half the Nyquist frequency; i.e., where f=1/2T and T is the code symbol period;

FIG. 4 is a canonical state diagram for binary sequences having simultaneous spectral nulls both at zero frequency (f=0) and at one-half the Nyquist frequency (f=1/2T);

FIG. 5 is a detector trellis for rate 2/3 trellis code on a dicode (1-D) channel;

FIG. 6 is a detector trellis for rate 2/3 trellis code on a (1-D).sup.2 channel;

FIG. 7 is a detector trellis for rate 2/3 trellis code on a class 1 (1+D) channel;

FIG. 8 is a detector trellis for rate 2/3 trellis code on a class 2 (1+D).sup.2 channel;

FIG. 9 is a tabular representation of a detector trellis for rate 2/3 trellis code on an "extended" class 4 (1-D) (1+D).sup.2 channel;

FIG. 10 is a detector trellis for rate 3/4 trellis code on a dicode (1-D) channel;

FIG. 11 is an encoder structure for rate 4/5 trellis code on a dicode (1-D) channel;

FIG. 12 is a decoder structure for rate 4/5 trellis code on a dicode (1-D) channel;

FIG. 13 is a detector trellis for rate 4/5 trellis code on a dicode (1-D) channel.

According to the invention, an improved method is described for constructing high rate (e.g., 2/3, 3/4, 4/5) trellis codes for partial response channels. Several new codes are described for channels with transfer polynomials of the form (1-D).sup.M (1+D).sup.N, with emphasis on the cases of greatest current interest in magnetic and optical data recording: namely, dicode (1-D), class 4 (1-D.sup.2), extended class 4 (1-D)(1+D).sup.2, class 1 (1+D), and class 2 (1+D).sup.2. The improved method is also applicable to a (1-D).sup.2 partial response channel.

This improved method utilizes a unique principle herein referred to as "matched spectral nulls": i.e., the trellis code spectrum is designed to have nulls at frequencies where the channel transfer function has a null, thereby providing improved coding gains and reduced Viterbi decoder complexity.

As depicted in FIG. 1, input data, such as in the form of binary symbol strings, is transmitted from a bus 10 to an encoder 11. Encoder 11 produces a binary code symbol sequence which serves as input to a partial response channel 12. This code has a power spectrum of zero for each frequency at which there is a zero in the transfer function of the channel 12; i.e., the code sequences have spectral nulls which match those of the partial response channel. A channel output sequence is generated by partial response channel 12 and detected at the channel output by a detector 13. This detector calculates the most probable code sequence from the channel output sequence. Detector 13 reduces computational and hardware requirements by tracking only the frequency spectral content of the channel output sequence, thereby producing a near maximum-likelihood estimate (or most probable code sequence) of the transmitted original data sequence supplied via bus 10. A decoder 14 then generates from the detected sequence the matched spectral null code output data in a bus 15.

This code format and code detection technique are founded on an analysis of Euclidean distance properties of partial response output sequences generated by inputs satisfying the matched spectral null constraints, which will now be briefly described.

Binary sequences with spectral null constraints are described in the literature by so called "canonical state diagrams" comparable to those in FIGS. 2-4. Specifically, for frequencies f.sub.1, . . . ,f.sub.n, the canonical diagram G.sup.f 1, . . . ,f.sub.n is a countable state diagram with edge labels from the binary alphabet which satisfies these requirements:

1. Every finite subdiagram generates a set of sequences with spectral nulls at f.sub.1, . . . ,f.sub.n.

2. Any finite state diagram which produces nulls at f.sub.1, . . . ,f.sub.n can be suitably "collapsed" in a label-preserving manner to a subdiagram of G.sup.f 1, . . . ,.sup.f n.

The canonical diagram, denoted G.sup.0, for a null at zero frequency, f=0, is shown in FIG. 2. The diagram, denoted G.sup.1/2T, for a null at one-half the Nyquist frequency, f=1/2T, where T is the code symbol period, is shown in FIG. 3. The canonical diagram, denoted G.sup.0,1/2T, for simultaneous nulls at f=0 and f=1/2T is shown in FIG. 4.

G.sub.N.sup.0 and G.sub.N.sup.1/2T denote the subdiagrams of G.sup.0 and G.sup.1/2T which contain N consecutive states. The notation G.sub.N.sup.0,1/2T refers to the subdiagram of G.sup.0,1/2T with states forming an N by N square.

The Appendix shows the derivation of the novel bounds on the free Euclidean distance d.sup.2.sub.free of the channel output sequences, which translate into the coding gains provided by matched spectral null codes in the presence of additive white Gaussian noise. These bounds validate the coding technique depicted in FIG. 1. Specifically, these coding gain bounds are as follows:

Bound 1 (simple channel null): For the dicode (and class 1) partial response channel, the minimal trellis describing the output sequences produced by the input constraint diagram G.sub.N.sup.0 (and G.sub.N.sup.1/2T, respectively) satisfies the condition: ##EQU1##

Bound 2 (First order channel null): For the (1-D).sup.2 (and class 2) partial response channel, the minimal trellis describing the output sequences produced by the input constraint diagram G.sub.N.sup.0 (and G.sub.N.sup.1/2T, respectively) satisfies the condition:

for N=3, d.sup.2.sub.free =20(7.0 dB gain)

for N=4,5, d.sup.2.sub.free =10(4.0 dB gain)

for N.gtoreq.6, d.sup.2.sub.free =6(1.8 dB gain).

Bound 3 (Simultaneous nulls): For the extended class 4 partial response channel, the minimal trellis describing the output sequences produced by the input constraint diagram G.sub.N.sup.0,1/2T satisfies the condition:

for N=3, d.sup.2.sub.free =12(4.8 dB gain)

for N=4, d.sup.2.sub.free =8(3.0 dB gain)

for N.gtoreq.5, d.sup.2.sub.free .gtoreq.6(1.8 dB gain)

These bounds specify the coding gains which are achievable by high rate trellis codes with matched spectral null constraints. In order to realize this coding gain in practice, a synchronous code with, preferably, a finite-state encoder, such as 11, and sliding block decoder, such as 14, is required which transforms arbitrary binary data into code sequences generated by the constrained diagrams depicted in FIG. 2, 3 and 4.

As previously noted, FIG. 2 depicts a canonical state diagram for binary sequences with a spectral null at zero frequency wherein the sequences are generated in one coordinate (i.e., x) direction; FIG. 3 depicts a canonical state diagram for binary sequences with a spectral null at 1/2T, where T is the code symbol period; and FIG. 4 depicts a canonical state diagram for binary sequences with spectral nulls at zero frequency and at 1/2T. FIG. 4 is a canonical state diagram wherein the sequences are generated in two coordinate (i.e., x and y) directions, employing the k-way interleaving technique disclosed in U.S. Pat. No. 4,567,464 assigned to the assignee of the present invention.

The capacity of a constrained system of sequences is the maximum achievable rate of a code satisfying the specified constraints. The published sliding block code construction methods of Adler-Coppersmith-Hassner and Karabed-Marcus form no part of the present invention, but can be used to construct codes at rates arbitrarily close to the capacity. The capacity C.sub.N of the diagrams G.sub.N.sup.0, G.sub.N.sup.1/2T and G.sub.N.sup.0,1/2T is given by: ##EQU2## so it will be understood that for any desired rate k/n<1, a value of N can be selected large enough to permit the construction of a rate k/n spectral null code with that rate.

If the minimal trellis corresponding to output sequences generated by the canonical diagrams is used as the underlying trellis structure for Viterbi detection, the coding gain is given by Bounds 1, 2 and 3 above.

Note that the codes incorporate limitations on the maximum run-length of zero output samples so that only those code strings having less than a predetermined number of consecutive zeroes in their output channel sequences are produced in order to improve timing and gain control decisions during detection. Also, only the code strings having a predetermined level of reliability are produced; and a finite-state encoder and sliding block decoder are constructed for a code satisfying these maximum run-length constraints on zero samples, as well as eliminating "quasi-catastrophic" sequences which might degrade the worst case coding gain. (Quasi-catastrophic sequences are those represented by more than one distinct path through the state diagram describing the constraint).

Reduced complexity Viterbi detectors are illustrated for 2/3, 3/4 and 4/5 codes, with underlying trellis structures derived from the canonical state diagrams; however, detectors for use with other selectable codes can be easily derived by the method illustrated herein. To simplify the detector further, and to permit high speed detection in which more than one code bit is detected per detection cycle, the trellis is derived from the p-th power of the state diagram. (The p-th power of a state diagram G is the state diagram H with the same states as G, and an edge from state s.sub.i to s.sub.j for each path of length p in G from s.sub.i to s.sub.j. The edge label in H is the sequence of p symbols generated by the corresponding length p path in G). In the cases of interest, the power p is chosen to be the period of the diagram, which is the greatest common divisor of cycle lengths in the diagram. For the diagrams G.sub.N.sup.0 and G.sub.N.sup.1/2T, the period is 2. For the diagrams G.sub.N.sup.0,1/2 T, the period is 4.

Similar techniques can be used to generate matched spectral null trellis codes with larger coding gains by utilizing codes with higher order spectral nulls; that is, zeros in the power spectrum as well as in a sequence of its lower order derivatives. In the Appendix, a proof is set forth of the novel general bound on the free Euclidean distance of channel output sequences when the matched spectral null code and/or partial response channel has higher order spectral nulls at the matched null frequencies.

Bound 4 (Higher order nulls): For a channel with K-th order null at zero frequency or one-half the Nyquist frequency, the minimal trellis describing the output sequences produced by the constraint diagram for sequences with a matched spectral null of order L satisfies the condition:

This bound shows that the matched spectral null codes exploit the distance properties provided by the channel transfer function nulls, since the resulting minimum distance is a linear function of the sum of the orders of the code and channel nulls. This result translates into bounds on coding gains which are achieved by higher order matched spectral nulls. For example, a matched spectral null of order 1 on the dicode channel provides a minimum coding gain of 4.8 dB.

Details are now given for methods of implementing codes with rates 2/3, 3/4 and 4/5 for the (1.+-.D.sup.N) and (1.+-.D).sup.2 channels, with coding gains 3 dB for the first group of channels, and gains 4 dB, 3 dB and 1.8 dB for the second group. The codes can also be applied via interleaving to the (1-D) (1+D).sup.2 channel to get coding gains of 3 dB, 1.8 dB and 1.8 dB.

In the case of (1.+-.D.sup.N) channels, the new codes significantly reduce the Viterbi decoder complexity required to achieve coding gains on the order of 3 dB, compared to the codes obtained by previous methods proposed by Reference [A] and Reference [C]. In addition, the unique method provides a way to construct families of high rate codes for channels which were not addressed by earlier methods; namely, those with transfer polynomials other than (1.+-.D.sup.N).

The biphase code for the dicode channel previously published in Reference [C] is generated immediately by the matched spectral nulls technique, representing a special case. Specifically, the biphase code is described exactly by the subdiagram G.sub.3.sup.0. This subdiagram has capacity precisely 0.5, and, in this case, the biphase code provides a 100% efficient (rate 1/2) code with particularly simple block code structure. The coding gain of the code over the uncoded channel, namely 4.8 dB, is given by Bound 1. Bound 2 gives a new application for the biphase code on the (1-D).sup.2 channel, providing a 7 dB coding gain over the uncoded channel. In this case, the trellis diagram derived from the second power of G.sub.3.sup.0 provides the structure for a full maximum-likelihood decoder since the code is 100% efficient.

For a rate 2/3 code with spectral null at zero frequency, for use with dicode and (1-D).sup.2 channels, the minimum state diagram with adequate capacity is G.sub.4.sup.0, which has capacity C=0.694 . . . .

Table 1 shows a 3-state constrained system derived from the 6th power of G.sub.4.sup.0. The box in row i and column j in the table contains a letter which identifies a list of allowable 6-bit codewords which can originate in state i and terminate in state j. The number in parentheses indicates the number of codewords in the list. The 6-bit codewords in the list are given below the table.

For the dicode channel or (1-D).sup.2 channel, a rate 4/6 finite state encoder is derived by selecting 16 codewords originating from each state and then assigning the 16 distinct 4-bit data words to corresponding codewords. A preferred embodiment is given in Table 2. It is derived from Table 1 by eliminating from row 1 the codewords in list A, and then assigning in a specific manner the 16 distinct 4-bit data words to the 16 codewords originating from each state. The assignment specified here was chosen to simplify the Boolean function which gives the data to codeword correspondence.

Entries in the table are in the form c.sub.1 c.sub.2 c.sub.3 c.sub.4 c.sub.5 c.sub.6 /t.sub.1 t.sub.2 where c.sub.1 c.sub.2 c.sub.3 c.sub.4 c.sub.5 c.sub.6 is the codeword generated, and t.sub.1 t.sub.2 is the next encoder state.

The corresponding sliding block decoder is given in Table 3. Entries in the table are in the form c.sub.1 c.sub.2 c.sub.3 c.sub.4 c.sub.5 c.sub.6 /L where c.sub.1 c.sub.2 c.sub.3 c.sub.4 c.sub.5 c.sub.6 is the received codeword, and L represents the look-ahead decision bit. This bit is a function of the codeword c.sub.7 c.sub.8 c.sub.9 c.sub.10 c.sub.11 c.sub.12, given by: ##EQU3## The symbol "-" denotes a "don't care" value. In the data column, b.sub.1 b.sub.2 b.sub.3 b.sub.4 represents the decoded data.

The encoder and decoder can be reduced to hardware by conventional techniques, using a ROM-based approach or a Boolean logic implementation.

FIG. 5 shows the reduced complexity detector trellis for the rate 4/6 code on the dicode channel, derived from the second power of G.sub.4.sup.0 by incorporating the effect of the channel. This 3-state trellis provides the structure for the Viterbi detection algorithm, which is derived by conventional techniques. The code provides a coding gain of 3 dB (see Bound 1).

The code can be applied in an interleaved manner on interleaved dicode channels, providing the same coding gain of 3 dB.

FIG. 6 depicts the trellis structure for the Viterbi detector when used on the (1-D).sup.2 channel. The code provides a coding gain of 4 dB (see Bound 2).

FIGS. 7 and 8 depict the Viterbi detector trellis structures for the class 1 and class 2 applications, respectively, of the modified code. For the class 1 and class 2 channels, the matched spectral null subdiagram G.sub.4.sup.1/2T is the minimum state diagram which generates the required spectral null at one-half the Nyquist frequency. The code derived above can be converted for use on the class 1 or class 2 channels by adding (modulo 2) the vector .nu.=010101 . . . or .nu.=101010 . . . to the output of the encoder in Table 1. This modified code is decoded by adding (modulo 2) the same vector .nu. to the detected codestream, and then passing the result to original decoder of Table 2. The modified code provides coding gains of 3 dB for class 1 and 4 dB for class 2, respectively.

The modified code can be applied in an interleaved manner on interleaved class 1 channels, providing the same coding gain of 3 dB.

FIG. 9 is a tabular representation of a 15-state Viterbi detector trellis. This is required when the code is applied in an interleaved fashion to the extended class 4 channel, with transfer polynomial (1-D) (1+D).sup.2. It is based upon the fourth power of the diagram G.sub.4.sup.0,1/2T. The code provides a 3 dB coding gain (see Bound 3).

For a rate 3/4 code with spectral null at zero frequency, for use with dicode and (1-D).sup.2 channels, the minimum state diagram with adequate capacity is G.sub.5.sup.0, which has capacity C=0.792 . . . .

Table 4 shows a two state constrained system derived from the 8th power of G.sub.5.sup.0. The box in row i and column j in the table contains a letter which identifies a list of allowable 8-bit codewords which can originate in state i and terminate in state j. The number in parentheses indicates the number of codewords in the list. Using the notation A to denote the list which is obtained by bit-wise complementing (that is, adding 11111111 modulo 2) each codeword in list A, it can be seen that C=B and D=A. The 8-bit codewords in each list are given below the table in hexadecimal form, each codeword being described by a pair of hex symbols.

There are 65 distinct words in each of rows 1 and 2 of the table. For a rate 6/8 code, any 2.sup.6 =64 codewords are selected from each row. Independently of the data word to codeword assignment selected, the corresponding decoder will be a block decoder, decoding each 8-bit codeword directly into a unique 6-bit data word.

For the dicode channel or (1-D).sup.2 channel, Table 5 gives a specific assignment of the 64 distinct 6-bit data words, each represented by a pair of octal symbols, to a specific subset of 64 codewords from row 1 of the table, corresponding to the codewords originating from state 1. The codeword represented by the hex symbols CC has been omitted. In the table, the notation "UV.times.WYZ" refers to the words "UV UW UY VW VY VZ" in the specific order indicated.

The subset and assignment for row 2, representing state 2, are obtained by bit-wise complementing the codewords from row 1. In terms of hex symbol substitutions, this translates to:

The next state information is derived from Table 4.

The block decoder is also derived from the assignments of Table 5 by reading from right to left. The encoder and decoder can be reduced to hardware by conventional techniques, using a ROM-based approach or a Boolean logic implementation.

FIG. 10 shows the reduced complexity detector trellis for the rate 6/8 code on the dicode channel, derived from the second power of G.sub.5.sup.0 by incorporating the effect of the channel. This 5-state trellis provides the structure for the Viterbi detection algorithm. The code provides a coding gain of 3 dB (see Bound 1).

The code can be applied in an interleaved manner on interleaved dicode channels, providing the same coding gain of 3 dB.

When used on the (1-D).sup.2 channel, the Viterbi trellis structure is derived from the second power of G.sub.5.sup.0, in an analogous fashion to the trellis derivations above. The code provides a coding gain of 3 dB (see Bound 2).

For the class 1 and class 2 channels, the matched spectral null subdiagram G.sub.5.sup.1/2T is the minimum state diagram which generates the required spectral null at one-half the Nyquist frequency. The rate 6/8 code is converted for use on the class 1 or class 2 channels by adding (modulo 2) the vector .nu.=010101 . . . or .nu.=101010 . . . to the output of the encoder in Table 3. This modified code is decoded by adding (modulo 2) the same vector .nu. to the detected codestream, and then passing the result to original decoder of Table 4.

It will be clear to those skilled in the art how to then derive the Viterbi detector trellises for the class 1 and class 2 applications. The coding gain for the modified 6/8 code on both the class 1 and class 2 channels is 3 dB.

The modified code can be applied in an interleaved manner on interleaved dicode channels, providing the same coding gain of 3 dB.

When applied in an interleaved fashion to the extended class 4 channel, the code provides a coding gain of 1.8 dB (see Bound 3). It will now be understood by those skilled in the art that the Viterbi detector trellises for the extended class 4 application can be derived in the same manner as described in the last paragraph of the section describing the Rate 2/3 codes.

For a rate 4/5 code with spectral null at zero frequency, for use with dicode and (1-D).sup.2 channels, the minimum state diagram with adequate capacity is G.sub.6.sup.0, which has capacity C=0.833 . . . . However, to simplify the sliding block code, the state diagram G.sub.7.sup.0 is used. As illustrated herein, the 4/5 code eliminates most, but not all, of the quasi-catastrophic sequences, in order to reduce the encoder complexity. It has capacity C=0.885 . . . .

Table 6 shows a four state constrained system derived from the 10th power of G.sub.7.sup.0. The box in row i and column j in the table contains a letter which identifies a list of allowable 10-bit codewords which can originate in state i and terminate in state j. The number in parentheses indicates the number of codewords in the list. The notation A is used to denote the list which is obtained by bit-wise complementing (that is, adding 1111111111 modulo 2) each codeword in list A. The 10-bit codewords in lists A, B and D are described below the table.

For a rate 8/10 code, any 2.sup.8 =256 codewords are selected from each row. Table 7 gives a structured assignment of the 256 distinct 8-bit data words, to the specific subsets of 256 codewords selected from the rows of the table. The set DD can be any subset of 132 words from the 162 words in list D.

The decoder is also derived from the assignments of Table 7. The decoding rules, involving look-ahead of one codeword, are given in Table 8. The decoder is a sliding block decoder, producing 8 data bits for each sliding block consisting of two 10 bit codewords, implying a maximum error length of two data bytes.

In Table 8, the current codeword is denoted y.sub.n-1 and the next codeword is denoted y.sub.n. The decoder rules determine which entry of the encoder table to use to decode the current codeword y.sub.n-1. For example, if condition (1) of Table 8 is satisfied, the current codeword y.sub.n-1 is an element of B, the complement of B as defined in Table 6. This current codeword should be decoded according to the data assignment in Row 4, Column 1 of Table 7. In the symbols at the right hand edge of Table 8, the left and right ends of the horizontal line identify the Row and Column of the correct data assignment for the current code word.

Sliding block decoder rules for rate 8/10 code

The encoder 11 and decoder 14 can be reduced to hardware by conventional techniques, using a ROM-based approach or a Boolean logic implementation.

For sake of illustration, the finite-state encoder shown in Table 7 may be of the type shown in FIG. 11 comprising an input shift register 51, a state shift register 52, and a read only memory (ROM) 53. Shift registers are two-terminal input/output machines with feedforward path. Input shift register 51 takes 8 input bits x.sub.1, x.sub.2, . . . ,x.sub.8 as input at every clock cycle C, and outputs y.sub.1, y.sub.2, . . . ,y.sub.10 during the cycle C. State register 52 takes 2 bits of state information s.sub.1 and s.sub.2 as inputs every clock cycle C, and outputs s.sub.1 and s.sub.2 during the clock cycle C. ROM 53 takes 10-bit (8 input bits+2 state bits) address inputs every cycle C, and provides 12-bit (2 updated state bits+10 output bits) outputs every cycle C. The updated state bits are sent via 54 to the state register for the next cycle C.

For sake of illustration, the sliding block decoder 14 (which, as noted, follows the rules shown in Table 8) may be of the type shown in FIG. 12. This decoder 14 comprises an input shift register 61, a ROM 62, a delay shift register 63, a counter 64, a decision logic g 65 and an `exclusive-or` logic gate 66. ROM 62 takes a 10-bit input address and has an 8-bit data output. At every clock cycle C, delay register 63 stores the output of the ROM for use at the next clock cycle. At every clock cycle C, input shift register 61 takes 10 input bits y.sub.1, y.sub.2, . . . ,y.sub.10. The output of input shift register 61 is y.sub.1,y.sub.2, . . . ,y.sub.10 for the duration of the cycle. This output is connected to counter 64, whose two 4-bit outputs v and v', computed in the same clock cycle, represent the number of ones in y.sub.1, . . . ,y.sub.10 and in y.sub.1, . . . ,y.sub.8, respectively. The output u of the decision logic g is one or zero based on the inputs v and v' to g. The function g is specified to produce output variable u according to the rule: ##EQU4##

The variable u is one of the inputs to exclusive-or gate 66, whose other input is the 8 bit contents of delay shift register 63 stored from the previous clock cycle. Finally, the output of input shift register 61 addresses ROM 62 to produce an 8-bit data output, which is stored in delay register 63 for the next clock cycle.

FIG. 13 shows the reduced complexity detector trellis for the rate 8/10 code on the dicode channel, derived from the second power of G.sub.7.sup.0 by incorporating the effect of the channel. This 6-state trellis provides the structure for the Viterbi detection algorithm. The code provides a coding gain of 3 dB (see Bound 1).

According to the invention, in the rate 2/3 and rate 3/4 codes as herein described, quasi-catastrophic code sequences have been successfully eliminated. However, in the rate 4/5 code herein described, these quasi-catastrophic sequences have not been eliminated because, as earlier noted, to do so would involve a degree of complexity not warranted by the improved results obtained.

The code can be applied in an interleaved manner on interleaved dicode channels, providing the same coding gain of 3 dB.

When used on the (1-D).sup.2 channel, the Viterbi trellis structure is derived from the second power of G.sub.7.sup.0, in an analogous fashion to the trellis derivations above. The code provides a coding gain of 1.8 dB (see Bound 2).

For the class 1 and class 2 channels, the matched spectral null subdiagram G.sub.6.sup.1/2T is the minimum state diagram which generates the required spectral null at one-half the Nyquist frequency. As in the dicode case, the state diagram G.sub.7.sup.1/2T is used to simplify the resulting code. This diagram has capacity C=0.885 . . . . The rate 8/10 code for the dicode channel is converted for use on the class 1 or class 2 channels by adding (modulo 2) the vector .nu.=010101 . . . or .nu.=101010 . . . to the output of the encoder in FIG. 11. This modified code is decoded by adding (modulo 2) the same vector .nu. to the detected codestream, and then passing the result to the decoder 14, more fully shown in FIG. 12.

It will be clear to those skilled in the art how to then derive the Viterbi detector trellises for the class 1 and class 2 applications. The coding gain for the modified 8/10 code on the class 1 and class 2 channels are 3 dB and 1.8 dB, respectively.

The modified code can be applied in an interleaved manner on interleaved dicode channels, providing the same coding gain of 3 dB.

When applied in an interleaved fashion to the extended class 4 channel, the code provides a coding gain of 1.8 dB (see Bound 3). Again, the Viterbi detector trellises for the extended class 4 application are derived in the manner described in connection with Rate 2/3 codes.

Reference [A] describes codes for the (1-D) channel which achieve 3 dB coding gain at rates 2/3, 3/4 and 4/5. In Table 9, the parameters of these prior art codes to achieve a 3 dB coding gain are compared to those of the comparable codes presented in this application to provide an identical coding gain. It can be seen that the limitation on the maximum run of zero output samples, denoted Zero-Runlength-Limit (ZRL), is significantly reduced in the new codes. It is also seen that the complexity of the Viterbi detector, measured approximately by the number of edges in one stage of the trellis diagram underlying the detector, is significantly reduced in the new codes. The number of samples detected per detection cycle is given in the "samples/edge" entry for each code.

It will be understood that various changes may be made in the method and techniques for improving coding gain herein described. The embodiments illustrated are therefore to be considered merely as illustrative and the invention is not to be considered limited except as specified in the claims.

The following Theorem constitutes the basis for the bounds on the coding gains of matched spectral null trellis codes: ##EQU5## where e.sub.n are integer-values coefficients, and assume e.sub.0 is nonzero. If e(D) is divisible by (1-D).sup.K, then ##EQU6## That is, the Euclidean weight of the sequence of coefficients of e(D), denoted .vertline.e.vertline..sup.2, is greater than or equal to 2K.

To prove this, the following lemma, denoted Lemma 1, will be used: ##EQU7## where e.sub.n are integer-valued coefficients, and assume e.sub.0 is nonzero. If e(D) is divisible by (1-D).sup.K, then the sequence of coefficients {e.sub.n }=e.sub.0 e.sub.1, . . . , e.sub.N has at least K changes in sign. The proof makes use of this inductive argument:

Consider the case K=1. If e(D) is divisible by (1-D), then it follows that ##EQU8## If all nonzero coefficients were of one polarity, e(1) would be nonzero with that polarity. Therefore, the sequence of coefficients {e.sub.n } must have at least one change of sign.

Now, let e(D) be divisible by (1-D).sup.K, with factorization into integer polynomials e(D)=f(D)(1-D).sup.K. Then g(D)=f(D)(1-D).sup.K-1 is divisible by (1-D).sup.K-1. By the inductive hypothesis, the sequence of coefficients {g.sub.n } of g(D) has at least K-1 sign changes. Since e(D)=g(D)(1-D), it follows that

for all n, with coefficients not explicitly defined by the polynomials taken to be zero. Consider the following subsequence of the nonzero coefficients of g(D),

where g.sub.n.sbsb.0 is the first nonzero coefficient, and the remainder are the nonzero coefficients in g(D) at which sign changes occur. Then the corresponding coefficients

satisfy

This implies that the coefficients of e(D) have at least K-1 sign changes. In addition, however, note that if g.sub.M is the last nonzero coefficient of g(D), then ##EQU9## This implies an additional sign change, yielding a total of at least K, which proves the lemma.

The following lemma, Lemma 2, shows how sign changes in the channel input contribute to the Euclidean weight in the channel output:

Let ##EQU10## be an integer polynomial input to the 1-D channel, with g.sub.0 assumed to be nonzero. Assume that the coefficients of g(D) have L sign changes. Let e(D)=g(D) (1-D) be the corresponding channel output. Then, the Euclidean weight of the output sequence satisfies:

As proof, the Euclidean weight of the output sequence can be written as ##EQU11## It will be seen that if g(D) has no changes of sign in the sequence of coefficients, then

since the contribution to Equation (A3) of the term corresponding to the first nonzero coefficient to Equation (A3) is at least 1, as is the contribution corresponding to the zero coefficient following the last nonzero coefficient.

Suppose now that g(D) has L changes in sign, L.gtoreq.1, which occur at coefficients

And let E(j) equal the partial sum in Equation (A3) in which the index of summation runs from n=0 to n=j, then ##EQU12## Now, if it is assumed that E(N+1) denotes the complete sum .vertline.e.vertline..sup.2, then it follows that: ##EQU13## The inequalities of Equations (A5) and (A7) arise from the contributions corresponding to the first nonzero coefficient and the first zero coefficient after the last nonzero coefficient. To prove inequality of Equation (A6), two cases must be considered:

First, assume that g.sub.n.sbsb.i.sub.-1, the coefficient preceding g.sub.n.sbsb.i, is nonzero. Then, the sign of g.sub.n.sbsb.i.sub.-1 must be the same as the sign of g.sub.n.sbsb.i-1, and opposite to the sign of g.sub.n.sbsb.i, since n.sub.i is the first position after n.sub.i-1 at which there is a change. Therefore, in this case,

In the other case, assume g.sub.n.sbsb.i.sub.-1 =0 and let g.sub.j be the last nonzero coefficient before g.sub.n.sbsb.i, with n.sub.i-1 .ltoreq.j<(n.sub.i -1). Then, it will be seen that

Since

it follows that inequality of Equation (A6) holds.

Combining Equations (A5), (A6) and (A7) yields

This completes the proof of the second lemma.

To prove the Theorem, note that if one begins with a polynomial e(D) which is divisible by (1-D).sup.K, then the polynomial g(D) defined by e(D)=g(D)(1-D) is divisible by (1-D).sup.K-1. From Lemma 1, it follows that g(D) has at least K-1 sign changes in its coefficient sequence. From Lemma 2, one concludes that e(D) must have Euclidean weight at least 2K, as stated by Equation (A1). This completes the proof of the Theorem.

The Theorem can now be applied to verify the bounds on coding gain of matched spectral null trellis codes.

For Bound 1, the case N=3 is verified by direct computation. The cases N.gtoreq.4 follow directly from the Theorem.

For Bound 2, cases N=3,4,5 are verified by direct computation. The cases N.gtoreq.6 follow from the Theorem and the fact that the minimum free distance of the uncoded binary (1-D).sup.2 channel is 4.

For Bound 3, cases N=3,4 are verified by direct computation. The cases N.gtoreq.5 follow from the Theorem and the fact that the minimum free distance of the uncoded binary extended class 4 channel is 4.

Finally, Bound 4 follows directly from the Theorem.