MOSFET Turn-on/Off Circuit

1. Field of the Invention

This invention generally relates to current switching amplifier inverters and, more particularly, to an improved dual current source MOSFET turn-on/off circuit for use in such inverters.

2. Description of the Prior Art

The P-channel MOSFET (metal oxide semiconductor field effect transistor) with its high gate threshold voltage (on the order of 2 to 4 volts), fast turn on/off times and polarity makes an ideal component for pulse width modulated switching regulators. A typical application is shown in FIG. 1A. In this circuit, the P-channel MOSFET Q.sub.1 acts as a high-speed switch to modulate the voltage appearing on the catch diode CR.sub.1 and inductor L.sub.1. This voltage is either V.sub.in or zero. Closing switch SW.sub.1 turns on N-channel MOSFET Q.sub.2 which, in turn, turns on Q.sub.1. The output voltage, V.sub.o, is equal to the "on" time, T.sub.1, divided by the total period, T.sub.t, times the input voltage (neglecting losses), as shown in FIG. 1B.

This circuit, while having the very nice advantage of not requiring a bias supply at the +V.sub.in potential to control Q.sub.1, has three undesirable features: First, power dissipation increases as V.sub.in increases. Second, turn-on time decreases as V.sub.in increases, producing a compounding effect on circuit noise increases caused by faster rise times and larger voltage excursions. Third, V.sub.in must exceed a large threshold to get any output.

A bias supply and other circuitry at the +V.sub.in -to-zero potential to control Q.sub.1 is required if an N-channel MOSFET is used as shown in the circuit of FIG. 2. Obvious design complications aside, this configuration greatly increases the circuit noise because point P (and the entire turn-on/off circuit) swings up and down between O and +V.sub.in at the chopping rate.

It is therefore an object of the present invention to provide an improved MOSFET turn-on/off circuit which exhibits a turn-on time independent of the input voltage.

It is another object of the invention to provide a MOSFET turn-on/off circuit wherein power dissipation remains substantially constant as the input voltage increases.

According to a preferred embodiment of the invention, a dual current source MOSFET turn-on/off circuit is provided. The circuit includes a high gain PNP transistor as a turn-off current source and a high gain NPN transistor as a turn-on current source for a P-channel MOSFET. A switch in the base circuit of the NPN transistor turns on the NPN transistor current source which overpowers the PNP transistor current source. The net current charges the MOSFET gate-to-source capacitance which, upon reaching a threshold voltage, turns the MOSFET on. When the switch is opened, the PNP transistor current source discharges the gate-to-source capacitance, turning off the MOSFET.

The foregoing and other objects, aspects and advantages of the invention will be better understood from the following detailed description of a preferred embodiment of the invention with reference to the drawings, in which:

FIG. 1A is a schematic diagram showing a conventional pulse-width modulator using a P-channel MOSFET switch;

FIG. 1B is a timing diagram illustrating the operation of the circuit of FIG. 1A;

FIG. 2 is a schematic diagram showing a conventional pulse-width modulator using an N-channel MOSFET switch;

FIG. 3 is a schematic diagram showing an implementation of a pulse-width modulator according to the principles of the invention; and

FIG. 4 is a table showing operational comparisons between the circuit according to the invention and a conventional circuit.

Referring now to the drawings, and more particularly to FIG. 3, there is shown a pulse-width modulator in which a dual current source is used to control a P-channel MOSFET switch Q.sub.1. The circuit includes a turn-off current generator 1 and a turn-on current generator 2. The turn-off current generator 1 comprises a resistor R.sub.2 which, with diode CR.sub.3, sets the base potential of PNP transistor Q.sub.2. Diode CR.sub.3 provides approximately 0.6 V drop and a negative temperature coefficient (.congruent.-2 mV/.degree.C.) to offset similar quantities in transistor Q.sub.2. A current regulator diode CD.sub.1 provides a constant current for resistor R.sub.2 and diode CR.sub.3. An optional resistor, R.sub.6, may be connected in series with diode CD.sub.1 to share the power loss with that diode. A dropping resistor, R.sub.1, in the emitter circuit of transistor Q.sub.2 sets the turn-off current level i.sub.toff =V.sub.R2 /R.sub.1. A Zener diode CR.sub.2 limits the gate-to-source voltage of transistor Q.sub.1 to approximately 8V.

The turn-on current generator 2 comprises an NPN transistor Q.sub.3 having its collector connected to the collector of transistor Q.sub.2 via an optional resistor R.sub.5 which may be added to share the power loss with transistor Q.sub.3. Resistor R.sub.4, with bias voltage V.sub.B and resistor R.sub.7, set the base potential of transistor Q.sub.3. Resistor R.sub.7 could be a current reference diode if V.sub.B is not a fixed voltage. Diode CR.sub.4 provides a similar voltage drop and temperature coefficient function for transistor Q.sub.3 as that provided by diode CR.sub.3 for transistor Q.sub.2. The emitter resistor, R.sub.3, determines the turn-on current for transistor Q.sub.3 in the same way as resistor R.sub.1 does for transistor Q.sub.2.

The high gain PNP transistor Q.sub.2 and high gain NPN transistor Q.sub.3 provide almost ideal current sources. Closing switch SW.sub.1 turns on current source 2 which overpowers current source 1. The net current charges MOSFET Q.sub.1 gate-to-source capacitance, C.sub.iss, which, upon reaching the 2 to 4 volt threshold, turns on Q.sub.1. When switch SW.sub.1 is opened, current source 1 discharges C.sub.iss turning off Q.sub.1.

The circuit shown in FIG. 3 has several advantages. There is almost constant power dissipation independent of V.sub.in. The turn-off/on time is constant and independent of V.sub.in for a particular MOSFET Q.sub.1. Further, the V.sub.in threshold to get an output can be greatly reduced over the prior art. If resistors R.sub.5 and R.sub.6 are removed (thereby increasing the heat load on diode CD.sub.1 and transistor Q.sub.3 somewhat), outputs could be achieved for V.sub.in voltage levels as low as approximately 7 volts; one volt for resistor R.sub.3 and approximately 6 volts for source-to-gate voltage Q.sub.1. Table I in FIG. 4 summarizes the circuit comparisons between the dual current source circuit of FIG. 3 and the conventional circuit of FIG. 1. The invention described above provides a positive output voltage source. If a negative output voltage source is desired, this can be achieved using an N-channel MOSFET in place of the P-channel MOSFET shown and NPN bipolar transistors in place of PNP transistors, as is well understood in the art.

While the invention has been described in terms of a preferred embodiment, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the appended claims.