US 4,870,582 AGrant
Anti-Skid Brake Control System
Issue Date:1989-09-26
•6 Claims
•11 Drawing Sheets
Abstract
An anti-skid brake control system for a motor vehicle comprises: a wheel speed sensor which is provided for each wheel of the vehicle and generates a pulse signal having a pulse cycle which corresponds to a revolutional speed of each wheel; a pulse cycle measuring circuit for detecting the cycle of the pulses of the pulse signal from each wheel speed sensor; and, a discriminator for discriminating an actual acceleration or deceleration state. The actual acceleration or deceleration state is discriminated in accordance with whether or not the period of the acceleration or deceleration state is longer than a predetermined time. The acceleration or deceleration state is calculated from the wheel speed data detected by the pulse cycle measuring circuit, and the system is controlled on the basis of the result of the discrimination by the discriminator.
Metadata
Assignee
- Fujitsu Limited
Inventors
- Akira Hoashi
- Hideo Akima
- Katsuya Miyake
- Isao Yamaki
Application Information
Application Number:US 0286745
Filing Date:1987-03-20
Priority Date:1986-03-20
Art Unit:234
Classifications
IPC:
B60T 832
Field of Search:
364180303426.02;565;56619792;103;105;97;99
Patent Drawings (11 sheets)
Description
Background on the Invention
1. Field of the Invention
This invention relates to an anti-skid control system for achieving a satisfactory rotational behavior of the wheels of a motor vehicle during a braking operation. More particularly, this invention pertains to an anti-skid control system which is designed to increase and reduce brake fluid pressure in a desirable manner to prevent the wheels from becoming locked.
Especially, the present invention relates to a method for discriminating noise data from actual wheel velocity data for anti-skid brake control.
2. Description of the Related Art
There have been heretofore proposed a variety of anti-skid control systems wherein, during a braking operation, the brake fluid pressure is reduced to prevent the occurrence of an undesirable wheel lock, and the brake fluid pressure thus reduced is then increased to avoid a undesirable extension of the brake stopping distance. Among such conventional anti-skid control systems is one wherein different pressure buildup rates are stored; a desired one of the stored pressure buildup rates is selected; and brake fluid pressure is increased with the selected buildup rate, for example. To effect the pressure buildup rate selection, a system has been proposed, wherein a solenoid-operated valve adapted to be opened and closed with a relatively high frequency is provided in the brake fluid pressure buildup system; a pulse train generator such as a multivibrator is provided in the drive system for the solenoid-operated valve; and the timing with which the solenoid-operated valve is driven by a pulse train signal derived from the multivibrator is controlled on the basis of a signal representing wheel acceleration (British Patent Specification No. 1305430).
A conventional anti-skid brake control system comprises a wheel velocity detection means which is attached to the vehicle wheel axle and generates pulse signals corresponding to the wheel velocity. The wheel velocity is calculated based on the period of one cycle of the pulse signal and the result of the calculation is used to control the brake pressure.
The pulse signals from the wheel velocity detector are disturbed by the vibration from tires or by electric noise. An example of the output signal of the wheel velocity detector is represented in FIG. 4. As shown in the graph of FIG. 4, the wheel velocity may be mistakenly discriminated as an acceleration state, although actually in a deceleration state, due to the noise N.sub.A. Conversely, the wheel velocity may be discriminated as a deceleration state although it is actually in an acceleration state, due to the noise N.sub.B. Such a misjudgement will cause a malfunction of the anti-skid brake control system.
FIG. 5 shows a graph (i) of pulse signals from the wheel speed sensor and a graph (ii) of the output of the counter (cycle period detector) which represents pulses each having a width corresponding to one cycle of the pulse signal of graph (i). The above mentioned noise appears in the graph (i), which generates an unnecessary signal (n) having a period t.sub.3, thus causing a malfunction of the system.
To avoid such a malfunction, an integral circuit has been used to modify and average the velocity curve, as represented by the dashed line in FIG. 4. However, the integral circuit can not effectively avoid the affect of noise having a large period. Also, a detection timing of the peaks of the wave signal is delayed due to the usage of the integral circuit, which degrades the reliability and stability of the anti-skid brake system.
Summary of the Invention
An object of the present invention is to provide an anti-skid brake control system in which the above mentioned problems are alleviated by detecting the wheel velocity and calculating the acceleration or deceleration from the wheel velocity data, and then determining whether or not the calculated results of acceleration or deceleration represent an actual acceleration or deceleration state. The anti-skid brake system is controlled in accordance with the calculation results only when the calculation results are determined to represent the actual acceleration or deceleration state.
In accordance with the present invention, there is provided an anti-skid brake control system for a motor vehicle comprising: a wheel speed sensor which is disposed for each of the vehicle wheels and generates a pulse signal having a pulse cycle which corresponds to the revolutional speed of each wheel; a pulse cycle measuring circuit for detecting the cycle of the pulses of the pulse signal from the wheel speed sensor; and a discrimination means for discriminating an actual acceleration or deceleration state in accordance with whether or not the period of the acceleration or deceleration state is larger than a predetermined time. The acceleration or deceleration state is calculated from the wheel speed data detected by the pulse cycle measuring circuit and the system is controlled on the basis of the result of the discrimination by said discrimination means.
Brief Description of the Drawings
FIG. 1 is a constructional view of an anti-skid brake control system according to the present invention;
FIG. 2 is a flow chart of the process of discriminating an actual deceleration state according to the present invention;
FIG. 3 is a flow chart of a process of discriminating the low peak of the wheel speed according to the present invention;
FIG. 4 is a graphical view representing a wheel speed curve with noise;
FIG. 5 is waveform diagram showing a relationship between the wheel speed sensor output and the detection signal from the detector of the wheel speed sensor output;
FIG. 6 is a block diagram of a circuit for detecting the wheel speed;
FIG. 7 is a waveform diagram for explaining the function of the circuit of FIG. 6;
FIG. 8 is a constructional view of an anti-skid brake system to which the present invention is applied;
FIG. 9 is a block diagram of a circuit for controlling the anti-skid brake system according to the present invention;
FIG. 10 is a graphical view and waveform diagram for explaining the function of the anti-skid brake system to which the present invention is applied;
FIG. 11 is a block diagram for explaining the construction of the anti-skid brake system according to the present invention; and,
FIG. 12 is a graphical view for explaining the function of the present invention.
Description of the Preferred Embodiments
FIG. 1 illustrates an embodiment of the present invention which obviates afore-mentioned drawbacks of the prior art. Wheel speed sensors 201-1 to 201-N detect the revolutional speed of axles A.sub.1 to A.sub.N, respectively, which speed is represented as a cycle length of pulses. Note, usually N is 2 or 4. Pulse counters 202-1 to 202-N measure the wheel speed from the cycle of the pulse signal from the wheel speed sensors 201-1 to 201-N, respectively, as described in detail later. Acceleration or deceleration is calculated from the velocity data of the wheel speed measured by the pulse counters 202-1 to 202-N in a central processing unit (CPU) 204. An acceleration and deceleration discrimination means 203 determines whether or not the calculated acceleration or deceleration state is derived from an actual acceleration or deceleration state, in accordance with length of the period for which the calculated acceleration or deceleration state has continued. A controller 205 controls anti-skid brake controllers 206-1 to 206-N by a control signal in accordance with the wheel state calculated by the CPU and discriminated by the acceleration and deceleration discrimination means 203. The anti-skid brake controllers 206-1 to 206-N provide the brake drive system with brake pressure in accordance with the control signal and apply the brake force to the wheels W.sub.1 to W.sub.N, respectively.
In the structure of FIG. 1, the cycle of pulses of the pulse signal output from each of the wheel speed sensors 201-1 to 201-N is measured by the pulse counters 202-1 to 202-N to calculate the wheel velocity. The acceleration or deceleration of the wheel is then calculated on the basis of the calculated wheel velocity data and is transmitted to the acceleration and deceleration discrimination means 203 through the controller 205. The acceleration and deceleration discrimination means determines whether the calculated acceleration or deceleration data is genuine and effective data is derived from an actual acceleration or deceleration state if the calculated acceleration or deceleration state continues for more than a predetermined time. When the calculated data is determined to be genuine data, the controller transmits an optional control signal to the anti-skid brake controllers 206-1 to 206-N. The anti-skid brake controllers 206-1 to 206-N apply a braking force to the wheels W.sub.1 to W.sub.N in accordance with the control signal to achieve a reliable anti-skid brake function.
As mentioned above, the acceleration or deceleration state calculated from the detected wheel velocity data is regarded as genuine data when the state continues for more than a predetermined time. Therefore, the calculated data based on noise, which usually continues for a very short time, is regarded as unnecessary data. Thus, it is possible to avoid a malfunction of the anti-skid brake control system due to noise in the wheel velocity data.
An example of the wheel speed measuring means in the anti-skid brake system is described hereinafter with reference to FIGS. 6 and 7. FIG. 6 is a block circuit diagram of the wheel speed measuring means. The circuit comprises a wave shaping circuit 106-1, an edge detection circuit 107-1, counters 108-1 to 108-N, buffers 109-1 to 109-N, multiplexer 110, a hold bit holding circuit 111, and a central processing unit (CPU) 112. The wave shaping circuit 106-1 trims the wave signal of the wheel speed detected by the wheel speed sensor 101-1 into a rectangular pulse signal. The edge detection circuit 107-1 generates a signal corresponding to a cycle of the wheel speed pulses which have been shaped to rectangular pulses by the wave shaping circuit, by using the rising edge or falling edge of the shaped rectangular pulse as a trigger point. Each of the counters 108-1 to 108-N counts clock pulses during one cycle of the rectangular pulse signal output from the edge detection circuit 107-1. The buffers 109-1 to 109-N register the data of the count results output from the counters 108-1 to 108-N. The multiplexer 110 selects the data registered in the buffers 109-1 to 109-N and outputs this data to the data bus. The hold bit holding circuit 111 holds the state of completion of the wheel speed pulse cycle measurement process conducted by the counters 108-1 to 108-N. The CPU 112 scans the hold bit holding circuit 111 and reads out the registered data stored in one of the buffers 109-1 to 109-N corresponding to the hold bit position in the hold bit holding circuit 111, through the multiplexer 110. The CPU 112 then transmits a reset signal 6 to reset the edge detection circuit 107-1 and the counters 108-1 to 108-N. The hold bit holding circuit 111 is also reset by resetting the edge detection circuit 107-1. The CPU 112 then transmits a control signal to the anti-skid brake drive means (not shown) to control the anti-skid brake system in response to the read out wheel velocity data.
The function of the circuit of FIG. 6 is further described with reference to FIG. 7. Wave signal 1 represents the trimmed pulse signal output from wheel velocity sensor 101-1 and shaped by the wave shaping circuit 106-1. Wave signal 2 represents an output signal from the edge detection circuit 107-1 and comprises pulses having a width corresponding to the length of one cycle of the pulses of the wave signal 1. Wave signal 3 represents clock pulses. The time of one cycle of the pulses of signal 1 is measured by counting the clock pulses of the wave signal 3. Wave signal 4 represents an input signal transmitted to the counter 1. Wave signal 5 is the output signal from the counter 108-1 and represents the count result of the number of pulses of the signal 4. Wave signal 6 is a pulse signal for resetting t detection
107-1 and the counter 108-1. Wave signal 7 is a registered signal held in the hold bit holding circuit 111. Upon the detection of the setting of a hold bit in the hold bit holding circuit 111, the CPU 112 starts to read out the vehicle speed data registered in one of the buffers 109-1 to 109-N. The CPU 112 then transmits the reset signal 6 to reset the edge detection circuit 107-1 and the counter 108-1 so that the measurement of the vehicle speed is started again.
As mentioned above, a hold bit is set in the hold bit holding circuit 111 when the measurement of the wheel speed by the counters 108-1 to 108-N is ended. Therefore, the CPU 112 can read the wheel speed data from one of the buffers 109-1 to 109-N corresponding to the hold bit position in the hold bit holding circuit 111, by scanning the hold bit holding circuit 111 to control the anti-skid brake system.
FIG. 8 illustrates an anti-skid control apparatus to which the present in applicable, and which includes a gate valve 1, a pressure buildup-holding solenoid-operated valve (referred to simply as a pressure valve hereinafter) 2, a pressure-reducing solenoid-operated valve (referred to simply as reducing valve hereinafter) 3, a main fluid passage 4 extending from a master cylinder M/C (not shown) to wheel cylinders W/C of wheel brake devices not shown) through the gate valve 1 and the pressure valve 2, and so forth.
The gate valve 1 includes cylinders 6 and 7 containing a differential pressure-responsive piston 5 which is arranged to close a valve portion 8 of the gate when the piston 5 is displaced to the left in the drawing due to a pressure difference. Upon closure of the valve portion 8, the main passage 4 extending between the master cylinder M/C and the wheel cylinder W/C is interrupted.
The pressure valve 2, which is normally open, is closed in response to a brake fluid pressure holding signal S.sub.1 derived from a control circuit (electronic control unit) 9, and thereupon, the main passage 4 is interrupted so that a brake fluid pressure holding condition is established.
The reducing valve 3, which is normally closed, is opened in response to a pressure-reducing signal S.sub.2 also derived from the control circuit 9, and thereupon, pressure fluid in the wheel cylinder W/C is pumped into an accumulator 12 by means of a pump 11 through a reservoir 10. The thus pumped pressure fluid is returned between the gate valve 1 and the pressure valve 2 through a by-pass passage 17. Indicated at 13 and 14 are a check valve and relief valve, respectively.
A wheel velocity detector or speed sensor 15 is associated with a wheel 16 and arranged to provide detected information to the control circuit 9.
A motor vehicle is usually provided with a pair of anti-skid control systems, each being as shown in FIG. 8; one for controlling two wheels, such as front left and rear right wheels, and the other for controlling the remaining two wheels, such as front right and rear left wheels.
The control circuit 9 comprises a microcomputer which functions as described hereinafter with reference to FIGS. 9 and 10.
FIG. 10 shows the wheel speed V.sub.W, wheel acceleration or deceleration V.sub.W (differential of the wheel speed V.sub.W), brake fluid P.sub.W within the wheel cylinder W/C of the brake system, and the opening and closing timing of the pressure valve 2 and the reducing valve 3.
Typically, during time period from t.sub.1 to t.sub.n shown in FIG. 10, the below-described control operations are performed by the control circuit of FIG. 9 in accordance with variations in the wheel speed V.sub.W detected by the speed sensor 15 shown in FIGS. 8 and 9. The wheel deceleration V.sub.W is determined by a wheel deceleration detector unit 51 (FIG. 9) on the basis of the wheel speed V.sub.W, The wheel deceleration V.sub.W thus determined is then compared with a preset threshold level G.sub.1 in a first comparator 52, and with another preset threshold level G.sub.max in a second comparator 53.
Time t.sub.1 : When a braking operation is started, the brake fluid pressure P.sub.W builds up so that the wheel deceleration V.sub.W increase gradually.
A reference velocity V.sub.T is determined, based on the wheel speed V.sub.W, in a reference velocity determination unit 54 (FIG. 9) which is controlled based on the output of the first comparator 52 in such a manner that V.sub.T is .DELTA.V lower than V.sub.W and that the reduction rate of the reference velocity V.sub.T does not exceed a predetermined value .theta..sub.1 which corresponds to the threshold level G.sub.1.
Time t.sub.2 : When the wheel deceleration V.sub.W reaches the threshold level G.sub.1, an output signal "2" is derived from the first comparator 52, and the reference velocity V.sub.T decreases with the constant gradient .theta..sub.1.
Time t.sub.3 : As the wheel deceleration V.sub.W further increases, it reaches the threshold level G.sub.max, and thereupon, the second comparator 53 provides an output signal "1" which in turn is passed through a first timer 55 to set a third flip-flop 79, which provides a signal through a first OR gate 56 to close the first valve 2. Therefore, the brake fluid pressure P.sub.W does not increase and maintains a constant value, as can be seen from the graph of P.sub.W in FIG. 10.
The threshold G.sub.max is preset to prevent a further buildup of th fluid pressure P.sub.W when the wheel deceleration V.sub.W increases beyond this threshold level.
At the beginning of the time t.sub.3, the master cylinder M/C is isolated from the wheel cylinder W/C so that the brake fluid pressure P.sub.W prevailing within the wheel cylinder W/C is held constant. If G.sub.max is not detected even when a preset time has elapsed after the time when the signal "1" appeared, the timer 55 operates to block the signal "1".
Time t.sub.4 : When the wheel speed V.sub.W and reference velocity V.sub.T become equal to each other, the first flip-flop 58 is set and provides an output signal "3" which in turn is passed through a second timer 59 and a first AND gate 62 to cause the reducing valve 3 to be opened so that the brake fluid pressure P.sub.W within the wheel cylinder W/C is reduced, as represented by the line P.sub.W in FIG. 10.
If the output signal "3" still exists when a present time has elapsed after the time when this signal appeared, the second timer 59 operates to block the signal "3", thus causing the reducing valve 3 to be closed. In this way, the pressure reduction is prevented from continuing for longer than necessary.
A second flip-flop 61 is set by the signal "3". The output signal of the second flip-flop 61 is provided to the reducing valve 3 through the first AND circuit 62. The flip-flop 61 is arranged to be reset, when a preset time has elapsed from the time when the pressure valve 2 was closed, by the output of a delay timer 63 which enables a start of the operation thereof by the output signal "3"; with this arrangement, the anti-skid control system can be returned to the initial condition. This is based on the fail-safe concept, and the time preset in the delay timer 63 is selected to be sufficiently larger than one control cycle (the period from the time when a pressure reduction occurs to the next time when a pressure reduction occurs again).
Time t.sub.5 : When the wheel speed V.sub.W reaches a low peak V.sub.LP, then a low peak detector 60 provides an output signal "4", which in turn is passed to reset the first flip-flop 58. Consequently, the output signal "3" disappears, and thus the reducing valve 3 is closed. Therefore, the reduction of the brake fluid pressure P.sub.W stops and the pressure P.sub.W becomes constant.
As a consequence of the above-described operations, the brake fluid pressure P.sub.W within the wheel cylinder W/C is held constant (from t.sub.3) reduced (from t.sub.4), and again held constant (from t.sub.5), and the pressure holding operation performed after the time t.sub.5 is continued until a high peak of the wheel speed V.sub.W is detected at time t.sub.6 Thus, the braking forces are reduced so that the wheel speed V.sub.W is sufficiently recovered.
Time t.sub.6 : When the wheel speed V.sub.W reaches a high peak V.sub.HP, a high peak detector 66 provides an output signal "5", which in turn is passed to a store circuit 65 so that a pressure buildup time (T.sub.P) corresponding to the average acceleration computed in a logic unit 64 is read out. The polarity of the output signal of the store 65 is reversed by an inverter 67 so as to be converted to an output signal "6", which in turn appears at the output of the first OR circuit 56 through a second AND circuit 68. Thus the pressure buildup/holding signal S.sub.1 disappears after the time (T.sub.P). In this way, during the time (T.sub.P), the pressure valve 2 is opened so that the brake fluid pressure P.sub.W builds up.
Time t.sub.7 : The pressure valve 2 is closed to maintain a constant brake fluid pressure for the time determined in response to the state of the deceleration during the time period T.sub.P. Then the pressure valve 2 is repeatedly opened and closed, to gradually increase the brake fluid pressure P.sub.W as represented in FIG. 10. When the deceleration value reaches G.sub.max (Time t.sub.8), the pressure valve 2 is closed again to hold the brake fluid pressure constant. The above mentioned processes from the time t.sub.3 are then repeated.
FIG. 11 is a block diagram of the anti-skid brake control system of the present invention. A brake switch signal, battery voltage signal, and brake voltage signal are input to the CPU 204 through an input buffer 200, and wheel speed sensors 201-N are connected to a pulse counter 202-N which is connected to the CPU 204. The CPU 204 calculates wheel speed, acceleration, and deceleration in accordance with the calculation sequence registered in a memory 204, by the command of an indicator circuit 204", using the input data from the pulse counter 202-N. If an abnormal signal is input through the buffer 200, the indicator 204" turns on a fail lamp 208 through an output buffer 207-1 and drives a fail relay 209 to stop the operation of the anti-skid brake system and thereby operate only the ordinary brake system. The CPU 204 drives a pressure holding solenoid 210 and a pressure reduction solenoid 211 through an output buffer 207-2 in accordance with the calculation results. The pressure holding solenoid 210 is interconnected to the afore-mentioned pressure valve, and the pressure reduction solenoid 211 is interconnected to the afore-mentioned reducing valve. The afore-mentioned anti-skid brake control is conducted by driving the solenoid 210 and 211 to open or close the pressure valve and the reducing valve respectively.
An object of the present invention is to avoid malfunctions of the anti-skid brake control system due to noise which appears in the detected wheel velocity data. This function of avoiding a malfunction is described further with reference to FIG. 12. A noise N appears on the wheel velocity curve V.sub.W. Therefore, the differential curve V.sub.W thereof has a noise wave N. In this differential curved V.sub.W, the time of a period wherein the deicer of the wheel is more than a predetermined value G.sub.N measured. This time, due to the noise, is represented as t'.sub.n, whereas the time due to an actual deceleration by the braking operation is represented as t'.sub.a. The time t'.sub.n of the noise is relatively short, whereas the time t'.sub.a of an actual deceleration is long. When this time is longer than a predetermined time (T'.sub.N of FIG. 2), the CPU determines that the calculated d is due to an actual deceleration by the braking operation. On the other hand, if this time is than the predetermined time, the CPU determine the calculated deceleration is derived from the noise N.
The wheel velocity V.sub.W has a low peak N.sub.LP of the noise N. This low peak N.sub.LP is discriminated from the actual low peak V.sub.LP due to the braking operation, as follows. The CPU measures the time of a period wherein the deceleration is less than a predetermined value G.sub.L. Namely, the CPU measures the time from the point G.sub.L to the point of the low peak (the deceleration value is zero). This time t.sub.n of the noise low peak N.sub.LP is short, whereas the time t.sub.a of the actual low peak V.sub.LP is long. If the time before the low peak reaches a predetermined value (T.sub.N of FIG. 3), the CPU determines that the calculated low peak is derived from an actual deceleration due to the braking operation. Whereas, if the time before the low peak is less than the predetermined value, the CPU determines that the calculated low peak is derived from the noise N.
Such a deceleration judgment process is represented in the flow charts of FIGS. 2 and 3. In step 1 of FIG. 2, the calculated deceleration is compared with the predetermined value G.sub.N. If the wheel deceleration (negative acceleration) is larger than G.sub.N, the count number T' (number of clock pulses) registered in a register of the discrimination means 203 (FIG. 1) is incremented in step 2 and then step 4 is conducted. On the other hand, calculated deceleration is below G.sub.N, the count T' is cleared to zero in step 3, and then step 4 is conducted.
In step 4, the time corresponding to a count number T' registered in the register is compared with a predetermined valve T'. Namely, the time of the period wherein deceleration is equal to or more than G.sub.N is compared with the predetermined time T'.sub.N. T'.sub.N is determined to be larger than the time due to noise so that the calculated deceleration state derived from the noise is discriminated. If T' is larger than the predetermined value T'.sub.N, the CPU (discrimination means 203 in the CPU of FIG. 1) determines that the calculated deceleration state is derived from an actual deceleration due to the braking operation in step 5. If the T' is less than T'.sub.N, the steps from step 1 are repeated.
As mentioned above, if the deceleration state of more than G.sub.N continues for more than the time T'.sub.N, the deceleration state is regarded as an actual deceleration state and discriminated from the deceleration state due to the noise N. The controller 205 of FIG. 1 performs an optimal anti-skid control operation in accordance with the discriminated actual deceleration data.
A similar discrimination process is conducted to discriminate an actual acceleration state from an acceleration state due to noise.
A process for discriminating the actual peak of the velocity curve is described in detail with reference to FIG. 3. In step 11 of FIG. 3, the calculated deceleration is compared with predetermined value G.sub.L. If the deceleration value is than G.sub.L, the count number T (number of clock pulse registered in the register of the discrimination 203 of FIG. 1 is incremented in step 12, and then step 14 is conducted. On the other hand, if the deceleration value is more than G.sub.L, the count number T is cleared to zero, and then step 14 is conducted.
In step 14, the time corresponding to the count number T is compared with a predetermined value T.sub.N. If the number T is equal to T.sub.N, the calculated deceleration state is determined to be the actual low peak (V.sub.LP of FIG. 12) in step are. On the other hand, if the number T is below T.sub.n, the steps from step 11 are repeated.
As mentioned above, the calculated deceleration low peak data is regarded as the actual low peak, discriminated as the actual low peak and discriminated from the low peak due to noise, when the deceleration state below G.sub.N continues for the predetermined time T.sub.N. The controller 205 of FIG. 1 performs an optimal anti-skid control in accordance with the calculated data of the actual low peak.
A similar discrimination process is conducted to discriminate an actual acceleration high peak from a high peak due to noise.
The above mentioned predetermined values G.sub.N and T'.sub.N are input from the CPU to the deceleration detectors 51, 71 of FIG. 9 to discriminate the actual deceleration state. Also, the predetermined values G.sub.L and T.sub.N are input from the CPU to the low peak detector 60 of FIG. 9 to discriminate the actual low peak. Also, predetermined values T, G (corresponding to T.sub.N, T'.sub.N, G.sub.N and G.sub.L) for discriminating the actual acceleration state and actual high peak are input from the CPU to the average acceleration detector 64 and the high peak detector 66.
Claims
We claim:
1. An anti-skid brake control system for a motor vehicle having an acceleration state and a deceleration state, said anti-skid brake control system comprising: wheel speed sensor means, operatively connectable to each wheel of the motor vehicle, for generating pulse signals having pulse cycles which correspond to a revolutional speed of each wheel; pulse cycle measuring means for detecting the pulse cycles of said pulse signals from said wheel speed sensor means and for providing a detected wheel velocity signal; calculating means for receiving said velocity signal and calculating at least one of the acceleration and deceleration states from said velocity signal; and discrimination means for determining if a period of said calculated one of the acceleration and deceleration states is longer than a predetermined time when said calculated one of the acceleration and deceleration states is greater than a predetermined threshold value, said discrimination means discriminating said calculated one of the acceleration and deceleration states as noise when the period is shorter than the predetermined time, said anti-skid brake control system providing anti-skid control for the motor vehicle dependent upon discrimination of noise from said detected wheel velocity signal by said discrimination means.
2. An anti-skid brake control system according to claim 1, wherein said pulse cycle measuring means is operatively connectable to receive clock pulses and comprises means for counting a number of the clock pulses occurring during one cycle of said pulse signals from said wheel speed sensor means ad wherein said discrimination means is operatively connectable to receive the clock pulses and comprises means for counting a number of the clock pulses occurring during the period of said calculated one of the acceleration and deceleration states to determine if the period is longer than said predetermined time.
3. An anti-skid brake control system for a motor vehicle having acceleration and deceleration states, said anti-skid control system comprising: wheel speed sensor means operatively connectable to each wheel of the motor vehicle, for generating pulse signals having pulse cycles which correspond to a revolutional speed of each wheel; pulse cycle measuring means for detecting and measuring the pulse cycles of said pulse signals from said wheel speed sensor means and providing a detected wheel velocity signal; calculating means for receiving said velocity signal and calculating at least one of the acceleration and deceleration states from said velocity signal; and discrimination means for determining if a period of said calculated one of the acceleration and deceleration states is longer than a predetermined time when said calculated one of the acceleration and deceleration states is less than a predetermined threshold value, said discrimination means discriminating said calculated one of the acceleration and deceleration states as noise when the period is shorter than the predetermined time, said anti-skid brake control system providing anti-skid control for the motor vehicle dependent upon discrimination of noise from said detected wheel velocity signal.
4. An anti-skid control system according to claim 3, wherein said pulse cycle measuring means is operatively connectable to receive the clock pulses and comprises means for counting a number of the clock pulses occurring during one cycle of said pulse cycles from said wheel speed sensor means and wherein said discrimination means is operatively connectable to receive the clock pulses and comprises means for counting a number of the clock pulses occurring during the period and comparing the period to the predetermined time.
5. An anti-skid brake control system having an electronic control unit operatively connectable to receive a brake switch signal, a brake voltage signal, a battery voltage signal and a velocity signal, said electronic control unit having a pulse count signal and comprising: central processor unit means receiving the brake switch signal, the brake voltage signal, the battery voltage signal and the pulse count signal, for calculating wheel speed, an acceleration state and deceleration state, discriminating the calculated acceleration and deceleration states from noise in accordance with predetermined time values and predetermined acceleration/deceleration threshold levels, and generating control signals for performing anti-skid control functions responsive to at least one of the discriminated calculated acceleration and deceleration states; pulse counter means receiving the velocity signal, for deriving the pulse count signal on the basis of the received velocity signal and providing the pulse count signal to said central processor unit means; memory means storing data including calculation sequences, for providing the data and calculation sequences to said central processor unit means; input buffer means receiving and providing the brake switch signal, the brake voltage signal and the battery voltage signal to said central processor unit means; output buffer means receiving said control signals, for providing said control signals as at least a failure lamp output signal, a failure relay output signal, a pressure holding solenoid output signal, and a pressure reduction solenoid output signal.
6. An anti-skid brake control system according to claim 5, wherein said central processor unit means controls at least a first valve and a second valve and comprises; deceleration detector means receiving said velocity signal, for detecting and providing a deceleration signal on the basis of said velocity signal, in accordance with a first predetermined time value and a predetermined deceleration value; first comparator means receiving said deceleration signal, for providing a first comparator signal in accordance with a predetermined deceleration threshold level; second comparator means receiving said deceleration signal, for generating a second comparator signal in accordance with a predetermined maximum deceleration threshold level; reference velocity determination means receiving said velocity signal and said first comparator signal, for generating a reference velocity signal in accordance with said first comparator signal; third comparator means receiving said velocity signal and said reference velocity signal, for generating a third comparator signal when said velocity signal is equal to said reference velocity signal; low peak detector means receiving said velocity signal, for generating and providing a low peak signal in accordance with a second predetermined time value and a second predetermined deceleration value; high peak detector means receiving said velocity signal, for generating a high peak signal in accordance with a third predetermined time value and third predetermined deceleration value; and average acceleration logic means receiving said velocity signal, the third predetermined tim value, the third predetermined threshold value and said low peak signal, for generating an average acceleration value signal varying in accordance with said velocity signal, dependent upon the third predetermined time value signal, the third predetermined deceleration value, said low peak signal and said third comparator signal, said central processor unit means controlling at least the first valve and the second valve in accordance with at least said second comparator signal, said third comparator signal, said low peak signal, and said high peak signal.