Circuit for Detecting Signal Loss, or Drop-Out, in a Digital Signal Processing System With a/D Conversion

the present invention relates to a drop-out detector circuits, and in particular to drop-out detector circuit in a device for playing back recorded data which processes a signal by digitizing a high-frequency signal component produced by reading a recording medium.

In the prior art, playback systems for reproducing recorded data, for example disc players for video discs prerecorded with FM-modulated image signals, usually employ an analog system for processing the FM image signals from the disc.

However, in view of the increased use of integrated circuits, there are many advantages to using digital rather than analog processing. In order to allow greater functional diversity in the procession of signals and to achieve better picture quality, the applicant has previously proposed (see Japanese Patent Application No. 60-280711) a playback apparatus for recorded data which digitally processes signals read out from a disc.

However, in a playback apparatus for recorded data such as a video disc player the presence of dirt or damage to the recording medium causes gaps, i.e., drop-out, in the signal read out from the recording medium. It is necessary to detect and compensate for these drop-outs. Many types of circuits for detecting drop-out in analog-processing playback devices are known in the prior art, but all require the use of separate circuitry.

In the view of the abovementioned problems, an object of the present invention is to provide a drop-out detector circuit which enables the detection of drop-out merely by the addition of a simple circuit to existing data playback devices using digital signal processing.

A drop-out detector circuit according to the invention comprises detector means which detects when the amplitude of the signal read from the recording medium exceeds the input parameters of the A/D converter used to digitize the signal read out, and is arranged so that the detector output is used as a drop-out detector signal.

FIG. 1 is a block diagram showing schematically the layout of a device for playing back recorded data provided with a drop-out detector circuit according to the invention;

FIG. 2 is a block diagram illustrating a preferred embodiment of the invention;

FIG. 3 is a waveform diagram illustrating the inputs and outputs of the A/D converter in FIG. 2;

FIG. 4 is a block diagram of another embodiment of the invention; and

FIG. 5 is a waveform diagram of the inputs and outputs of the A/D converter in FIG. 4.

A preferred embodiment of the invention will now be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing schematically a device for playing back recorded data provided with a drop-out detection circuit according to the invention. In this figure, the FM image signal read from a video disc or other recording medium is passed through an analog LPF (Low-pass filter) 1 and then fed to an A/D converter 2. The LPF 1 is provided to remove switching transient distortion from the A/D converter. Further details of A/D converter 2 will be given below; however, it is to be noted here that the A/D converter 2 has a drop-out detection function and that it produces a drop-out detection signal when drop-out is detected. The digitized FM image signal output from the A/D converter 2 is supplied to a digital BPF (bandpass filer 3. The digital BPF 3 extracts the A/D converter output, which contains FM audio signals, only those components required for image signal demodulation and feeds them to the next state, an FM demodulator circuit 4. The FM demodulator circuit 4 may employ, for example, a device proposed by the application in Japanese Patent Application No. 59-262481. The demodulated output of the FM demodulator circuit 4 then is passed to a video LPF 5 where only the baseband component of the image signal is extracted. The digitized image signal passing through the video LPF 5 is supplied to a drop-out compensator circuit 6 and a signal splitter circuit 7. The drop-out compensator circuit 6 responds to drop-out detection signals supplied by the A/D converter 2 so as to compensate for drop-out.

The signal splitter circuit 7 splits and samples, for example, the horizontal synchronizing signal and color burst signal contained in the digitized image signal, and feeds them for the clock generator circuit 8. The clock generator circuit 8 produces a 4 f.sub.sc (f.sub.sc is the subcarrier frequency) and a 4Nf.sub.sc (N is any integer greater than 1, for example, 3) clock based on the horizontal synchronizing signal or the color-burst signal received from the signal splitter circuit 7 or a standard horizontal synchronizing signal produced by a reference signal generator circuit 9, thus forming a PLL (phase-locked loop) circuit. The 4f.sub.sc and 4Nf.sub.sc clock signals are used as the clocks for digital processing, the 4Nf.sub.sc signal being used as the sampling clock for the A/D converter 2 and the signal processing clock up to the video LPF 5, the 4f.sub.sc signal being used for down sampling the output from the video LPF 5.

The digitized image signal output from the drop-out compensator circuit 6 is written into the buffer memory 10 using the 4f.sub.sc clock produced by the clock generator circuit 8 based on the color-burst signal sampled from the reproduced image signal. Data is read from the buffer memory 10 using the 4f.sub.sc reference clock produced by the referenced signal generator circuit 9. In this way, by reading data from the buffer memory 10 using a stable reference clock that is unrelated to the replay image signal, jitter in the replay image signal can be absorbed. The digitized image signal read from the buffer memory 10 is converted back to an analog signal by a D/A (digital/analog) converter 11 and output as the reproduced image.

FIG. 2 is a block diagram illustrating a preferred embodiment of the drop-out detector circuit according to the invention, which is an integral feature of the A/D converter 2 in FIG. 1. In FIG. 2, the A/D converter 20 is itself of the n-bit fully parallel comparison type, having its input signal voltage range defined by V.sub.max and V.sub.min as shown in FIG. 3. The A/D converter 20 is composed of n comparators 200.sub.1 -200.sub.n, which compare analog inputs, resistors R.sub.1 -R.sub.n+1 connected in series between each line setting the reference levels V.sub.max and V.sub.min for the comparators, and encoder 201 to encode the output of each comparator, and a latch circuit 202 with a digital output to latch the output of the encoder 201.

When the amplitude of the input signal to the A/D converter 20 goes beyond the range prescribed by V.sub.max -V.sub.min, an overflow or underflow occurs. The present invention detects drop-out by detecting this overflow or underflow. For this purpose, an overflow detection comparator 21 and an underflow detection comparator 22 are provided. The outputs of the comparator 21 and the comparator 22 are passed through an OR gate 23 and used as the drop-out detection signal. In other words, in cases where drop-out occurs due to the AC coupling of the A/D converter to the previous stage and there is an excess of the DC component DC in the signal read out from the video disc, the amplitude of the FM image signal has a large deviation due to the DC component, the presence of noise, and like, causing the amplitude to increase greatly. By detecting that the amplitude of the input signal of the A/D converter 20 has exceeded the V.sub.max or V.sub.min parameter, drop-out can be detected.

FIG. 4 is a block diagram illustrating another embodiment of the present invention. In this embodiment, when the amplitude of the input signal to the A/D converter 24 exceeds the prescribed input voltage limits, as shown in FIG. 5, the sampled digital output of the A/D converter is limited to a maximum voltage (V.sub.max) in the case of overflow and to minimum voltage (V.sub.min) in the case of underflow. In other words, the output is clamped to conform to the prescribed input voltage limits. Thus, drop-out can be detected by monitoring the occurrence of maximum and minimum values in the output of A/D converter 24.

In order to detect these maximum and minimum values, a maximum value comparison circuit 25 and a minimum value comparison circuit 26 are provided. The maximum value comparison circuit 25 has a comparison reference corresponding to the maximum value, and is arranged so that it produces an output whenever the output of the A/D converter 24 reaches this reference value. The minimum value comparison circuit 26 has a comparison reference corresponding to the minimum value, and is arranged so that it produces an output whenever the output of A/D converter 24 reaches this reference value. The outputs of the maximum comparison circuit 25 and the minimum comparison circuit 26 are passed through an OR gate 27 and used as the drop-out detection signal.

The above embodiments have been explained using a video disc as an example of the recording medium, but the invention may be used with a video tape. In other words, it makes no difference what medium is employed as long as the desired signal has been recorded as a high-frequency modulated signal.

As explained above, the drop-out detector circuit according to the invention has a detector means which registers when the amplitude of the signal read from the recording medium exceeds the prescribed input limits of the A/D converter used to digitize the read-out signal. Since the output of the detection means is used as the drop-out detection signal, it is possible to detect drop-out merely by the addition of a simple circuit, thus simplifying the overall circuit layout.