Power Relay Switching Control Device for Microwave Oven

The present invention relates to a switching (ON/OFF) control device of the power relay used for power control in a microwave oven. The present invention particularly relates to a power relay switching control device for a microwave oven designed to prolong the life of the power relay by carrying out the drive of power relay alternately between the positive(+) cycle and the negative(-) cycle of the alternating current input voltage.

According to the conventional microwave oven, it is designed to control the output of the magnetron by switching the alternating current voltage inputted to the high voltage transformer through the triac or relay so that it is possible to minimize the excess inrush current by carrying out a switching operation at the .pi./2 crossing point of the alternating current input voltage.

In a case where the triac is used for controlling the power supply, it is possible to carry out an exact switching at the .pi./2 crossing point of the alternating current input voltage due to a rapid and constant answering speed of the triac.

However, in such a case, there is a disadvantage in that it needs a radiating plate for radiating the heat produced from the triac, which makes the whole structure more complicated, and moreover, since the triac is expensive, the cost is higher.

Furthermore, in a case where a relay is used for controlling the power supply, there is also a disadvantage in that the answering speed of the relay is late and the answering speed is not constant depending on the characteristics of the relay. Therefore, it is impossible to carry out an exact switching at the .pi./2 crossing point of the alternating current input voltage and an excess inrush current is thereby increased at the time of switching. At this moment, a driving signal of the relay is output for a constant period, the drive of relay is continuously made for only one of the positive or negative cycles of the alternating current input voltage so that a phenomenon of potential difference takes place only in a direction between contacts of the relay, and thereby the life of the contacts of the relay is shortened.

The present invention is created to solve such conventional disadvantages as described above. The object of this invention is to provide a switching control device capable of prolonging the life of the relay by driving the relay for power control of a microwave oven alternately between the positive and negative cycles of the alternating current input voltage.

According to the invention, such an object is attained in a way that when an ON signal of the relay is generated, the relay is driven for the negative cycle of the alternating current input voltage. When an OFF signal of the relay is thereafter generated, the drive of the relay is interrupted from the positive cycle of the alternating current input voltage. When a new ON signal of the relay is thereafter generated, the relay is driven for the positive cycle of the alternating current input voltage. When a new OFF signal of the relay is thereafter generated, the drive of the relay is interrupted from the negative cycle of the alternating current input voltage.

According to the present invention mentioned thus far, the relay for power control of a microwave oven begins to be driven alternately between the positive and negative cycles of the alternating current input voltage, and its drive is interrupted alternately between the positive and negative cycles of the alternating current input voltage so that no phenomenon of potential difference does not take place in a direction between the contacts of relay, and the life of relay is thereby prolonged.

The construction and operational effects of the invention will now be described in more detail, by way of example, with reference to the accompanying drawings. In the drawings,

FIG. 1 is a block diagram of a control device of a microwave oven according to the invention;

FIG. 2 is an internal block diagram of the microcomputer of FIG. 1;

FIG. 3 is a detailed circuit diagram of the power relay ON/OFF control part of FIG. 2;

FIG. 4 is a flow chart to describe the operation of FIG. 3.

As is shown in FIG. 1, which is a block diagram of a control device of a microwave oven according to an embodiment of the invention, the control device comprises a power supply part 10 for supplying power to each part, a reset part 2, a 50 Hz clock input part 3, a buzzer control part 4, a door sensing part 5, a power relay control part 6 designed to regulate the output of magnetron by switching the power supply of the high voltage transformer, a display control part 7, a key input sensing part 8 and a main relay control part 9, all of which are connected to a microcomputer 1.

As is shown in FIG. 2, which is a block diagram of a microcomputer 1 of FIG. 1, the microcomputer comprises a central processing unit 11, a 50 Hz/60 Hz clock input sensing part 12, a general control part 13, a power relay ON/OFF signal generator 14, an internal register 15, a RAM 16, a ROM 17 and a power relay ON/OFF control part 18.

As is shown in FIG. 3, which is a detailed circuit diagram of the power relay ON/OFF control part shown in FIG. 2, the output side of the 50 Hz/60 Hz clock generator 27 generates a clock signal corresponding to an alternating current input of 50 Hz/60 Hz. The output of the 50 Hz/60 Hz clock generator 27 is connected to the input terminal on one side of the AND-gates A3, A4 and at the same time to the input terminal on one side of the AND-gates A1, A1 through the inverter I1. The output side of the power relay ON/OFF signal generator 14 is connected, on the one hand, to the input terminal on the opposite side of the AND-gates A1, A4 through the inverter I2 and, on the other hand, to the input terminal on the opposite side of the AND-gates A2, A3 through the pulse generator 21. The output terminals of the AND-gates A1, A4 are connected to the input terminal on one side of the AND-gates A5, A8 through the pulse generators 22, 23, respectively. The output terminals of the AND-gates A2, A3 are connected to the input terminal on one side of the AND-gates A6, A7. The input terminals on the opposite sides of the AND-gates A5, A6, are connected to the output terminal Q and the output terminals of the AND-gates A6, A7 are connected in common to the toggle input terminal K of the said toggle flip-flop T-F/F and to the input side of the power relay ON control unit 24. The output terminals of the AND-gates A5, A8 are connected to the input side of the power relay OFF control unit (25). The output sides of the power relay ON and OFF control units 24, 25 are connected to the set and reset terminals S, R of the power relay driving unit 26, wherein the pulse generators 21, 22, 23 are kinds of differential circuits designed to eliminate the negative pulse signals and to output only the positive signals. The power relay ON and OFF control units 24, 25 are monostable multivibrators designed to output pulse signals of a constant time as the pulse signals are put in the input sides thereof, and the power relay driving unit 26 comprises a flip-flop designed to come to a set state to turn on the power relay when a high potential signal is applied to its set terminal S, while to come to a reset state to turn off the power relay when a high potential signal is applied to its reset terminal R.

The operational effects of the composed invention are now described in more detail.

While high potential signals which are positive(+) cycles, are output from the 50 Hz/60 Hz clock generator 27, the high potential signals are reversed to low potential signals at the inverter I1 and are applied to the input terminals of the AND-gates A1, A2 so that the low potential signals are output from the output terminals of the AND-gates A1, A2, A5, A6 regardless of the output signals of the power relay ON/OFF signal generator 14. On the contrary, while low potential signals which are negative(-) cycles, are output from the 50 Hz/60 Hz clock generator (27), the low potential signals are applied to the input terminals of the AND-gates A3, A4 so that low potential signals are output from the output terminals of the AND-gates A3, A4, A7, A8 regardless of the output signals of the power relay ON/OFF signal generator (14).

When a high potential signal, which is a power relay ON signal, is output from the power relay ON/OFF signal generator (14), the high potential signal is reversed to a low potential signal at the inverter I2 and applied to the input terminal of the AND-gates A1, A4 so that a low potential signal is output from the output terminals of the AND-gates A1, A4, and as a high potential signal output from the power relay ON/OFF signal generator 14 is input the pulse generator 21, a pulse signal is output from the pulse generator 21 and applied to the input terminal of the AND-gates A2, A3. Accordingly as described above, while low potential signals are output from the 50 Hz/60 Hz clock generator 27, the pulse signal output from the said pulse generator 21 is applied to the input terminal of the AND gate A6 through the AND gate A2. At this time the toggle flip-flop T-F/F is in the initial state and a high potential signal output from its output terminal Q is applied to the input terminal on the opposite side of the AND gate A6 so that a pulse signal is output from AND gate A6 and applied to the power relay ON control unit 24.

Accordingly, as a high potential pulse signal of a constant time period is output from the power relay ON control unit 24 and applied to the set terminal S of the power relay driving unit 26, the power relay driving unit 24 comes to a set state to turn on the power relay.

On the other hand, since a pulse signal outputted from the AND gate A6 is, at this time, applied to the toggle input terminal CK of the toggle flip-flop T-F/F, a low potential signal is output from the toggle flip-flop T-F/F output terminal Q and a high potential signal is output from the output terminal Q, and accordingly a low potential signal is output from the AND gate A6.

Subsequently, when a low potential signal, which is a power relay OFF signal, is output from the power relay ON/OFF signal generator 14, the low potential signal is reversed to a high potential signal at the inverter I2 and applied to the input terminal on one side of the AND gate A4. Accordingly, when a high potential signal which is the positive(+) cycle, is output from the 50 Hz/60 Hz clock generator 27, as described above, a high potential signal is output from the AND gate A4 and applied to the pulse generator 23 so that a pulse signal is output from the pulse generator 23. Since a high potential signal is, at this time, output from the output terminal Q of the toggle flip-flop T-F/F and applied to the input terminal of the AND gate A8, the pulse signal output from the pulse generator 23 is applied to the input terminal of the power relay OFF control unit 25 through the AND gate A8. Accordingly, as a high potential signal of a constant time period is output from the power relay OFF control unit 25 and applied to the reset terminal R of the power relay driving unit 26, this unit 26 is reset so as to turn off the power relay.

Subsequently, when a high potential signal which is a power relay ON signal, is again output from the power relay ON/OFF signal generator 14, a pulse signal is output from the pulse generator 21, as described above, and this pulse signal is applied to the input terminal of the power relay ON control unit 24 through the AND gates A3, A7 when a high potential signal of a positive(+) cycle is output from the 50 Hz/60 Hz clock generator 27 as described above, so that the power relay driving unit 26 comes to a set state to turn on the power relay again. At this time, the pulse signal outputted from the AND gate A7 is applied to the toggle input terminal CK of the toggle flip-flop T-F/F so that a high potential signal is output from the output terminal Q of the flip-flop T-F/F, and a low potential signal is output from the output terminal Q, and accordingly a low potential signal is put out of the output terminal of the AND gates A7, A8.

Thereafter, when a low potential signal which is a power relay OFF signal, is again output from the power relay ON/OFF signal generator 14, a pulse signal is output from the pulse generator 22 at the time a low potential signal is output from the 50 Hz/60 Hz clock generator 27 in such way as described above, and this pulse signal is applied to the power relay OFF control unit 25 through the AND gate A5 so that the power relay driving unit 26 is reset to turn off the power relay.

The above-described operation can be represented in a flowchart as shown in FIG. 4.

As described above, the present invention effects the ON-point of the power relay for controlling the input power of a high voltage transformer and is realized alternating between the positive and negative cycles of the alternating current input voltage, and the OFF-point of the power relay is also realized by alternating between the positive and negative cycles of the alternating current input voltage. Therefore, a phenomenon of potential difference does not occur in a direction between contacts of the power relay, and the life of the power relay is thereby prolonged, and further radiating plates, etc. are not used, which are required when using a triac, and this fact leads to a reduction of the cost.