Circuit and Method for Measuring and Digitizing the Value of a Resistance

The present invention relates to a circuit and a method for measuring and digitizing a resistance, particularly a resistance employed in a temperature sensor.

Conventional circuits of this type include as a rule open loop systems. In other words, the signal from a sensor measuring the value is supplied to an analog-to-digital converter (A/D converter) without any feed back coupling or any feed back from the converter to the sensor circuit. This is evident, for example, from the article "Mikrovolt Messen" (Funkschau 14/1983, pp. 37/38) which describes and A/D converter, which operates in accordance with the principle of charge balancing (called hereinbelow ChB), and wherein there is supplied a signal, for example from a temperature sensor, to an input of the A/D converter. The ChB method is known, for example, from "Elektronik", vol. 12/1974, pp. 469-472, and from U.S. Pat. No. 3,790,886. Special temperature measuring circuits of this type are known from the German published application Nos. 3,129,476 and 3,130,499. Both also use an "open loop" system of a sensor measuring a value and an A/D converter. Moreover, in neither case is a pure resistance ratio measurement made. In one case the resistances of the switches, which connect the reference- or the measured resistance to the A/D converter, are included in the measurement (3,129,476). In the other case (3,130,499) the capacity of a capacitor is included in the measured value determination, and can affect the accuracy of the results.

Accordingly, it is an object of the present invention to provide a circuit and a method by which, as a result of substantial elimination of any possible error sources, very precise resistance measurements having a high measured value resolution are possible, especially for temperature sensors.

In keeping with these objects and with others which will become apparent hereinafter, one feature of the present invention resides, briefly stated, in a circuit in which the resistance to be measured is both a component of an A/D converter, which operates in accordance with a charge balancing principle, and is also a component of a resistance network. The circuit permits both a pure resistance measurement, and attainment of a composite measured value from a plurality of individual measured values.

This concept means that the sensor measuring the value and the A/D converter are merged into a "closed loop" system. As will become clear from the following description, the A/D converter is connected to the circuitry of the resistance to be measured as part of a feedback loop. This feature, in conjunction with obtaining a composite measured value from several individual measured values provides a high resultant resolution. Moreover, the inventive concept has the advantage that high accuracy voltage or current reference sources can be dispensed with; it requires only precision resistances, which, for a comparable long-time stability, are considerably less expensive, than high-accuracy voltage- or current-reference sources.

It is conventional to operate the comparator of a ChB converter against a fixed potential. This, however, means that the individual converting time periods or intervals would have different respective durations depending on the measured value. In accordance with an advantageous embodiment the comparator is connected to a periodical saw-tooth voltage generator. This embodiment provides for an operation at fixed time periods or time intervals, which in turn is advantabeous for processing the digital measured value. Thus digital filtering, which further considerably improves the quality of the measurement, is made possible in a simple manner.

For the cases in which different resistances must be measured, a further elaboration of the circuit provides for additional switches, which allow switching between several resistances. In this manner it is possible, for example, to encompass several temperature measuring points in a heat flow calorimeter.

The invention also covers a method of the above-mentioned type, in which a current i.sub.x is dependent on a predetermined voltage, and further is dependent on the magnitude of the resistance to be measured. That current, in turn, is used as a measure for the magnitude of that resistance, and is converted, according to the charge balancing principle, into a digital value. In accordance with the invention the current i.sub.x, which flows through the rsistance to be measured is maintained by the very charge balancing circuit serviang to digitize the value of that resistance.

Advantageously, the method is performed so that a timing circuit produces time periods of constant duration, which are in turn subdivided into first and second time intervals, and wherein a current i.sub.x is drawn alternately during the first time interval from a supply voltage, and during the second time interval from an integrator of the charge balancing circuit. During the first time interval a current i.sub.1, which is also drawn from the supply voltage, flows in the integrator; the output voltage of the integrator is compared in a comparator with a periodic saw-tooth voltage. During the first or the second time interval high frequency timing pulses are supplied through a gating circuit to a counting and evaluating circuit, and the sum of the timing pulses forms a measure for the magnitude or value of the resistance; for the purpose of indicating the value of the resistance, a plurality of the sums of the timing pulses are evaluated.

The novel features of the present ainvention are set forth in particular in the appended claims. The invention itself, however, both as to its construction and its manner of operation will be understood from the following description of preferred embodiments which are accompanied by the appended drawings.

FIG. 1 is a block circuit diagram of the prior art;

FIG. 2 is a block circuit diagram schematically showing an arrangement in accordance with the present invention;

FIG. 3 is a circuit diagram of the inventive arrangement in accordance with one embodiment of the invention;

FIG. 4 is a signal diagram, and

FIG. 5 is a modification of the circuit of FIG. 3.

FIG. 1 shows a known arrangement of the above-mentioned type. A resistance 10 to be measured is a component of a sensor circuit 12. The resultant analog measured signal is supplied to an A/D converter 14. The resulting digital measurement signal is processed, if desired with corrections, in a circuit 16 for display on a digital indicator 18. In the conventional methods the generation and transformation (for example amplification) of the analog measured signal is independent of any subsequent conversion into a digital magnitude; in other words one deals here with an open loop system.

The present invention differs from the conventional circuit and method. In accordance with the invention the magnitude of the digitized signal affects the generation and processing of the analog measured signal by feedback, as symbolized in FIG. 2, by the use of a feed back conductor 20. There results a closed system (12', 14', 20), which is formed as a closed control loop or regulating circuit. Contrary to open loop systems, the closed control loop suppresses many disturbances from amplifiers and other modular elements, which disturbances or errors cannot be prevented even by integration or averaging of many individual values in open loop systems.

FIG. 3 shows a circuit in accordance with one embodiment of the invention. A resistance network includes two precision resistances R.sub.o and R.sub.2 arranged in series, and a resistance R.sub.1 interconnected therebetween, which latter need not be of a high accuracy. A second set of resistors is connected in parallel with the resistors mentioned above, and includes a precision resistance R.sub.3, and a resistance R.sub.m which is to be measured, which in the example illustrated forms part of a temperature sensor in a calorimeter. The network is connected to a supply voltage U.sub.o. A current sink is provided in its lower part (difference amplifier V.sub.2 and field effect transistor T.sub.1). To the upper part there is connected an integrator 21 (difference amplifier V.sub.1, capacitor C.sub.1). A switch S.sub.1 is connected between R.sub.3 and T.sub.1, which alternately closes the current path either between R.sub.3 and R.sub.m, or between the plus pole of the supply voltage and R.sub.m. A comparator K.sub.1 is connected with the output of the integrator 20, and has a second input connected to a saw-tooth voltage generator 22 (current source 23, capacitor C.sub.2, switch S.sub.2). The output of the comparator K.sub.1 is applied to the D-input of a flip-flop 24, which controls the switch S.sub.1 and a gate 26 synchronously with the clock frequency. Reference numeral 28 identifies digital circuitry, which, for example, includes an oscillator for the clock or timing impulses, a time control for the saw-tooth voltage generator 22 (signal RAR=ramp reset), and a counting and evaluating circuit, as well as a control for a digital indicator 30. The details of the digital circuitry 28, which is substantially formed by a suitably programmed microcomputer, is not a part of the invention, but is of conventional design, and does not therefore require any further explanation.

The operation of the circuit will be explained with reference to FIG. 4. At the beginning of one individual measuring period (ramp) T the switch S.sub.2 of the saw-tooth generator 22 is closed by the signal RAR for a predetermined short time interval (for example 16 timing impulses). In this time interval the saw-tooth voltage U.sub.C2 decreases to zero. It thereby drops below the output voltage U.sub.V1 of the integrator 21. At this moment the output of the comparator K.sub.1 changes to a logic "1", and causes the following events to occur at the next timing impulse througha the flip-flop 24:

the switch S.sub.1 assumes the position shown in FIG. 3, and

the gate 26 opens.

This means that

a current i.sub.1 flows in the integrator 21, so that its output voltage U.sub.V1 decreases linearly,

the current i.sub.x, which flows through the resistance R.sub.m and is proportional thereto, is drawn from the supply voltage, and

timing impulses P are supplied through the gate 26 to the counter of the digital circuitry 28.

As soon as the voltage U.sub.V1 falls below the saw-tooth voltage U.sub.C2, the output of the comparator K.sub.1 turns to logic "0". This in turn, causes the following events to occur through the flip-flop 24 at the next timing impulse:

the gate 26 is closed, and

the switch S.sub.1 is switched over.

Now the integrator 21 is discharged at a current i.sub.1 -i.sub.x, wherein i.sub.x >i.sub.1 .multidot.. The current sink V.sub.2, T.sub.1 draws the current i.sub.x partially from the integrator 21, and the output voltage U.sub.V1 increases again linearly, until the cycle after the end of the period T is again resumed by the signal RAR.

The operational principle of the charge balancing circuit can now be clearly understood. On average the same charge is supplied to the integrator 21 (current i.sub.1.t) as is withdrawn therefrom at a current (i.sub.1 -i.sub.x).(T-t) and wherein i.sub.x >i.sub.1.

The timing impulses P counted during the time period t are a measure of the unknown resistance R.sub.m. As can easily be deduced, the magnitude of the resistance R.sub.m is obtained from the formula ##EQU1##

This means that a pure measurement of relative resistance takes place, in which only the values of the precision resistance R.sub.o, R.sub.2 and R.sub.3, as well as the time intervals T and t are present. In a simple manner and with simple means an accurate measurement is therefore made possible.

For a further improvement of the accuracy, and so as to attain the desired ensuing high resolution, the individual sums of the timing impulses P obtained from a plurality of periods T are summed, and subsequently, after known filtering, linearization and rounding off performed in a microcomputer, are indicated on the indicator 30.

Some approximative numerical values will be presented for illustrative purposes:

timing or clock frequency: 5 MHz

period T: 1 ms (approximately 4000 impulses are maximally usable per period)

number of periods per resultant indication: 1000, namely a coarse result yields 4 million points, while the indicated range (after rounding off) equals 400,000 points.

Therefore a digital thermometer was, for example, realized in a region of from -100.degree. to +200.degree. at a resolution of 0.001.degree..

It is to be understood that the above-mentioned numerical values (clock or timing frequency, period duration, number of timing periods per result or indication) can be varied within wide a range in dependence on conditions.

FIG. 5 shows a variant of the invention. It is obtained with a practically unchanged construction of the circuit (just the control program in the digital circuitry must be correspondingly adapted), by introducing additional switches for switching between various resistances to be measured.

Three resistances R.sub.m3 R.sub.m4 and R.sub.m5 to be measured are linked via respective switch pairs S.sub.30, S.sub.31 or S.sub.40, S.sub.41, or S.sub.50, S.sub.51 with the current sink V.sub.2, T.sub.1. Additionally a precision resistance R.sub.6 with switches S.sub.60, S.sub.61 is provided, by means of which a calibration can be performed. During calibration a predetermined value for the time period t is to appear through a plurity of measured periods (ramps).

As can be seen from FIG. 5, only that switch pair is closed (for example S.sub.30, S.sub.31) which is associated directly with the resistance to be measured. All other switches are open. The resistance of the switches does not influence or affect the result. The circuit control is performed in a known manner by signals of the timing circuit of the digital circuitry 28 (not shown), which can be performed by corresponding programming of the microcomputer. A typical case of utilization of this variant would, for example, be an alternating measurement of several temperature measuring locations in a system.

With suitable adaptation of the evaluation computations in the digital circuitry 28, both the time t (as in the first example), and the time (T-t) may be utilized for counting of the timing impulses P.