Pulse Amplifier

The present invention relates to a pulsed amplifying system and method; and more particularly, to an improved pulsed amplifier and method of the type using energy storage capacitance for supplying pulsed power supply current to a load.

Amplifiers which operate in modes class B or C have a DC bias which leaves the device non-conducting in the absence of an AC drive signal. When a drive signal is impressed on the input electrode (usually a base, emitter, or gate) the amplifier conducts over approximately half of the input AC cycle. The DC component of this current is drawn from the power supply, which is the ultimate source of energy for the AC output signal. For pulsed RF amplifiers, the DC drawn by the transistor is in the form of current pulses, having a duration, rise, and fall times of the RF envelope. It is generally required to have an energy storage capacitor which supplies this pulsed DC current; and the power supply then provides only a relatively smooth recharge current to the capacitor.

For systems with long pulse widths, such as in the neighborhood of 100 microseconds and longer, for example, the energy storage capacitor can become quite large, and consume a significant portion of the total system weight because it must supply all the energy to the transistor amplifier for a single pulse, and do it without much voltage droop. The initial voltage on the energy storage capacitor is chosen to be the maximum that allows reliable operation of the transistor. The capacitor is sized to hold voltage droop to the level which still provides acceptable power out of the amplifier. To a first order approximation, the transistor output power droop is inversely proportional to the square of the capacitor voltage droop. Thus, if the capacitor is large enough to hold voltage droop to five percent, for example, the amplifier output power droops approximately 10 percent, and 90% of the stored energy remains in the capacitor, unused. It is obviously inefficient to store 90% more power in a capacitor bank than is used by the amplifier. This inefficiency shows up in system weight, size, and cost.

In vacuum tube radar transmitters, the energy storage problem is sometimes alleviated by the use of a "line-type" modulator. The line-type modulator uses a pulse forming network (PFN) instead of a brute force capacitor bank; and the capacitors in the PFN are completely discharged on each pulse. This technique, however, requires a high current electronic switch for the PFN, such as a thyratron, an SCR, or a thyristor, for example. For a solid state transmitter, the line-type modulator represents not only additional system complexity, control circuitry, cost, power consumption, but also constitutes a single thread failure mode affecting all the transistors it would modulate.

One of the objects of the present invention is to provide an improved amplifier and method that minimizes the size, cost, and weight of energy storage capacitors.

Another object of the present invention is to provide an improved amplifier system and method that produces a nearly constant and optimum operating voltage during the output pulse.

A further object of the present invention is to provide an improved amplifier system and method that is capable of accommodating any input pulse width up to the design maximum of the amplifier.

A still further object of the present invention is to provide an improved amplifying system and method that is completely passive in design and overcomes the disadvantages of a line-type modulator.

Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part wil be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

To achieve the objects, and in accordance with the purpose of the invention, as embodied and broadly described herein, a pulsed amplifier according to the present invention comprises an electronic switching device having an input electrode means and output electrode means operative to switch between a conducting and nonconducting state in response to the application of spaced pulses to the input electrode means for producing corresponding spaced pulses on the output electrode means. The switching device is capable of withstanding without breakdown, a DC voltage having a first level applied to the output electrode means during the nonconducting state and having an operating DC voltage with a second level less than the first level for application to the output electrode means during the conducting state. A plurality of circuit sections are electrically connected to the output electrode means, each of the circuit sections includes an inductance and a capacitance. Each inductance is series connected to one another; and each capacitance is connected in parallel to each other between each respective inductance. A DC voltage source has its positive terminal connected to one end of a plurality of serially connected circuit sections, with the other end of the serially connected circuit sections being coupled to the output or collector electrode of the electronic switching device. The plurality of circuit sections are charged during the nonconducting state of the switching device providing the capacitance of each circuit section with a voltage substantially corresponding to the first level voltage. The inductance and capacitance of each of the circuit sections have a value effective to discharge the capacitance of each circuit section successively at a decreasing frequency for reducing the applied voltage from the first level to the second level during a selected first portion of the pulse, and maintaining the second voltage value for the duration of the pulse.

In another aspect, the present invention provides for a method of generating amplified output pulses in an amplifier having an electronic switching device with input and output electrodes and a source of DC voltage connected across the output electrodes. The method comprises applying spaced signal pulses to the input electrode, charging a plurality of individual capacitors with a current having a voltage level substantially greater than the operating voltage of the switching device between each of the spaced signal pulses, discharging the current from one of said plurality of individual capacitors in response to the application of a signal pulse to reduce the voltage applied to the output electrode to the operating voltage, and discharging the current from at least one other of the plurality of capacitors for maintaining the operating voltage substantially at the operating level of the switching device for the duration of the pulse.

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate one embodiment of the invention, and together with the description, serve to explain the principals of the invention.

FIG. 1 schematically illustrates a typical basic transistor amplifier utilizing a single capacitor for energy storage;

FIG. 2 is a schematic diagram of a transistor amplifier in accordance with one embodiment of the present invention;

FIG. 3 is a schematic diagram of a voltage waveform illustrating the operation of a pulsed amplifier in accordance with the present invention;

FIG. 4 is a diagram illustrating capacitor currents during an output pulse of an amplifier constructed in accordance with the present invention;

FIG. 5 is a schematic diagram illustrating a plurality of connected amplifier stages in accordance with the present invention;

FIG. 6 is a schematic diagram of an equivalent circuit illustrating actual values of capacitance and inductance in the storage network of an amplifier constructed in accordance with the present invention; and

FIG. 7 is a flowchart illustrating the manner in which the inductance and capacitance values are calculated in accordance with the present invention .

With reference to the drawings, wherein like reference characters refer to similar parts, FIG. 1, which illustrates a typical solid state amplifier, will be described prior to discussing the present invention. A transistor referred to at 10 includes a base 12, an emitter 14 connected to ground, and a collector 16. A power supply 18 is connected to collector 16 through inductive choke coil 20 over wire 22 to bias transistor 10. The voltage of power supply 18 corresponds to the maximum or optimum operating voltage of transistor 10; and charges a storage capacitor 24 connected at one side to power supply 18 and the other side to ground, during the times that transistor 10 is nonconductive. Choke coil 20 and a choke coil 26, which is connected to base 12 blocks the RF current but permits the DC component of current to flow. Upon the application of an RF pulse 28, as the input signal to base 12, transistor 10 conducts, thus discharging storage capacitor 24 through blocking coil 20 and collector terminal 16 of the transistor 10. The application of input signal 28 and the discharge of capacitor 24 provides an amplified output pulse 30, the amplitude of which depends upon the voltage remaining at capacitor 24 throughout the duration of the pulse. Capacitor 24 must be sized to hold voltage droop to a level which still provides usuable power out of the amplifier as previously mentioned, to a first order approximation the transistor output power droop is proportional to the square of the capacitor voltage droop. If the capacitor is large enough to hold voltage droop to one volt out of an operating voltage of 40 volts, for example, the amplifier output power droops approximately 5 percent. Thus, for a 500 kilowatt amplifier, the transistors would typically draw a total of 22,500 amperes; and with a 350 microsecond pulse width, a total of 7.8 Farads is required to hold voltage droop to one volt. This many capacitors would weigh approximately 275 lbs; and place a severe penalty on a weight limited system.

It should be noted that the amplifying modes of the improved class B or class C amplifier described herein simultaneously provides an RF (or AC) amplifier means for the input signal and a switching load means for the DC power supply. Since the invention utilizes the characteristics ofthe dual AC and DC switching characteristics of class B or C amplifiers, the electronic devices of the amplifier circuit are referred to as switching devices as well as RF amplifying devices.

A pulsed amplifier in accordance with the present invention comprises an electronic switching device having input electrode means and output electrode means operative to switch between a conducting and nonconducting state in response to the application of spaced pulses to the input electrode means for producing corresponding spaced pulses on the output electrode means. As embodied herein and referring to FIG. 2, a pulsed amplifier generally referred to as 32 comprises a transistor 10 having an input electrode means that includes a base 12 of transistor 10, an output electrode means that includes emitter 14 and collector 16 of transistor 10. The transistor 10 is operative to switch between a conducting and nonconducting state in response to the application of an RF input pulse referred to as 28.

In accordance with the invention, the electronic switching device is capable of withstanding without breakdown a DC voltage having a first value applied to the output electrode means during the nonconducting state and having an operating DC voltage with a second value less than the first value for application to the output electrode means during the conducting state. Referring again to FIG. 2 and as embodied herein, the electronic switching device may be any well known RF power transistor that operates class B or class C and is capable of withstanding in a nonconducting state, a voltage substantially higher than the maximum operating voltage of the transistor. In one actual reduction to practice, the transistor 10, was a bipolar transistor commonly known as a PH8680 transistor, manufactured by M/A-COM PHI. However, an FET transistor having the aforesaid operating characteristic may be used. The RF blocking coils 20 and 26 are similar to the blocking coils utilized in the typical power amplifier previously described in connection with FIG. 1.

In accordance with the invention, a plurality of circuit sections are electrically connected to the output electrode means, each of the circuit sections including an inductance and a capacitance, with each inductance being series connected to one another, and each capacitance being connected in parallel to each other between each respective inductance. As embodied herein, and again referring to FIG. 2, a storage network is comprised of circuit sections 34, 36 and 38. Circuit section 34 includes an inductance 40 and a capacitance 42. Circuit section 36 includes an inductance 44 and a capacitance 46. Circuit section 38 includes an inductance 48 and a capacitance 50. Inductance 40, 44 and 48 are connected in series, with one end of the series connection being coupled to collector electrode 16 of the transistor 10 over wire 23 and RF choke coil 20. Series connected sections 34, 36 and 38 are connected at the opposite end to the positive terminal of a DC power supply 52. Capacitor 42 of circuit section 34 has one side connected between inductance 40 and 44 and the other side connected to ground. Capacitance 46 is connected at one side between inductance 44 and 48 and at the other side to ground; and capacitance 50 is connected at one side between the positive terminal of DC power supply 52 and inductance 48, and the other side is connected to ground.

A small RF bypass capacitor 54 is connected at one side between RF choke coil 20 and inductance 40 of circuit section 34, and connected at its other side to ground. Thus, the LC network comprised of circuit sections 34, 36 and 38 replaces the brute-force capacitor bank 24 mentioned in connection with FIG. 1, and results in a substantial decrease in total capacitor size and weight. Such weight reduction is effected in that during each pulse, the capacitors discharge an appreciable percentage of their total capacitance.

The invention further includes a DC voltage source electrically connected to the output electrode means in parallel with the plurality of circuit sections for charging during the non-conducting state of the electronic switching device, the capacitance of each circuit section with current having a voltage substantially corresponding to the previously mentioned first level which is substantially higher than the normal operating voltage of the transistor. Referring to FIG. 2, power supply 52 has its positive terminal connected to the series connected circuit sections and its other terminal connected to ground. Power supply 52 in the aforementioned actual reduction to practice was capable of charging capacitors 42, 46 and 50 between pulses when transistor 10 is nonconducting to approximately 56 volts. The normal operating voltage for the transistor 10 is 40 volts.

In accordance with the invention, the inductance and capacitance of each of the circuit sections 34, 36 and 38 are selected to have a value effective to discharge the capacitance 42, 46 and 50 respectively, of each circuit section successively at a decreasing frequency for reducing the applied voltage from the first level to the second level during a selected first portion of the pulse, and maintaining the second voltage level for the duration of the pulse.

Referring to the diagram of FIG. 3, and recalling that the storage network comprised of circuit sections 34, 36 and 38 is charged to a high voltage represented at 56 of the waveform of FIG. 3, which is prior to the commencement of the output pulse represented at point 58 on the graph. As previously mentioned, capacitor 54 closest to transistor 10 is kept as small as possible and is used only for RF stability. However, inductor 40 which is closest to transistor 10 largely determines the fall of the collector voltage when the drive or input signal 28 is applied to the device. This rapid fall time is represented by slope 60 of the waveform of FIG. 3. Inasmuch as capacitors 42, 46 and 50 are charged to a voltage level substantially above the design operating voltage level of transistor 10, which in the present example is an excess of between 15 and 20 volts, the voltage fall time represented by slope 60, from initial overvoltage to the desired pulse operating voltage, which in the present example is approximately 40 volts, is designed to be fast enough for reliable operation of the transistor. In other words, the voltage must fall rapidly to the safe conducting voltage of the transistor so as not to injure the transistor. For most bipolar transistors, this fall time need only be on the order of 5 microseconds or less. In the one actual reduction to practice referred to previously herein the PH8680 transistor was subjected repetitively to an overstressed voltage operation in the neighborhood of 56 volts for approximately 5 microseconds without adverse consequences. The various values of inductances 40, 44 and 48 and of capacitance 42, 46 and 50 together with the number of circuit sections such as 34, 36 and 38 which are used, control the amount of initial undershoot as represented by 62 of the FIG. 3 waveform, the ensuing overshoot represented at 64, and the flat top ripple and length of the flat top as shown generally at 66. A storage network as described herein includes capacitors which discharge to a much greater extent than the amount of flat top ripple voltage. It is this property which allows for a large decrease in total capacitor size and weight. It has been determined that a 5 to 1 or greater reduction in capacitor size and weight is obtained by the use of the present invention. For example, an amplifier that had a capacitor storage bank in the neighborhood of 275 lbs, now has an energy storage network in the neighborhood of 50 to 60 lbs. Portion 68 of the waveform of FIG. 3 represents a transient that may be snubbed or clipped if desired. However, inasmuch as this is at the tail end of the pulse, it has a negligible affect on the overall operation of the amplifier.

Referring to FIG. 4, a plurality of waveforms illustrates capacitor currents in four major capacitors of a four-section storage network. As seen from FIG. 4, the chosen pulse length is approximately 350 microseconds and supplies approximately 100 amps peak capacity. Curve 74 represents the current in the capacitor closest to the transistor; such as capacitor 42, which was described in connection with FIG. 2. Curve 76 represents the current in the next circuit section such as capacitor 46 of FIG. 2; while curves 78 and 80 represent circuit sections further from the transistor 10. Curve 78 would correspond to circuit section 38 and curve 80 would correspond to an additional series connected circuit section not illustrated. It is noted that the capacitors and inductors are sized so that the curve 74 and 76 which represent the capacitors closest to the transistor of the amplifier have the highest frequency of currents. Thus, these capacitors such as 42 and 44 warrant spending the most weight on them. Lighter weight, lower frequency capacitors such as represented by curves 78 and 80 may be relegated to the rear of the network. Note that the currents of the last two capacitors corresponding to curve 78 and 80 of FIG. 4 are both delayed in time during each pulse as indicated at point 80 and point 82 as well as having a much lower frequency than the capacitors generating the curve 74 and 76. The highest frequency of importance in the example described is approximately 11 kHz, and occurs only in the first capacitor. This of course permits the steep slope 60 or rapid fall time of the voltage at the beginning of each pulse for reliable operation of the transistor as described in connection with FIG. 3. The low audio range of the remaining circuit sections corresponding to curve 78 and 80 will permit relatively light and inexpensive capacitors to be used. A network with a 56 volt charging voltage, and a 40 volt discharge pulse, results in a 7 to 1 reduction in required capacitance. However, as previously mentioned, the practical weight reduction appears to be more in the neighborhood of 4 or 5 to 1. This is because of slightly higher voltage capacitors are needed, and the inductive coils add some weight.

In the example illustrated, a storage network was fabricated with the value of a first inductor such as 40, chosen to remove initial overshoot and smoothly achieve full voltage in approximately 20 microseconds. On turn-off, a large transient spike such as shown at 68 in FIG. 3 occurred because the current in inductor 40 had nowhere to go when the RF transistor of the amplifier turned off. This spike is almost completely removed by a "freewheeling diode" 80 connected across first inductor 40. Diode 80 has no effect on the active portion of the pulse.

In one actual reduction to practice, the first capacitor was a Sprague 673D which was designed to handle large RMS currents. These transistors are specifically designed for switching type power supplies and are well characterized for ESR and RMS current capability. Because of the long pulse width, most of the RMS currents are in the spectrum between one and ten kHz, this is a less critical condition than their usage in switching power supplies. Although individual and isolated inductors may be used as illustrated, it was found to be convenient to fabricate just a single inductive coil with a number of taps corresponding to the number of circuit sections used. This arrangement introduces mutual inductance between the inductors which is beneficial to the pulse shape and RMS current distribution in the network.

For certain applications, the energy storage network comprised of circuit sections such as 34, 36 and 38 of FIG. 2 may be distributed throughout a solid state power amplifying system in several ways. For example, and referring to FIG. 5 an amplifier system comprised of modules 32', 32", and 32'", may have the first two circuit sections associated with each of the individual modules and the remaining circuit sections common to all of the modules of the amplifier system. With reference to FIG. 5, module 32'may include circuit sections 84 and 86; while module 32" may include circuit sections 88 and 90; and module 32'" may include circuit sections 92 and 94. Thus, for a four-section network the first two sections for each module as previously described are parallel in each of the several amplifier modules. The last two circuit sections such as 96 and 98 are shared with all of the modules of the amplifying system. This arrangement has the advantage of placing the critical initial inductor as previously described in connection with FIG. 2, and storage capacitors close to the amplifying devices, and remotely placing the bulk of the inductors and capacitors. In this example, the inductors in the back portion of the network are shared by all modules and are relatively small, possibly implemented by controlled lead inductance.

Attached to, and forming a part of this specification, is Appendix A having pages A-1 through A-15. Appendix A is a printout of a program for calculating the values of the capacitance and inductance for the various circuit sections used in a storage network of the present invention. As indicated in FIG. 7 at block 101 the starting values are first read into the computer in a conventional manner. Preferably, the non-operating voltage which is applied for charging the various capacitors is entered into the system together with the voltage at which the transistor of a particular amplifier is operated. Additionally, the width of the pulse and the duty cycle is input to the program. Further, the program provides for selecting the frequency for printing out the values DT, TPRINT, such as each microsecond, for example. Also, the tilt factor is calculated where one corresponds to a substantially level voltage value throughout the duration of the pulse.

With reference to the equivalent circuit of FIG. 6, the capacitive resistance inherent in each of the circuit sections and referred to as 103, 104, 105, 106 and 107 is input into the program as well as the resistance of the inductance in each circuit section referred to at 108, 109, 110 and 111. Such inductive resistance is referred to as RL. The total capacitance of the network is also read into the system and is referred to in the program as CTOTAL. The inductance is inserted as henries and the capacitance is input as Farads in the program. The coupling coefficients between the inductors i and j read in as Kij.

After the starting values are read into the program for calculating the capacitance and resistance values of the storage network, the network response is calculated as indicated at block 112. Then the deviation from the desired network response is calculated as indicated at block 114. If this deviation is within an acceptable range as determined by decision block 116, then the results are printed out as indicated at 118. If the deviation is not within range, the values are adjusted by the optimal seeking algorithms as outlined in the program, and the deviation from desired response is again calculated at block 114.

In one actual reduction to practice, the stand-off non-operating voltage was 56 volts and the operating voltage was 40 volts, and the pulse width was 350 microseconds. The various inductance and capacitance values were those indicated in the circuit of FIG. 6 herein. The present invention is useful for any size of Class B or Class C amplifier, but is most advantageous for systems with long pulse widths and duty cycles up to 30 or 40 percent. In very high duty systems, the power supply must be stiff enough to supply a large proportion of the pulse energy, and the required energy storage is minimized. A present application is for power amplifiers which drive resonant cavities, such as those used for particle accelerators or electron beam lasers, for example. In these applications, the complex shape of the RF rise time imposed by the network characteristics is not pertinent, since the initial portion of the RF pulse is used only to charge the cavity. Long pulse solid state radar transmitters would benefit from the use of the present invention, particularly those having pulse widths up to several milliseconds. Brute force capacitors for these radars would be very large and expensive.

The transient voltage spike at the beginning of the pulse, if desired, can be reduced by controlling the rise time of the RF drive to the amplifier. Similarly, the transient voltage spike which occurs when the transistor turns off, can be reduced by controlling the fall time of the RF drive to the amplifier. This latter transient voltage spike, may also be reduced by an RC damping network or snubber, or by a zener diode clipper as previously mentioned.

In carrying out the method of the present invention, spaced signal pulses are applied to the input electrode of an electronic switching device having a source of DC voltage connected across the output electrodes. Charging a plurality of individual capacitors with a current having a voltage level substantially greater than the operating voltage of the switching device between each of the spaced signal pulses, and discharging the current from one of the plurality of individual capacitors in response to the application of a signal pulse in order to reduce the voltage applied to the output electrodes to correspond to the operating voltage of the electronic switching device, and discharging the current from at least one other of the plurality of capacitors for maintaining the voltage substantially at the operating level of the switching device for the duration of the pulse.

It will be further apparent to those skilled in the art that various modifications and variations can be made to the system and method of the present invention, without departing from the scope or spirit of the invention; and it is intended that the present invention cover such modifications and variations of this system and method, provided that they come within the scope of the appended claims and their equivalents.