Method for Monitoring Etching Processes

1. Field of the Invention

The present invention relates generally to a method for monitoring etching processes effected by ions, radicals and/or neutral particles activated in a plasma, and more particularly to a method for identifying an end point of material erosion of a layer to be etched during material etching in a plasma.

2. Description of the Related Art

The designational, or predeterminable, and dimensionally true structuring of thin, insulating layers by etching processes effected by ions, radicals and/or neutral particles activated in a plasma is a critical process step in the manufacturing of VLSI semiconductor components, as may be derived from the book "VLSI-Technology" by S. M. Sze, McGraw Hill, International Book Company (1984) in the chapter "Dry Etching", and particularly at pages 305, 306 and 307. This process is also known as dry etching.

In what is referred to as the dry etching method, a structured layer of photoresist has previously been situated on a layer to be shaped or on the substrate to be shaped. The problem then is to transfer the structure of the photoresist dimensionally accurately onto the layer of the insulating material or substrate lying therebelow. To accomplish this, the substrate coated in predetermined locations with the photoresist is bombarded with suitable ions, or is introduced into a plasma. Particles such as ions and neutrals chemically activated in the plasma react with the exposed layer or substrate material upon formation of a volatile compound. This reaction causes localized material erosion to occur. The localized material erosion can also be promoted by simple impact processes using atoms, ions, or molecules, also known as atomizing or sputtering.

Care must be exercised during the development of etching processes to ensure that the reactivity of the plasma, as determined by a suitable selection of the initial gases, is such that the erosion rate of the photoresist or of the material lying under the layer to be etched is as low as possible. This means that a separate etching process must be developed for each layer material. Furthermore, since extremely high reproduceability is demanded to the slightest dimensional tolerances, for example.+-.0.1 .mu.m, the processes must be constantly monitored. In particular, the end point of the etching for each layer must be precisely identified.

Spectrometric methods for characterizing the plasma have been mainly used up to now for identifying the etching end point (see S. M. Sze, VLSI Technology, McGraw Hill, International book Company (1984), page 334). To do so it is essential to find an emission line or absorption line of a molecule in the plasma that is characteristic for the respective etching process. The intensity of this line decreases rapidly when the material to be etched has been completely eliminated. For a known layer thickness, the etching rate is calculated from the time period running from the start of the etching up to the intensity decrease of the spectrometric emission or absorption line. Using this method, it is obvious that averaging occurs over the etching behavior of all wafers being etched in the system. Samples must be taken for local identification of the etching rate by, for example, identifying the extent of material erosion using a scanning electron microscope. This interrupts the etching process, however, and can even render the tested samples useless. Local characterization of the plasma is extremely difficult since the plasma itself is to greatly influenced by the required probes, for example, Langmuir probes. For further details, see the article by Clements in Journal of Vacuum Science Technology, 15 (2) March/April 1978, pages 193-198.

European Patent Application 0 146 720 discloses a measurement of a layer but for a layer format of a metallic layer.

An object of the present invention is to provide a monitoring method for identifying an end point of etching in an etching process such as occurs in a plasma for structuring electrically insulating layers for VLSI circuits, for example.

The present invention embarks on a different way of identifying the end point in dry etching processes of electrically insulating layers. The invention is characterized by a method of etching in which the end point of the material erosion is identified with the assistance of a reference substrate having a defined specimen geometry with low impedance contacts. The end point is identified by measuring the sheet resistivity R.sub.M1 of a metallically conductive film below the insulating film to be etched so that a voltage dro U.sub.M1 of a known constant I.sub.M1 applied to a metallically conductive layer at defined time intervals is measured, and the measurement is continued until an additionally injected current I.sub.inj is injected into the metallically conductive layer by the ions and electrons of the plasma to thereby modify the voltage drop U.sub.M1. Since the etching process preferably occurs in an evacuated space with an evacuable lock chamber used as an etching reactor and with a moveable substrate holder for carrying the substrates to be etched the measured data is transmitted in a non-contacting fashion by electromagnetic radiation using a pulse code modulation method. A telemetric measuring system is mounted on the moveable substrate holder as an independent unit.

The invention makes use of the perception that no electrical charges are injected into the metallically conductive layer from the plasma so long as a cohesive, dense electrically insulating layer is still situated over the metallically conductive layer. This is true since the penetration depth of the ions or electrons is about 1 monolayer, or coat, of the layer material. This means that the sheet resistivity R.sub.M1 determined by the quotient of the measured voltage drop U.sub.M1 and the constant current I.sub.M1 impressed at short time intervals of, for example, 0.1 seconds, corresponds to the true sheet resistivity R.sub.W. When the electrically insulating layer to be etched is eroded away, then the electrically charged particles from the etching plasma immediately impress an injection current I.sub.inj onto the metallically conductive layer. This superimposes the injection current I.sub.inj on the test current I.sub.M1 and falsifies the measured voltage drop U.sub.M1. The true sheet resistivity R.sub.W is then calculated according to the equation R.sub.W =U.sub.M1 /(I.sub.M1 +I.sub.inj).noteq.R.sub.M1.

This assumes that the test current I.sub.M1 is constant, which means that a sudden change in resistance unambiguously indicates complete removal of the electrically insulating layer to be etched.

The dependency of the end point of the material erosion on the size of the regions to be shaped can be monitored, for example, by providing photoresist mask regions of different sizes on the reference substrate and subsequently dry etching and electrically measuring these different size masked regions.

Identification of the local etching rate of dielectric layers also lies within the framework of the present invention. The respective thicknesses of the layer of the referenced substrate must have been previously identified in such applications.

FIG. 1 is a plan view of a reference substrate including test contacts provided for measurement according to the principles of the present invention and including a finely structured photoresist layer on an electrically insulating layer;

FIG. 2 is a cross section along line II--II of FIG. 1 showing the finely structured photoresist layer on the reference substrate;

FIG. 3 is a plan view of a reference substrate including test contacts for providing a measurement according to the principles of the present invention and including a coarsely structured photoresist layer on an electrically insulating layer;

FIG. 4 is a cross section along line IV--IV of FIG. 3 showing the coarsely structured photoresist layer on the reference substrate;

FIG. 5 is a functional block diagram of a measuring system according to the principles of the present invention and its arrangement in and relative to an etching system; and

FIG. 6 is a graph of voltage over time showing a voltage drop occuring at a defined time to indicate an end point of etching of a dielectric layer.

In FIG. 1, a reference substrate wafer includes a layer 1 of, for example, SiO.sub.2 to be etched and structured. The layer 1 to be etched is applied as can be seen in FIG. 2 to a metallically conductive layer 2 of, for example, doped silicon, metal silicide or an aluminum alloy, in a way entirely analogous to providing semiconductor crystal wafers for the manufacture of integrated circuits. The reference substrate wafer is provided with a photoresist masking 3 defining structures to be etched. The entire reference substrate wafer, or a subregion thereof, is integrated into a telemetry system and is electrically contacted at contact electrodes 4. The contact electrodes 4 are low impedance electrodes applied for the present measurement.

To identify a potential dependency of the etching rate on the size of the regions to be structured, photoresist structures of different sizes are produced on the reference substrate and are subsequently etched and electrically measured. Thus, in FIGS. 3 and 4, a more coarsely structured photoresist layer 13 is applied to a layer 11 of, for example, SiO.sub.2 to be eroded which is in turn lying over a metallically conductive layer 12. Low impedance contact electrodes 4 are applied in this embodiment, as well. When the sum of the width of the narrow exposed SiO.sub.2 layer portions 1 in FIGS. 1 and 2 is equal to the sum of the width of the broad SiO.sub.2 layer portions 11 in FIGS. 3 and 4, then a direct conclusion regarding a difference in the etching rate can be drawn for different chronological curves of the measured resistance of the electrically conductive layer 2 or 12, respectively.

Ih FIG. 5 is shown an arrangement from European Pat. No. 0 067 432, and corresponding U.S. Pat. No. 4,543,576 issued Sept. 24, 1987 which is incorporated by reference herein. In FIG. 5, a measurement system 18 includes a transmitter 27 integrated into a double palette 7 and 17 which represents an independent system. The palette 7 and 17 rotates, and the transmission of measured data from the rotating palette 7 and 17 ensues through a telemetry system. In the telemetry system, a converter 26 converts a test voltage which is measured in the layers 1 and 2 into pulse code modulation signals capable of transmission. The converter 26 is generally situated under the palette 7 and 17 and is thereby protected from bombardment by particles. The measuring apparatus 18 includes a transmitter 27 which is operated by a battery power supply 28.

When radio frequency techniques are used for the transmission of the measured data, a reception antenna 21 is applied extending into a chamber 22 and is conducted out of the chamber 22 through an insulated vacuum bushing 23. A receiver unit 29 for editing the received telemetry data is situated outside of the chamber 22. The measured data can be either in the form of digital or analog signals for interpretation. When the measured data in digital form, it is directly acceptable by a computer 30, as a digital computer, which undertakes immediate evaluation thereof and stops the etching process at the desired point in time.

Thus, in FIG. 5, the layer 1 to be eroded on a metallically conductive substrate 2 is connected to a resistance measurement unit or voltage measurement unit 25, the output of which is fed to the pulse code modulator or convertor 26 and then to the transmitter 27, all of which is powered by the power supply 28.

A simple arrow 31 in FIG. 5 identifies the vacuum connection of the chamber 22, while a double arrow 32 indicates an attached lock chamber.

In FIG. 6, the voltage vs. time graph shows a voltage drop in U.sub.M1 which occurs at a time of approximately 120 seconds into the etching period of the layer. The voltage drop U.sub.M1 indicates the end point of the etching of the dielectric layer and is a result of the injection current I.sub.inj generated by the etching plasma and reaching the metallically conductive layer. In the illustrated example, the voltage drop U.sub.M1 is from 200 mV to 140 mV, or a magnitude of negative 60 mV.

In a metrological example, the conductive layer is composed of doped polycrystalline silicon having a specific resistance rho=800 .mu.Ohm-cm and having a layer thickness of d=0.4 .mu.m. The sheet resistivity R.sub.M1 =rho/d=20 Ohms square=R.sub.W is calculated. The test current R.sub.M1 amounts to 10 mA, and the voltage U.sub.M1 =200 mV.

In the exemplary embodiment, the insulating layer is composed of a 0.8 .mu.m--thick silicon oxide layer. The etching rate of a single wafer system amounts to 0.4 .mu.m per minute from R.sub.W =U.sub.M1 /(I.sub.M1 +I.sub.inj), calculating at I.sub.inj =U.sub.M1 /R.sub.W -I.sub.M1, then I.sub.inj =-3 mA.

A constant known test current I.sub.M1 is applied to the metallically conductive layer at defined points in time for measurement. The measurement is carried out at these time intervals of, for example, between 0.01 through 1 second. In a preferred embodiment the time interval is 0.2 seconds.

In the present method, a local monitoring of the end point of the etching process can be carried out in a plasma and the dry etching process can, thus, be controlled by the etching rate with the assistance of the process control computer 30. Due to measurements directly carried out in the layer to be eroded, difficult investigations hitherto undertaken in the plasma are now eliminated. The present method is used in the manufacture of structures in dielectric layers in the submicrometer range.

Although other modifications and changes may be suggested by those skilled in the art, it is the intention of the inventor to embody within the patent warranted hereon all changes and modifications as reasonably and properly come within the scope of his contribution to the art.