Image Data Conversion System

1. Field of the Invention

The present invention relates to a system for converting image data and, more particularly, to an image data conversion system suitably adapted in a gamma conversion circuit or the like.

2. Description of the Prior Art

When gamma conversion of image data or the like is performed in a conventional system of this type, a random access memory (RAM) or a read-only memory (ROM) is used. The image data is supplied to the address input of the RAM or ROM, and desired gamma-corrected image data is obtained from data output from the RAM or ROM in accordance with a gamma conversion table stored in the RAM or ROM. When gamma conversion is performed using a RAM, a desired gamma conversion table must be written in the RAM.

However, in order to obtain a desired gamma curve, a complex combination of input devices such as a dither device is required, resulting in high cost. In addition, in order to confirm the data conversion characteristics by the prepared gamma curve, the gamma curve must be read out and analyzed, or a test pattern must be processed using the gamma curve, resulting in poor operability.

It is an object of the present invention to eliminate the conventional drawbacks as described above.

It is another object of the present invention to provide an improvement in an image data conversion system.

It is still another object of the present invention to provide an image data conversion system capable of performing desired image data conversion with a simple configuration.

It is still another object of the present invention to provide an image data conversion system which allows simple change of characteristics of image data configuration.

It is still another object of the present invention to provide an image data conversion system which allows simple confirmation of image data conversion characteristics.

It is still another object of the present invention to provide an image data conversion system capable of preparing converted data by a simple system configuration.

According to the invention, these objects are attained by providing an image data conversion system in which image data is converted (the conversion including gamma correction, masking, or the like), on the basis of conversion data formed by a means provided for that purpose. The conversion data forming means receives predetermined parameters, forms the conversion data in accordance therewith and writes the conversion data so formed in the means provided for image data conversion. In particular, it may be desirable that the conversion data forming means have a mode, e.g., a test mode, for reading out the conversion data written in the converting means regardless of the exact nature or content of the image data. The image data converting means may also include one or more tables, receiving image data as an address and outputting the stored information as conversion data. An identification signal may be input to identify the color to which image data being input, corresponds, the choice of table being determined on the basis of a received identification signal.

The above and other objects, features and advantages of the present invention will become apparent from the following description and appended claims when taken into consideration together with the accompanying drawings.

FIG. 1 is a block diagram showing the configuration of a gamma conversion circuit according to an embodiment of the present invention;

FIGS. 2 and 3 are graphs showing input parameters for gamma conversion data change;

FIGS. 4, 5 and 6 graphs showing gamma conversion data characteristics;

FIG. 7 is a flow chart for explaining the sequences of preparing a gamma conversion table and of output preparation;

FIG. 8 is a flow chart for explaining the sequence of gamma conversion table change; and

FIG. 9 is a flow chart for explaining the sequence of generating a pseudo-signal (test pattern).

FIG. 1 is a block diagram showing the configuration of a gamma conversion system according to an embodiment of the present invention. A RAM (or a group of RAMs) 1 has a 10-bit address line and an 8-bit data line. A CPU (central processing unit) 2 prepares a gamma conversion table in accordance with predetermined parameters to be described later and controls the switching operation between the address and data lines. A nonvolatile ROM 3 provides parameters or data for initializing the RAM 1. Input devices 4 and 5 generate parameters for changing the gamma conversion data prepared in the RAM 1. A first data selector 6 selects image data in accordance with an identification signal and supplies an address sent from the CPU 2 to the address input of the RAM 1. A third data selector 7 switches the control line (address line). A second data selector 8 switches between the gamma conversion data from the CPU 2 and output image data from the RAM 1. A 10-bit address line or data line 9 is connected to the address input of the RAM 1. An 8-bit address line or data line 10 connects the first data selector 6 with the RAM 1 and uses the lower 8 bits of the address line 9. A 2-bit address line or control line 11 is connected to the third data selector 7 and uses the upper 2 bits of the address line 9. An 8-bit data line 12 is connected to the data input of the RAM 1. An 8-bit output data line 13 is connected to the output of the second data selector 8. Four input data lines 14 to 17 correspond to, for example, yellow (Y), magneta (M), cyan (C) and black (K) signals. A 10-bit address bus 18 has the lower 8 bits as an address bus 19 and the upper 2 bits as an address bus 20. A data control line 21 selects one of the input data lines 14 to 17 through the first data selector 6, and is connected to the address line 11 through the third data selector 7. A data bus 22 of the CPU 2 is connected to the second data selector 8. The contents of the ROM 3 can be 1 Kbyte data (gamma conversion data) for initializing the RAM 1 or 8 parameters for preparing 1 Kbyte gamma conversion data (two parameters corresponding to each of the input data lines 14 to 17 for determining the gamma curve of each color).

As will be described later, the CPU 2 prepares gamma conversion data for each color using these parameters, and stores the obtained data in predetermined areas of the RAM 1.

The mode of operation of the system of this embodiments will be described below.

When power is turned on, the CPU 2 initializes peripheral equipment (not shown) by a normal means in accordance with a program. The CPU 2 then receives a first set of parameters ay and by from the ROM 3. The first set parameters ay and by correspond to the input data line 14 (yellow). The CPU 2 controls the first data selector 6 to connect the address bus 19 with the address line 10, and controls the third data selector 7 to connect the address bus 20 with the address line 11 and to connect the address bus 18 of the CPU 2 with the address input of the RAM 1. The CPU 2 then controls the second data selector 8 to connect the data bus 22 with the data input of the RAM 1 through the data line 12. The CPU 2 sets an address "0" on the address line 11 and the address bus 22 constituted by the upper 2 bits of the 10-bit address bus 18, thereby sequentially changing the address of the address line 19 and hence the address line 10 from 0 to 255. At the same time, the CPU 2 transmits onto the data bus 22 and hence onto the data line 12 the gamma conversion data for yellow corresponding to the gamma conversion curve calculated by the CPU 2 from the first set of parameters ay and by by a method to be described later. The data on the data line 12 is written in the lower 256-byte area of the RAM 1 by a known method.

Subsequently, the CPU 2 receives a second set of parameters am and bm from the ROM 3 so as to prepare gamma conversion data for magenta. The CPU 2 sets an address "1" on the address line 20 and the address line 11. The CPU 2 writes gamma conversion data obtained from the second set of parameters in the next 256-byte area of the RAM 1. The CPU 2 receives a third set of parameters ac and bc from the ROM 3, and prepares gamma conversion data for cyan. The CPU 2 sets an address of "2" on the address line 20 and the address line 11, and similarly writes gamma coversion data obtained from the third set of parameters in the next 256-byte area of the RAM 1. The CPU 2 receives a fourth set of parameters ak and bk from the ROM 3 and prepares gamma conversion data for black. The CPU 2 sets an address of "3" on the address line 20 and the address line 11, and similarly writes gamma conversion data obtained from the fourth set of parameters in the next 256-byte area of the RAM 1. The CPU 2 then sets the third data selector 7 to connect the control line 21 with the control line 11, and switches the second data selector 8 to connect the data line 12 with the output data line 13. Then, the RAM 1 is disconnected from the CPU 2, and transmits onto the output data line 13 the gamma conversion data corresponding to the address of the RAM 1 which is determined by the input image data signals Y, M, C and K from the input data lines 14 to 17, and the identification signal from the control line 21. In this manner, the first data selector 6 selects one of the input data lines 14 to 17, and becomes the upper part of the address information (the upper 2 bits) of the RAM 1 so as to select one of the gamma conversion tables (aggregates of gamma conversion data) written in the RAM 1 in accordance with the identification signal. Therefore, when the identification signal supplied onto the control line 21 is, for example, "1", the input data line 15 (image data signal M) is connected to the data line 10, and the image data signal M is "0 to 255" practically becomes "256 to 511 " on the data line 9. Thus, the image data signal M is data-converted by the second gamma conversion table stored in the RAM 1 and is transmitted onto the output data line 13.

However, gamma conversion of all the input signals to the input data lines 14 to 17 may not always provide an optimum result. For example, the input devices 4 and 5 are used when the third gamma conversion table stored in the addresses 512 to 767 in the RAM 1 corresponding to cyan (C) image is to be changed. The input devices 4 and 5 are used to generate predetermined parameters to prepare a new gamma curve (gamma conversion table). When, for example, a table change command is supplied to the CPU 2 and a new set of parameters ac' and bc' for rewriting data at addresses 512 to 767 in the RAM 1 corresponding to the cyan image are supplied to the CPU 2 from the input devices 4 and 5, the CPU 2 controles the data selectors 6 to 8 so as to connect the address bus 19 with the data line 10, the address bus 20 with the control line 11, and the data bus 22 with the data line 12. Then, the CPU 2 sets address data on the address bus 20 at "2" so as to sequentially change the address of the address bus 19 from 0 to 255 and to provide the address data on the data line 9 to the address input of the RAM 1 as 512 to 767. At the same time, the CPU 2 calculates new gamma conversion data in accordance with the parameters ac' and bc' supplied from the input devices 4 and 5, and sequentially writes the data at designated addresses of the RAM 1. When this write operation is completed, the data selector 7 connects the control line 21 with the control line 11 and the data selector 8 connects the data line 12 with the output data line 13. The control lines such as the chip enable line or read/write line of the RAM 1, the chip enable line, the address line and the lead line of the ROM 3, and the address lines and interrupt lines of the input devices 4 and 5 are connected in a known manner and connections of these lines are not particularly illustrated in this embodiment.

The change operation of the gamma conversion table will be described below.

As described above, in this embodiment, two parameters are required to change a gamma conversion table of one color, and the two parameters are generated by the ROM 3 or the input devices 4 and 5.

When given parameters ai and bi (FIGS. 2 and 3) are supplied from the input devices 4 and 5, the following equation is determined:

where Xi is image data supplied to the RAM 1 as an address and satisfies 0.ltoreq.Xi.ltoreq.255.

Subsequently, the CPU 2 calculates gamma conversion data Table(d) Table (d)=0-255) by the following equation (2) using Yi calculated by equation (1): ##EQU1## where

FIG. 4 shows an example when gamma conversion data 0 to 255 for parameters a=2 and b=63 are calculated by equations (1) and (2). Note that n=9 in equation (2) in this case.

FIGS. 5 and 6 show gamma curves calculated in a similar manner, wherein solid lines represent Yi, broken lines represent Table(d), the axis of abscissa represents the table number (input image data Xi) 0 to 255, and the axis of ordinate represents the gamma conversion value.

Table 1 below shows the respective values when a=2, b=63 and n=9 and 0.ltoreq.Xi.ltoreq.255.

A method of outputting the contents (Table(d)) of the gamma conversion table stored in the RAM 1 in the test mode will be described.

The CPU 2 controls the first and third data selectors 6 and 7 so as to connect the address bus 18 with the address input of the RAM 1. The CPU 2 then controls the second data selector 8 to connect the data line 12 of the RAM 1 with the output data line 13. Thereafter, in a known manner, the CPU 2 transmits all the address data 0 to 1023 onto the address bus 18. At this time, all the contents of the RAM 1 are transmitted onto the output data line 13.

When the obtained image data is subjected to processing such as dither processing and printed out by a dot printer or the like, the contents of the RAM 1 can be easily confirmed.

Preparation and output preparation of the gamma conversion table will be described with reference to the flow chart shown in FIG. 7.

The flow chart in FIG. 7 and those shown in FIGS. 8 and 9, to be described later, are stored as programs in a ROM (not shown) connected to the CPU 2.

S1 to S16 in FIG. 7 respectively represent steps in the sequence.

First, the CPU 2 controls the first data selector 6 to connect the address line 19 with the data line 10 (S1). The CPU 2 controls the data selector 7 to connect the address bus 20 (2 bits) and the address line 11 (2 bits) (S2). The CPU 2 controls the second data selector 8 to connect the data bus 22 with the data line 12 (S3). Then, the CPU 2 transmits an address "0" onto the address bus 20 (S4). The CPU 2 checks if one of "0" to "3" is supplied on the address bus 20 (S5). Since the answer is YES in this case, the CPU 2 receives the set of parameters ay and by from the ROM 3 (S6), and transmits an address "0" onto the address bus 19 (S7). The CPU 2 checks if the address on the address bus 19 is "256" (S8). When NO is the answer in step S8, the CPU 2 calculates the gamma conversion data 0 to 255 (S9), and transmits the gamma conversion data 0 to 255 onto the data bus 22 (S10). The gamma conversion data 0 to 255 is supplied to the data input of the RAM 1 through the data line 12 (S11). The address of the address bus 19 is incremented by "1", and the flow returns to step S8 (S12). However, when the answer YES occurs in step S8, the address of the address bus 20 is incremented by "1", and the flow returns to step S5 (S13). When NO occurs in step S5, the CPU 2 determines that the gamma conversion table has been completely prepared and shifts to the output preparation of the gamma conversion data. First, the first data selector 6 is controlled by the control line 21 (S14). The CPU 2 switches the third data selector 7 to connect the control line 21 with the address line 11 (S15). The CPU 2 switches the second data selector 8 to connect the data like 12 with the output data line 13 (S16), thereby completing output preparation.

As a result, the RAM 1 functions to perform conversion of image data input through the first data selector 6 and operates independently of the CPU 2.

The change operation of the gamma conversion table will be described with reference to FIG. 8. S21 to S31 represent the respective steps of the sequence. The change operation of the gamma conversion table is executed by the CPU 2 in response to a table change command supplied through a density lever (not shown) or the like.

First, the CPU 2 controls the first data selector 6 to connect the address line 19 with the data line 10 (S21), and controls the third data selector 7 to connect the address bus 20 with the address line 11 (S22). The CPU 2 similarly controls the second data selector 8 to connect the data bus 22 with the data line 12 (S23). The CPU 2 then receives parameters, e.g., ac' to bc' for preparing a new gamma conversion curve from the input devices 4 and 5 (S24). The CPU 2 sets the address on the address bus 20 at "2" (S25), and transmits an address "0" onto the address bus 19 (S26). The CPU 2 checks if the address on the address bus 19 is "256" (S27). When NO occurs in step S27, the CPU 2 calculates the gamma conversion data in accordance with the parameters ac' and bc' received in step S24 (S28), and transmits gamma conversion data "0 to 255" onto the data bus 22 (S29). The CPU 2 writes the gamma conversion data calculated in step 28 at addresses 512 to 767 in the RAM 1 (S30). The address on the address bus 19 is incremented by "1", and the flow returns to step S27 (S31). When YES occurs in step S27, the change operation is completed.

Generation of a pseudo-signal (test mode) will be described with reference to the flow chart shown in FIG. 9. Note that S41 to S47 represent steps of the sequence.

First, the CPU 2 controls the first data selector 6 to connect the address bus 19 with the data line 10 (S41), and similarly controls the third data selector 7 to connect the address bus 20 with the control line 11 (S42). The CPU 2 further controls the second data selector 8 to connect the data line 12 with the output data line 13 (S43). The CPU 2 transmits an address "0" onto the address bus 18 to prepare for output of a pseudo signal (S44). The CPU 2 checks if the address on the address bus 18 is "1024" (S45). If the answer is NO in step S45, the CPU 2 sequentially transmits gamma conversion data "0 to 1024" stored in the RAM 1 onto the output data line 13 through the data line 12 (S46). The address of the address bus 18 is incremented by "1", and the flow returns to step S45 (S47). Steps S45 to S47 are repreated to output a pseudo signal (gamma conversion data) from the RAM 1 as if image data is produced therefrom. Meanwhile, when YES occurs in step S45, the sequence of generating a pseudo signal is completed.

In this embodiment, a ROM is used as a unit for generating respective parrameters. However, a battery back-up RAM, a core memory, a magnetic disk or the like may be used instead. When the device 3 for generating parameters is a rewritable volatile memory, desired parameters can be stored in accordance with a command from the CPU 2 in addition to parameters for initialization.

The image data conversion system as described above can be applied to a facsimile system, a digital copying machine or the like. When the system is applied to a digital copying machine, an output from a density layer is supplied to the CPU 2 and the gamma conversion table can be rewritten in accordance with the set density.

The identification signal described above is transmitted together with the image data. When the image data conversion system of the present invention is used for a color digital copying machine, the identification signal is generated in synchronism with scanning for each color by the scanner. The identification signal can be generated in accordance with the switching operation of the filter.

The image data conversion system of the present invention is not limited to a gamma conversion circuit and can be applied to other data conversion systems, e.g., a masking circuit.

The present invention is not limited to the particular embodiment described above, and various other changes and modifications can be made within the spirit and scope of the present invention.