Method and a Unit for Synchronizing Burglary Detectors

The invention relates to a method of synchronizing each of a number of systems for detecting passage of an article through a predetermined area, each system comprising a transmitter and a receiver alternately transmitting and receiving electro-magnetic signals as well as a marker secured to the article for receiving said signals and transmitting other signals during the passage of the article through the area, and a unit therefor.

International patent application No. 84/04191 and international patent application No. 83/03203 deal with burglary alarms to be situated in several different stores. When these stores are situated close to one another, it is of importance that the systems are synchronized in such a manner that one system is not transmitting simultaneously with the receiving of another system. It is known to avoid this by synchronizing the systems with a cable connection between the systems, in which case one of the systems operates as a master while the remaining systems operate as "slaves".

Interest has arisen in avoiding these cable connections and, according to the invention, has been achieved by synchronizing a system directly from the conductors of the power mains thereto. In this manner, such systems need not be otherwise, e.g. cable, interconnected, due to the employment of the existing conductors of the mains.

It turns out, however, that synchronizing to the mains network causes some technical problems. A unit for mains synchronizing a system detecting a passage of an article through a predetermined area, wherein the system comprises a transmitter and a receiver alternately transmitting and receiving electro-magnetic signals, a marker secured to the article which receives said transmitted signals and transmits other signals during the passage of the article through the area, and a galvanic separation of the transmitter and receiver from the mains in the form of a transformer, is therefore characterized, according to the invention, by synchronizing the secondary side of the transformer from the primary side thereof, and by providing an additional galvanic separation in the synchronizing unit. In this manner, the desired synchronizing is obtained and the galvanic separation is maintained.

The synchronizing may for instance be carried out by means of a comparator detecting zero crossings on the primary side. The additional galvanic separation may for instance be an opto-coupler.

The invention will be described in more detail below with reference to the accompanying drawing, in which

FIG. 1 schematically illustrates a unit for synchronizing a system to the mains, and

FIG. 2 schematically illustrates the system.

According to the invention, a burglary-alarm system is synchronized to the mains thereto. In this manner, other interconnection between such systems is avoided. It is not easy to provide such synchronization, however, because the mains have a short periodic time of, for example, 20 msec. at 50 Hz while the pulse width for each synchronizing detection should be about 2 msec. The synchronizing must therefore occur with an accuracy of about 2/3 msec. A galvanicseparation transformer at T1 (FIG. 1) is between the mains and the burglary alarm system (FIG. 2). Such a transformer T1 distorts the power wave from its mains (220VAC)-connected primary (winding) 1 in its secondary (winding) to such a degree that synchronization based on the zero crossing of the power wave in the secondary is, therefore, impossible. This technical problem is solved, according to the invention, by synchronizing the secondary voltage relative to the primary voltage, i.e. the voltage of the mains. In doing this, however, the galvanic separation originally provided by the transformer at T1 is lost and an additional galvanic separation is therefore introduced into the synchronizing unit of the invention.

The synchronizing of the synchronizing unit is carried out by a comparator in the form of an operational amplifier U101 having at least one input 3 communicating with the voltage of the mains by connection thereto, in this case through a resistor R1. The additional galvanic separation is established by an opto-coupler 4 comprising a light diode 5 connected to the output of the operational amplifier U101.

Energy for the system (FIG. 2) and remainder of the synchronizing unit (FIG. 2) is provided from the secondary winding 2 of the transformer T1 (FIG. 1).

More specifically, the primary voltage of the transformer T1, i.e. the voltage of the mains, is rectified by diode CR 101, CR 102 and transferred to the comparator U101 operating as a zero crossing detector for the voltage of the mains. The rectified voltage is smoothed by electrolytic capacitors C101 and C102 and a parallel capacitor C103 short-circuits possible HF-signals and transients. A shock absorber comprising two oppositely-coupled zener diodes CR 103, CR 104 protects the input of the comparator U101 against too high voltages. The comparator U101 therefore delivers a pulsating voltage at the mains frequency, in this case, 50 Hz. This pulsating voltage is transmitted to the primary side of the opto-coupler 4 through an RC integration circuit at 105. The opto-coupler 4 delivers a corresponding, 50 Hz signal at terminal 6, and this signal is transmitted to the base of a transistor Q201 through a voltage divider R201, R202. The collector of the transistor is connected to a parallel coupling of a resistor R205 and a capacitor C202. When terminal 6 of the opto-coupler 4 is positive and exceeds a voltage of about 0.6V, the transistor Q201 becomes conductive and a signal is transmitted through R205, C202 to terminal P4 of a connector P having terminals P1 to P6. The resulting pulses at terminal P4 are used as synchronizing pulses for the control of the burglary alarm.

As shown in FIG. 2, voltage regulators U1 and U2 producing 24V and 8V, respectively, are provided in connection with the separate secondary winding 2 of the transformer at T1 via terminals P1, P2. Via an integration circuit C3, R5, the synchronizing pulses are transmitted to a latch comprising two NOR-gates 30, 40. The positive pulses are transmitted to terminal 13 of the lower NOR-gate 30. A signal is only transmitted from this NOR-gate 30 at the presence of zero value at the upper NOR-gate 40, and such value is present when a cyclic counter 4020 connected thereto has been zeroed. The positive pulse on terminal 13 makes the output 11 of the lower NOR-gate 30 negative, and this negative pulse activates the entire system as the counter 4020 leaves zero. For this, the counter counts the pulses from a crystal-controlled oscillator 16 oscillating at a frequency of 2.125 MHz.

The negative pulse from the output 11 of NOR-gate 30 is transmitted to terminal 9 of NOR-gate 7. Nothing happens in NOR-gate until this pulse leaves terminal 9, but the counting in counter 4020 continues to cause it to discontinue the pulse and, thereafter, a signal from output Q1 of the counter 4020 provides a control pulse to an HF-transmitter Q4. The transmitter Q4 then produces an HF signal from a frame aerial 8 for a marker on an article, if in the area of the HF signal from the antenna, i.e. being burgled, the marker being known and, therefore, not shown. If the marker receives the HF signal, it transmits another signal for a receiver and a sample/hold circuit in the system (FIG. 2). Because the output Q9 of the counter 4020 NOR-gate 7 is now high, a negative pulse of 1.88 .mu.sec. is produced and this pulse grounds the frame aerial 8 for a short period which opens the receiver. After 15 microseconds, other outputs of the counter 4020 provide a signal to open a sample circuit at FET Q13, which opens a noise sample circuit at FET P12. An AGC-adjustment is provided in connection with the noise sample circuit. The signal from the noise sample circuit at Q12 is fed to a comparator U6'. The output of the comparator U6' is transferred to the inverting input terminal of another comparator U7 in order to be compared with the signal sampling from the sample circuit. When the signal sampling exceeds the noise sampling from the noise sampling circuit at FET Q12, a trigger pulse is transmitted to a second cycling counter U8 (in the lower right corner of FIG. 2) through a terminal x. If sixteen such pulses follow, i.e., if the signal sampling exceeds the noise sampling for a further sixteen periods (about 320 msec.), the alarm is activated.

The counter 4020, thus determines when the frame aerial 8 is transmitting or receiving and when a signal sampling and noise sampling is to be carried out, the latter by transistors Q14, Q15, every 1.92 .mu.sec. as determined by the crystal 16. Consequently, the crystal 16 determines when the entire system is to be closed. As the time interval is approx. 2 msec. it does not matter how the three mains phases are situated relative to one another. Furthermore it does not matter whether the mains frequency is 50 or 60 Hz.