Current-Type Converter Protecting Apparatus

The present invention relates to a current-type converter protecting apparatus and particularly to an apparatus suitable for protecting a current-type converter from occurrence of an overvoltage due to employment of self-extinction elements in the converter.

Generally, as a system for converting AC power into DC, there have been used voltage-type converters and current-type converters.

Recently, various trials have been carried out for improving a power factor or the like by using self-extinction elements in such converters. For example, a voltage-type converter employing self-extinction elements has been proposed in U.S. Pat. No. 4,361,866, etc.

On the other hand, various current-type converters employing self-extinction elements have been proposed. In such current-type converters, however, there is a problem that an overvoltage is caused when a current is cut off. Protection of a current-type converter from such an overvoltage is discussed in a paper by Yoshioka et al, "PWM GTO CONVERTER OF NEW COMMUTATION ENERGY SYSTEM" (The Institute of Electrical Engineers of Japan, Semiconductor Power Conversion Society, Material SPC-84-60). In this paper, insufficient consideration has been made into a point of how to protect main circuit elements of the current-type converter from an overvoltage caused across a DC reactor provided at the output side of the converter, when an erroneous turn-off pulse is mixed at any point in time into a gate signal due to noises or the like. This is because the protecting apparatus disclosed in the above paper is for overvoltage suppresion and energy feeding back in commutation of the main circuit current and it cannot cope with an overvoltage caused in any point in time, so that the period in which an overvoltage can be suppressed is limited to the time of commutation. Further, in the conventional converter protecting apparatus, there has been another problem that the arrangement of the protecting apparatus is complicated because a diode bridge, capacitors, self-extinction elements are used.

It is an object of the present invention is to provide an apparatus for protecting a current-type converter using self-extinction elements and being provided with a DC reactor connected thereto for suppressing pulsation in a DC output of the converter.

The converter protecting apparatus according to the present invention is featured in that an overvoltage due to the DC reactor is detected to thereby control the self-extinction elements constituting the current-type converter to form a closed circuit including the DC reactor to thereby suppress the overvoltage.

Furthermore, according to the present invention, protection is made in accordance with the characteristics of the self-extinction elements that are used, a countermeasure is provided for enabling the converter to be operated continuously after occurrence of an overvoltage, and so on.

These and other objects and features of the present invention will become more apparent from following description about preferred embodiments of the invention when read in conjuction with the accompanying drawings.

FIG. 1 is a circuit diagram showing a first embodiment of the current-type converter protecting apparatus according to the present invention;

FIG. 2 is a circuit diagram showing the pulse selecting circuit in the first embodiment of FIG. 1;

FIG. 3 is a time chart for explaining the operation of the first embodiment of FIG. 1;

FIG. 4 is a circuit diagram showing a second embodiment of the current-type converter protecting apparatus according to the present invention;

FIG. 5 is a circuit diagram showing the pulse selecting circuit in the second embodiment of FIG. 4;

FIG. 6 is a time chart for explaining an example of the operation of the embodiment of FIG. 4;

FIG. 7 is a time chart for explaining another example of the operation of the embodiment of FIG. 4;

FIG. 8 is a time chart for explaining a further example of the operation of the embodiment of FIG. 4; and

FIG. 9 is a circuit diagram showing a third embodiment of the current-type converter protecting apparatus according to the present invention.

Referring to the drawings, the invention will be described more in detail hereunder with respect to various embodiments thereof.

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. In FIG. 1, the circuit arrangement includes an AC power source 1, input end capacitors 2, a gate circuit 3, a pulse selecting circuit 4, a pulse width modulation (hereinafter abbreviated to PWM) control circuit 5, a comparator circuit 6, a DC potential transformer (hereinafter abbreviated to DCPT) 7, a load 8, and gate turn-off silicon controlled rectifiers (hereinafter abbreviated to GTOs) 11-16 which are a kind of self-extinction elements. As shown in the drawing, the GTOs 11-16 constitute a converter unit in the form of a bridge circuit and the AC power source 1 is connected to the input side of the converter unit. The input end capacitors 2 are connected to the conductors between the AC power source 1 and the converter unit. The load 8 is connected to the output side of the converter unit through a DC reactor DCL. Under the condition, the DCPT 7 detects a voltage e'.sub.DCL across the DC reactor DCL to produce an output signal e.sub.DCL. The comparator circuit 6 compares the output signal e.sub.DCL with a predetermined overvoltage setting value e.sub.OV so as to produce an output signal P.sub.OV only when the signal e.sub.DCL is larger than the overvoltage setting value e.sub.OV, the signal P.sub.OV being applied to the pulse selecting circuit 4. The converter unit constituted by the bridge circuit of the GTOs 11-16 is controlled by the PWM control circuit 5, the pulse selecting circuit 4, and the gate circuit 3.

FIG. 2 is a circuit diagram showing a specific arrangement of the pulse selecting circuit 4 shown in FIG. 1. As shown in the drawing, the pulse selecting circuit is constituted by six OR circuits 41-46. The output signal P.sub.OV is applied to one input of each of the OR circuits 41-46, and gate signal patterns P.sub.U -P.sub.Z are applied from the PWM control circuit 5 to the respective other inputs of the OR circuits 41-46. The OR circuits 41-46 respectively produce output signals P.sub.GU -P.sub.GZ which are applied to the gate circuit 3.

FIG. 3 is a time chart for explaining the operation of the PWM control circuit 5 and the pulse selecting circuit 4 shown in FIG. 1. In FIG. 3, V.sub.U, V.sub.V, and V.sub.W represent respective phase voltages of the AC power source 1, and e.sub.c and e.sub.m represent respectively a carrier wave and a modulating wave for forming a PWM basic pattern PTN. PTN represents an inverted signal of the PWM basic pattern PTN. An unequal-period triangular wave e'.sub.m is synchronized with the rising and falling of the PWM basic pattern PTN and is compared, as shown in the drawing, with a DC voltage command value e.sub.d * applied to the PWM control circuit 5, so as to obtain a shoot-through pulse S. D.sub.1 -D.sub.6 represent distribution signals and P.sub.F and P.sub.R represent PWM patterns having a period of 60 degrees for actually forming gate signals. The PWM patterns P.sub.F and P.sub.R and the shoot-through pulse S are distributed to the respective phases in accordance with the distribution signals D.sub.1 -D.sub.6 to thereby obtain the gate signal patterns P.sub.U -P.sub.Z which are applied to the pulse selecting circuit 4 as shown in FIGS. 1 and 2. In the pulse selecting circuit 4 shown in FIG. 2, the gate signal patterns P.sub.U -P.sub.Z are ORed with the output signal P.sub.OV of the comparator circuit 6 through the OR circuits 41-46 to thereby form the gate circuit input signals P.sub.GU -P.sub.GZ. Such a technique to form the gate signal patterns P.sub.U -P.sub.Z as described above is well known conventionally.

Assume now that, for example, an erroneous turn-off pulse is mixed into the gate signal pattern P.sub.U to thereby turn the GTO 11 off at the point in time .circle.1 in FIG. 3. At the point in time .circle.1 , therefore, only the GTO 15 is in the on-state among all the GTOs constituting the converter unit. Accordingly, the circuit including the load 8 is opened and the voltage e'.sub.DCL as shown in the following equation is generated across the DC reactor DCL due to the energy which has been stored in the DC reactor DCL. ##EQU1## where LD represents the inductance of the DC reactor DCL and i.sub.D represents a DC current.

Generally, the inductance value of the DC reactor used in the current-type converter is large, for example, several tens mH, so that the voltage e'.sub.DCL generated across the DC reactor in accordance with the above equation is very large. The output signal e.sub.DCL of the DCPT 7 proportional to the DC reactor terminal voltage e'.sub.DCL is compared with the overvoltage setting value e.sub.OV in the comparator circuit 6, so that the output signal P.sub.OV of the comparator circuit 6 is made high ("H") when e.sub.DCL .gtoreq.e.sub.OV while made low ("L") when e.sub.DCL <e.sub.OV. When the output signal P.sub.OV is "H", all the respective outputs of the OR circuits 41-46, that is, all the gate circuit input signals P.sub.GU -P.sub.GZ become "H". Accordingly, all the GTOs 11-16 are fed with on-gate signals so that the DC circuit becomes a shoot-through state to thereby suppress the overvoltage which has been so far generated across the DC reactor.

As described above, in the first embodiment illustrated in FIG. 1, the terminal voltage of the DC reactor DCL is detected by means of the DCPT 7 and compared with the overvoltage setting value in the comparator circuit 6 so as to make it possible to select pulses in the pulse selecting circuit 4, so that in case of occurrence of an overvoltage, the overvoltage can be suppressed by applying a turn-on signal to all the self-extinction elements GTOs 11-16 to thereby shoot-through the DC circuit. Accordingly, it is possible to protect the converter by means of a very simple arrangement and to carry out continuous operation of the converter.

FIG. 4 shows a second embodiment of the present invention and in FIG. 4 the same parts as those in FIG. 1 are correspondingly referenced. The second embodiment is characterized by the fact in that in addition to the gate signal patterns P.sub.U -P.sub.Z from the PWM control circuit 5 and the output signal P.sub.OV from the comparator circuit 6, auxiliary signals P'.sub.U -P'.sub.Z obtained from the PWM control circuit 5 are applied to the pulse selecting circuit 4. FIG. 5 shows a specific example of the pulse selecting circuit 4 shown in FIG. 4. In FIG. 5, the pulse selecting circuit 4 is constituted by OR circuits 41-46 and AND circuits 47-58. In the pulse selecting circuit 4 shown in FIG. 5, the gate signal patterns P.sub.U -P.sub.Z are selected so as to be the input signals P.sub.GU -P.sub.GZ to the gate circuit 3 when the output P.sub.OV of the comparator circuit 6 is "L", while the auxiliary signals P'.sub.U -P'.sub.Z are selected so as to be the input signals P.sub.GU -P.sub.GZ to the gate circuit 3 when the output P.sub.OV of the comparator circuit 6 is "H".

FIG. 6 is a time chart for explaining an operation of the second embodiment of FIG. 4. In FIG. 6, the process of the production of the gate signal patterns P.sub.U -P.sub.Z is the same as that in the foregoing first embodiment. The auxiliary signals P'.sub.U -P'.sub.Z are produced in the following manner. For example, the auxiliary signal P'.sub.U is set to be a signal which is "H" in the period where the instantaneous voltage v.sub.U of the U phase of the AC power source is higher than the instantaneous voltages of any other phases, and similarly to this, the auxiliary signals P'.sub.V and P'.sub.W are set respectively corresponding to the instantaneous voltages v.sub.V and v.sub.W. On the contray, the auxiliary signal P'.sub.X is set to be a signal which is "H" in the period where the instantaneous voltage v.sub.U of the U phase of the AC power source is lower than the instantaneous voltages of any other phases, and similarly to this, the auxiliary signals P'.sub.Y and P'.sub.Z are set respectively corresponding to the instantaneous voltages v.sub.V and v.sub.W. Those auxiliary signals P'.sub.U -P'.sub.Z act to turn on the self-extinction element of the phase having the highest instantaneous source voltage among those self-extinction elements of the positive polarity arms of the bridge circuit of the converter unit, while acting to turn on the self-extinction element of the phase having the lowest instantaneous source voltage among those self-extinction elements of the negative polarity arms of the bridge circuit of the same converter unit. When an erroneous turn-off pulse is mixed into any one of the PWM patterns P.sub.U -P.sub.Z, the gate circuit input signals P.sub.GU -P.sub.GZ are switched over to the auxiliary signals P'.sub.U -P'.sub.Z by the pulse selecting circuit 4 so that the respective self-extinction elements of the phases having the highest and lowest instantaneous phase voltages are turned off at this point in time. Accordingly, a closed circuit from the AC power source 1 to the same through the self-extinction elements in the on-state, the DC reactor DCL, and the load 8 so as to increase the current flowing into the load 8 is formed so that an overvoltage generated at the DC reactor DCL can be suppressed. Specifically, the second embodiment is suitable to a converter employing self-extinction elements having a small withstand voltage in comparison with the current capacity thereof because the two self-extinction elements having the largest potential difference therebetween are turned on so that the overvoltage can be suppressed while the load current is increased.

As described above, according to the second embodiment of the present invention, the auxiliary pulse signals are selected by means of the pulse selecting circuit 4 so as to suppress an overvoltage at the DC reactor DCL so that it is possible to achieve proper protection of the converter in accordance with the instantaneous values of the source phase voltage and it is possible to carry out continuous operation of the converter.

Although the auxiliary signals P'.sub.U -P'.sub.Z are arranged such that a turn-on signal is applied to the self-extinction element having the highest instantaneous source voltage among the self-extinction elements in the positive polarity arms of the converter unit and to the self-extinction element having the lowest instantaneous source voltage among the self-extinction elements in the negative polarity arms of the converter unit in the foregoing second embodiment, the auxiliary signals may be arranged such that a turn-on signal is applied to the self-extinction element having the lowest instantaneous source voltage among the self-extinction elements in the positive polarity arms and to the self-extinction element having the highest instantaneous source voltage among the self-extinction elements in the negative polarity arms. The operation in this modification is shown in the time chart of FIG. 7. In this modification, a closed circuit is formed such that a decreased load current flows from the AC power source through the turned-on self-extinction elements in the converter unit so that an overvoltage at the DC reactor DCL can be suppressed. Accordingly, on the contrary to the embodiment of FIG. 6, this modification is suitable to a current-type converter which employs self-extinction elements having a small current capacity in comparison with the withstand voltage thereof.

FIG. 8 is a time chart showing the operation of another modification of the second embodiment illustrated in FIGS. 4 and 5, in which auxiliary signals P'.sub.U -P'.sub.Z different in form from those used in the second embodiment are employed. In FIG. 8, the auxiliary signals P'.sub.U -P'.sub.Z can be formed in the following manner. That is, the PWM basic pattern PTN is distributed in accordance with the distribution signals D.sub.1 -D.sub.8 to thereby obtain the auxiliary signals P'.sub.U -P'.sub.Z. In this case, the shoot-through pulse is not distributed. In the period I, for example, the signals P'.sub.U and P'.sub.W have respective patterns logically inverted from each other. In case where an erroneous turn-off signal is mixed into any one of the gate signal patterns P.sub.U -P.sub.Z, the gate circuit input signals P.sub.GU -P.sub.GZ are switched over to the auxiliary signals P'.sub.U -P'.sub.Z by the pulse selecting circuit 4 so that the converter is operated with the patterns P'.sub.U -P'.sub.Z in the state where the width of the shoot-through pulse is zero. Accordingly, a current flows from the AC power source 1 into the load 8 through the turned-on self-extinction elements in the two arms so that an overvoltage at the DC reactor can be suppressed.

As described above according to the modification of FIG. 8, the auxiliary signals P'.sub.U -P'.sub.Z are selected by the pulse selecting circuit 4 so that an overvoltage at the DC reactor can be suppressed. At this time the PWM control is also carried out so that the protection and continuous operation of the converter can be carried out without disturbing the power source current waveform.

FIG. 9 shows a circuit arrangement of a third embodiment of the present invention. Although the self-extinction elements GTOs 11-16 are employed as elements constituting the main circuit of the converter in the first and second embodiments, switching elements SW.sub.U -SW.sub.Z having the following characteristics are employed as the constituent elements 11'-16' of the main circuit in this third embodiment.

(1) The on/off state of each of the switching elements can be controlled by a gate signal; and

(2) Each of the switching elements has a Zener breakdown property, the Zener voltage being changeable.

In the case where the DC circuit of the converter is opened by an erroneous turn-off pulse to generate an overvoltage at the DC reactor so that the overvoltage is applied to the main circuit constituent elements, Zener breakdown is caused in the elements owing to the foregoing characteristic (2) so as to make the elements conductive to form a closed current circuit including the DC reactor so that the overvoltage generated at the DC reactor can be suppressed.

Such a switching element having the foregoing characteristics (1) and (2) may be constituted by a GTO and varisters or Zener diodes connected to the GTO in parallel thereto in the forward and backward directions as shown by a reference numeral 13' representatively.

Thus, the elements can be protected without providing any protecting device for the suppression of an overvoltage, so that the main circuit and the control circuit can be made extremely simple in arrangement. Further, an overvoltage has been suppressed, the elements return to their normal operating state from Zener breakdown so that the converter can be continuously operated.

Thus, according to the present invention, in case of generation of an overvoltage at the DCL, the overvoltage is detected by means of the DCPT and the gate signals are controlled by the pulse selecting circuit, so that the converter can be protected from the overvoltage and the operation of the converter can be continuously carried out when the overvoltage has been suppressed.