Power Active Filter Employing Positive Sequence Filtering

This invention relates to electronic circuitry and more particularly to power filters which are used to improve the waveform quality in multiple phase power systems.

Some AC power supply applications require high quality sine wave outputs. For example, in aircraft electrical systems, specifications call for a 4% maximum total harmonic distortion, a 4% maximum voltage imbalance for a 2/3 per unit load unbalance, and a 0.9% maximum modulation. These requirements can be difficult to meet due to the high source impedances of typical aircraft generators and other characteristics of these sources.

Active power filters have been designed for insertion between such electrical power sources and a load to generate a synthetic ripple which opposes and effectively eliminates an electrical ripple generated by the power sources. One such active power filter is disclosed in U.S. Pat. No. 3,825,815, issued July 23, 1974 to Gyugyi et al.

Typical power active filters operate with separate reference waveforms for individual phases. Those filters do not force a balanced output and therefore do not necessarily minimize the volt-amps handled by each power active element. As a result, one reactive element could be required to produce higher volt-amps than necessary. It is therefore desirable to produce a power active filter which minimizes the volt-amp rating requirements of the individual series connected power active filter elements.

Power active filters constructed in accordance with the present invention combine a multi-phase phase locked loop and positive sequence filter with a power amplifier to improve the waveform characteristics on a set of power supply mains by reducing voltage imbalance, decreasing distortion and lowering modulation. These power active filters generate a plurality of balanced, constant amplitude positive sequence AC reference voltages which are phase locked to corresponding ones of a plurality of phase voltages of a multiple phase electric power system. The difference between each of these reference voltages and each corresponding phase voltage is used to produce a plurality of error signals. Correction signals are produced in response to the error signals and combined with the phase voltages to produce a plurality of output voltages having substantially only a fundamental component.

Power active filters constructed in accordance with this invention comprise a means for generating the above AC reference voltages, means for producing the error signals, means for creating the correction signals, and means for combining the correction signals with corresponding ones of the phase voltage. By combining the unique characteristics of a multi-phase, phase locked synthesized waveform generator and a multi-phase positive sequence filter, the present invention can be used to produce a high quality voltage on the mains, while minimizing the volt-amp rating requirements for the reactive power active filter elements.

FIG. 1 is a block diagram of a power active filter constructed in accordance with one embodiment of the present invention.

FIG. 2 is a block diagram of a prior art reference generator used in the circuit of FIG. 1;

FIG. 3 is a schematic diagram of a prior art three phase digital synthesizer which may be used in the reference generator of FIG. 2; and

FIG. 4 is a block diagram of the power circuit of FIG. 1.

Power active filters add and subtract voltage to the mains of a power system in a manner which improves voltage waveform quality. Such filters include a control circuit and a power circuit. Referring to the drawings, FIG. 1 is a block diagram of a power active filter constructed in accordance with the present invention. This filter includes a control circuit 10 and a power circuit 12. The control circuit is connected to the power system mains 14, 16 and 18 and includes a reference generator 20 which produces a plurality of balanced, constant amplitude positive sequence AC reference voltages on lines 22, 24 and 26. Each of these reference voltages is phase locked to a corresponding one of the phase voltages V.sub.A, V.sub.B or V.sub.C on mains 14, 16 and 18. The reference voltages are subtracted from the corresponding mains voltages at junction points 28, 30 and 32 to yield error signals on lines 34, 36 and 38. A triangular waveform is supplied on terminal 40. Comparators 42, 44 and 46 compare the error signals with the supplied triangular waveform to produce a plurality of correction signals on lines 48, 50 and 52. The power circuit then includes means for combining the correction signals with the corresponding ones of the phase voltages to produce a plurality of output voltages on output lines 54, 56 and 58 such that the voltages supplied to the load 60 comprise substantially only a fundamental component.

FIG. 2 is a block diagram of the reference generator 20 of FIG. 1. The circuit described in FIG. 2 is disclosed in U.S. Pat. No. 4,669,024, issued May 26, 1987 to E. J. Stacey. This circuit utilizes differential analog multipliers 62, 64 and 66 to multiply the line-to-line synthesized outputs V.sub.A ', V.sub.B ' and V.sub.C ' by the line-to-neutral source inputs so that the outputs are phased locked with the source voltage signals. Each of the differential multipliers has differential inputs X and Y that are indicated by plus and minus signs. Thus the differential inputs are +Y, -Y, +X and -X for each differential multiplier. The -X input of each of the multipliers is connected to the system ground GND. This represents a zero value input at that point. The three source phase voltages are connected to the +X inputs of the multipliers. The synthesized positive sequence output reference signals are connected to the +Y and -Y inputs as shown. The output of differential multiplier 62 is V.sub.A (V.sub.B '-V.sub.C '), the output of differential multiplier 64 is V.sub.B (V.sub.C '-V.sub.A ') and the output of differential multiplier 66 is V.sub.C (V.sub.A '-V.sub.B '). Vectorial analysis of the quantities within the parenthesis will show that the quantity (V.sub.B '-V.sub. C ') lags the input V.sub.A of the source signal by 90.degree.. Similarly, the quantities (V.sub.C '-V.sub.A ') and (V.sub.A '-V.sub.B ') lag by 90.degree. the inputs V.sub.B and V.sub.C respectively. A non-inverting integrator is used to maintain phase lock so that V.sub.A ' is in-phase with V.sub.A, V.sub.B ' is in phase with V.sub.B and V.sub.C ' is in-phase with V.sub.C. The output of integrator 68 is fed to a voltage controlled oscillator 70 which produces a plurality of output pulses that are used by the three-phase digital synthesizer 72 in combination with a DC signal provided by amplitude reference 74 to produce the phase locked positive sequence reference signals V.sub.A ', V.sub.B ' and V.sub.C ' on lines 22, 24 and 26.

FIG. 3 is a schematic diagram of the threephase digital synthesizer 72 of FIG. 2. This synthesizer includes a counter 76 and a bandpass sequence filter 78. The sequence filter is constructed in accordance with U.S. Pat. No. 4,479,160, issued Oct. 23, 1984 to Stacey. The output of the voltage controlled oscillator 70 in FIG. 2 is provided on line 80 to the digital synthesizer and the DC amplitude reference signal is supplied by way of terminal 82.

The error signals on lines 34, 36 and 38 of FIG. 1 are converted to pulse-width modulated signals when compared to the triangular wave by comparators 42, 44 and 46. The pulse width modulated outputs on lines 48, 50 and 52 are fed to the power circuit 12. FIG. 4 is a schematic diagram of the power circuit. Each pulse width modulated correction signal from the control circuit is amplified by driver circuits 84, 86 and 88. These driver circuits are coupled through transformers 90, 92 and 94 to charge holding circuits 96, 98 and 100 respectively. The charge holding circuits control the operation of a plurality of controllable switches such as the MOSFETs 102, 104, 106 and 108 in a plurality of bridge circuits 110, 112 and 114. Each of the bridge circuits includes a branch circuit comprising the series connector of a capacitor 116 and an inductor 118. This branch circuit is connected between a pair of output terminals 120 and 122. Each of these output terminals represents a junction point between two of the controllable switching devices. A DC power source 124 provides DC voltage to the bridge circuits.

In operation, the amplified correction signals appear across the capacitor 116 in the LC filter formed by the series connection of capacitor 116 and inductor 118. Summing transformers 126, 128 and 130 each have a primary winding connected across one of the bridge circuit capacitors and a secondary winding connected between the mains and the load. These summing transformers serve as means for combining the correction signals with the mains phase voltages by subtracting the correction signals from the mains voltages, thereby producing positive sequence load voltages of constant amplitude on the output lines 54, 56 and 58.

A power active filter constructed in accordance with this invention has been demonstrated on the output of a 20 kvA DC-link inverter used in airborne electrical generating applications. In this system, worst case distortion was reduced from 5.5% to 2.2%. Imbalance for 1/2 per unit load unbalance decreased from 6.4% to 2.7% and modulation went from 3.6% to less than 0.9%.

It should now be apparent that the present invention provides a power active filter which includes a multiple phase phase-locked loop, a positive sequence filter and a power amplifier to improve mains balance, and distortion and modulation characteristics. By utilizing a three-phase phase locked loop (which produces an accurate set of balanced fundamental frequency reference waveforms representing the wanted output components of a distorted and unbalanced source) to control three series connected power active filter elements to produce a substantially balanced, distortion free output, this invention minimizes the volt-amp rating requirements of the individual series connected power active filter elements. This results in size, weight and cost savings.

Although the present invention has been described in terms of what is at present believed to be its preferred embodiment, it will be apparent to those skilled in the art that various changes may be made without departing from the scope of the invention. It is therefore intended that the appended claims cover such changes.