Phased Array Antenna Feed

The present invention relates to an electronically steered phased array antenna for use in radar or receivers.

As is well known, a phased array is a group of simple radiating antennas, hereinafter referred to as elements, arranged over an area called an aperture. A beam or beams is formed by superposition of the radiation emanating from all of the elements and the direction of the beam can be adjusted by varying the relative phase of the signal applied to each element or by varying the frequency of an oscillator. Because the signals at each element must be related in phase, they have heretofore been derived from a reference oscillator. The signal from the oscillator is fed to the elements of the array through various combinations of amplifiers and phase shifters, of which there are many different configurations.

The primary limitation in present phased array systems is the complexity and cost of the feed structure. Maintaining the correct phase of each element is especially difficult since phase tracking must be maintained from the reference oscillator through a combining network and phase shifters. The phase shifters are not easily made, particularly if fine adjustments over 360.degree. are required. In addition, the bandwidths of the phase shifters are relatively narrow. The use of digital phase shifters implies a quantization of the phase. If the quantization is coarse, the side lobe levels of the beam are increased and it is generally not presently feasible to produce phased array systems with very low side lobe levels because of the cost and complexity of making digital phase shifters which provide fine phase control.

The present invention replaces the conventional radio frequency (RF) feed structure, including the reference oscillator, with a sampling arrangement which allows direct digital generation of the signal to be transmitted at each element with the desired amplitude and phase. The apparatus may be readily adapted to function as a receiver or transmitter or both.

In accordance with one aspect of the present invention, there is provided an apparatus for exciting a phased array antenna having a plurality of antenna elements. The apparatus comprises means for producing a plurality of series of digital words, each series of digital words being representative of a signal to be transmitted by one of the elements, each digital word of each series being representative of a predetermined value of a signal to be transmitted from the elements. A plurality of signal processing means connect the producing means and one of the antenna elements. Each signal processing means includes a plurality of digital-to-analog converters each of which is adapted to receive in predetermined sequence the digital words of one of the series of digital words and convert received digital words to corresponding analog signals. The apparatus further includes means for combining the analog signals output by the plurality of digital-to-analog converters to produce a combined signal and feed the combined signal to the one of the antenna elements.

In accordance with another aspect of the invention, there is provided a receiver for use with a phased array antenna having a plurality of antenna elements. The receiver comprises a plurality of signal processing means, each of which is connected to and associated with one of the antenna elements and includes means for distributing a signal received at the one of the antenna elements, means for spatially sampling the distributed signal for producing a plurality of analog samples, and means for digitizing the analog samples to produce a plurality of digital samples. The receiver further includes means for analyzing the plurality of digital samples from each of the signal processing means.

These and other features of the invention will become more apparent from the following description in which reference is made to the appended drawings, wherein:

FIG. 1 is a block diagram representation of a prior art arrangement for exciting a phased array antenna;

FIG. 2 is a block diagram representation of the phased array antenna feed of the present invention; and

FIG. 3 is block diagram representation of a phased array antenna element excitation/sampling device of the present invention.

FIG. 1 illustrates a conventional phased array feed circuit 10 including a reference oscillator 12, a combining network 14 feeding a plurality of amplifiers 16, each of which feeds one of plurality of phase shifters 18 each of which, in turn, excites an antenna element 20 of an antenna 22. There are many combining network/phase shifter configurations which are well known to those skilled in this art and thus need not be described further detail.

As mentioned previously, the primary limitation in present phased array systems is the complexity and cost of the feed structure. Maintaining the correct phase of each antenna element is especially difficult since phase tracking must be maintained from the reference oscillator through the combining network and phase shifters. The phase shifters are not easily made, particularly if fine adjustments are required over 360.degree., and their bandwidths are relatively narrow. The use of digital phase shifters involves quantization of the phase and, if the quantization resulting from digital phase shifters is coarse, the side lobe levels of the beam are increased. Heretofore, it has not been feasible to produce phased array systems which produce very low side lobes because of the cost and complexity of making digital phase shifters which provide fine phase control.

FIG. 2 illustrates the basic concept of the present invention, generally designated by reference numeral 30, in which each antenna element 20 of a phased array antenna 22 is driven by a sampling arrangement 34 controlled a digital signal processor controller 32. FIG. 3 illustrates one of the sampling arrangements 34. As explained hereinbelow, the system is capable of transmitting one or more signals or of receiving one or more signals.

Each sampling arrangement 34 is comprised of a meander delay line means 36 electrically connected to an antenna element and a plurality of sampling gate means 38a to 38n controlled by an IMPULSE GENERATOR 40. Gate means 38a to 38n have one terminal electrically connected to a predetermined points 42a to 42n on the delay line. The system further includes an equal number of selector switches 44a to 44n, controlled by a TRANSMIT/RECEIVE SWITCH LOGIC means generally designated by reference numeral 46, and an equal number of pairs of analog-to-digital converter means 50a to 50n and digital-to-analog converter means 52a to 52n. RECEIVE LOGIC means 54a to 54n are respectively associated with analog-to-digital converters 50a to 50n while TRANSMIT LOGIC means 56a to 56n are respectively associated with digital-to-analog converters 52a to 52n. The RECEIVE LOGIC and TRANSMIT LOGIC means communicate with a processor 60, as shown.

It will be understood that each analog-to-digital converter is adapted to convert the voltage level output by its associated gate means to a digital word representative of the value of the signal received by its associated element and transmit the digital word to the RECEIVE LOGIC means. Similarly, the digital-to-analog converter means is adapted to convert a digital word received from its associated TRANSMIT LOGIC means to an analog signal and transmit the analog signal to its associated gate means.

The sampling means further includes a second selector switch 62, controlled by TRANSMIT/RECEIVE SWITCH LOGIC means 46, a power amplifier 64 for amplifying a signal to be transmitted by the antenna element and a preamplifier 66 for amplifying a signal or beam received by the antenna element.

In the case of a transmitter, the microprocessor generates a waveform or waveforms, which are capable of being described mathematically, to be transmitted by the phased array. The microprocessor computes the values of the waveform or waveforms for predetermined timed intervals and produces digital words or bit streams representative of such values. The digitized waveform values may be stored either in a mass storage memory (internal to the processor) and then transferred to a number of fast RAM's or transferred directly to the fast RAM's. Alternatively, predetermined waveform values may be stored in lookup tables in an appropriate memory. The computer is also used to analyze data received via the phased array. The procedures for generating data representing the waveform(s) to be transmitted or analyzing data representing a received waveform(s) are well known to those skilled in the art and need not be described in further detail.

When transmitting a waveform(s), the computer applies appropriate signals to the TRANSMIT LOGIC means 56a to 56n each of which, in turn, feeds a digital word representative of a value of a signal to be transmitted by its associated antenna element to its associated digital-to-analog converter. Simultaneously, the computer activates the TRANSMIT/RECEIVE SWITCH LOGIC means 46 which triggers selector switches 38a to 38n to simultaneously connect the digital-to-analog converters to their associated sampling gates and the second selector switch 62 to power amplifier 64. Once the digital-to-analog converters have settled, the computer initiates a signal which triggers the impulse generator which in turn simultaneously activates all of the sampling gates, thus transmitting the analog output of the digital-to-analog converters to the meander delay line. The meander delay line combines all of the analog signals in a time series manner to thereby construct the signal which is to be transmitted by the antenna element 20 to which the delay line is connected. The constructed signal propagates in both directions along the meander delay line where it is terminated at one end through a termination resistor and is transmitted at the other end to power amplifier 64 and then to antenna element 22.

In the receive mode, the computer issues a command which triggers TRANSMIT/RECEIVE SWITCH LOGIC means 46 which in turn triggers the first set of selector switches 44a to 44n to connect the analog-to-digital converter inputs to their respective sampling gates and the second selector switch 62 to preamplifier 66. Thus, any signal received by the antenna element is amplified by the preamplifier and transmitted to the meander delay line. At a predetermined time, the computer initiates a command which triggers impulse generator 40 to simultaneously activate all of the sampling gates. Their respective signals are thus transmitted to their associated analog-to-digital converters where they are digitized and then transmitted to the RECEIVE LOGIC means. The processor accesses the data from the RECEIVE LOGIC means to determine the direction of arrival of the incoming signal or beam. If only one beam was received, the direction of arrival would be known. However, if multiple beams were received simultaneously, the direction of arrival would be determined by examining the signals appearing at the output of the analog-to-digital converters. Computer algorithms would determine the direction of arrival, either through computation or by comparison with a lookup table. Such algorithms are well known to those skilled in the art and form no part of this invention and, accordingly, will not be described further.

Thus, it will be seen that all signal formation is accomplished with digital electronics. There are no microwave, adjustable components such as phase shifters or oscillators. The amplitude and phase of the signal at each antenna element is obtained directly from digital circuitry. Conversely, when a signal is received by a phased array, it is decoded directly with digital electronics.