Semiconductor Package Structure

This invention relates to a package structure made from a thermoplastic resin and having a cavity to hold semiconductor elements such as diodes, transistors, etc, or integrated circuits of these semiconductors (hereinafter referred to as "a semiconductor") airtightly.

As packaging methods for semiconductors, there is mainly used a plastic package method wherein lead frames previously mounting a semiconductor are placed between top and bottom molds and a molten resin is poured into a cavity formed by these molds. But according to this method, since the semiconductor is forced to be placed in a high pressure and high temperature state due to a direct contact with the molten resin, there sometimes takes place cutting of wires connecting lead terminals and electrodes of the semiconductor.

In order to improve such a defect of the plastic package method, there is proposed a method wherein lead frames mounting a semiconductor are inserted between a pair of resin moldings having a cavity therein and integrally joined (Japanese Patent Unexamined Publication No. 98969/76). But even in this method, since the semiconductor is in a state of hanging in a closed space, there are problems in that the dissipation of heat from the semiconductor is difficult at the time of operation, thermal resistance becomes larger particularly in the case of semiconductor with higher integration capacity. Further, since a tab of lead frame for fixing the semiconductor is only supported by two tab hanger 9 as shown in FIG. 3 in usual, wires which connect electrodes of semiconductors and lead terminals are deformed or cut due to thermal deformation of the tab hangers when subjected to a heat cycle test.

It is an object of this invention to provide a package to include semiconductors overcoming the defects mentioned above and excellent in heat dissipation and reliability without causing deformation or cutting of wires.

This invention provides a package comprising a pair of flat moldings made from a thermoplastic resin and having a cavity to hold a body of semiconductor which is mounted on a lead frame, and said moldings inserting lead frames therebetween and integrally joined by melting with heating, characterized in that one of the flat moldings has in the cavity a projection which is welded to a tab of the lead frame by melt heating.

FIG. 1 is a cross-sectional view of a package including a semiconductor according to this invention.

FIG. 2(a) is a plan view of a flat molding and FIG. 2(b) is a cross-sectional view of the flat molding.

FIG. 3 is a plan view of one constituting unit of a lead frame.

This invention is illustrated by referring to the drawings.

FIG. 2 shows a flat molding 2 used in this invention having a cavity 4 in the central portion for holding a semiconductor and a projection 5 in the cavity 4. The number, size, shape and position of projection are decided depending on the size of lead frame tab. For example, the size of projection is 20 to 100% of the tab area in order to attain the object. The shape of projection may be a cylinder or a square pillar. The top of projection is preferably in a round form rather than flat in order to attain uniform adhesion. The projection is preferably formed approximately at the center of the tab. The above explanation is the case of one projection, but when a plurality of projections are formed to support the tab, the projections preferably have a total cross-sectional area of 20% or more of the tab area. The number of projections is not limited but is usually 4 to 6.

The depth l is decided depending on the offset amount of the tab. The term "offset" means a difference of the heights of the surface of tab and the surface of lead frame as shown in FIG. 1. Usually, the depth l is in the range of 0 to 400 .mu.m.

FIG. 1 is a cross-sectional view of a package including a semiconductor formed by using such a flat molding 2 and integrally joining lead frames mounting a semiconductor with flat moldings (2,2') from a thermoplastic resin. The projection 5 present in the cavity 4 for holding the semiconductor in the flat molding 2 shown in FIG. 2 at the time of integral joining under pressure is welded to a tab 3 of lead frame shown in FIG. 3 by melting a part of the resin of the projection after the integral joining under pressure.

Therefore, the heat dissipation becomes better since the projection 6 is welded to the tab 3 as shown in FIG. 1. Further, no deformation is given to the tab so as to cause the deformation or cutting of the wires, since a part of the melt softened resin of the projection is welded to the tab at the time of integral joining under pressure. In addition, since the tab is also supported by the welded projection 6 after the integral joining under pressure, the defect of deformation or cutting of the wire 8 due to the thermal deformation of the tab hanger 9 shown in FIG. 1 during the heat cycle test can be solved, which results in improving the reliability of package.

Any apparatus can be used in this invention for integrally joining heated flat moldings made from a thermoplastic resin and lead frames inserted therebetween.

As the thermoplastic resin for forming the flat moldings, there can be used various kinds of thermoplastic resins depending on requirements for individual semiconductor packages. But the thermoplastic resins should have high thermal resistance (including resistance to heat distortion and resistance to thermal degradation), low moisture permeability and electrical and mechanical properties as well as good moldability.

Typical examples of the thermoplastic resin are polyphenylene oxides, polyether sulfones, polysulfones, phenoxy resins, polyacetals, polyethylene terephthalates, polybutylene terephthalates, polyarylates, polycarbonates, polyamide resins having a low moisture absorption, polyphenylene sulfides, blends of these resins with one or more fillers such as glass fibers, etc.

The package including a semiconductor of this invention can be produced by heating joining surfaces of flat moldings made from a thermoplastic resin, one of the flat moldings having a projection in the cavity, at a temperature of 200.degree. to 500.degree. C., inserting preheated lead frames mounting a semiconductor so as to contact a tab of the lead frame with the projection, and integrally joining the flat moldings and the lead frames with heating at a temperature of 200.degree. to 500.degree. C. under a pressure of 10 to 50 kg/cm.sup.2 for 3 to 10 seconds. In such a case, the tab is preferably heated, but may not be heated so long as the welding between the tab and the projection can be attained. The above-mentioned pressure conditions are for the total of moldings and the tab only contacts with a molten top of the projection. As the heating method, there is no particular limitation thereto. The whole surfaces of moldings are, for example, preheated by hot-air and the lead frame is preheated, for example by a heating plate.

This invention is illustrated by way of the following Examples.

A flat molding (14.times.32 mm square) having a cavity in the central portion and a cylindrical projection with a diameter of 3 mm and a depth (l) of 120 .mu.m in the cavity as shown in FIG. 2 was produced by using polyphenylene sulfide resin having a heat distortion temperature of 260.degree. C. or higher. A flat molding having only a cavity was also produced by using the same resin as mentioned above. Joining surfaces of the flat moldings were heated at 300.degree. C. in a molding machine and a preheated lead frame, which had a tab of 4 mm.times.4 mm square and 300 .mu.m in the offset amount, mounting a semiconductor and 5 series of constituting units with 24 pins as shown in FIG. 3 was inserted between the flat moldings, followed by integral joining under a pressure of 25 kg/cm.sup.2 for 5 seconds with heating at 300.degree. C. to give a package as shown in FIG. 1.

The thermal resistance at the integral circuit (IC) joining portion after the integral joining under pressure was 100.degree. C./W, which value was 30% or more lower than the case having no projection in the cavity of flat molding. This fact can remarkably contribute to the prolongation of the life of semiconductors having particularly larger capacity.

When the wires were observed by using a microscope after the integral joining under pressure, no deformation nor cutting of wires was detected at all due to the welding of a part of the resin of the projection to the tab.

No deformation nor cutting of the wires was admitted due to thermal deformation of the tab after the heat cycle test under conditions of at -65.degree. C. for 30 minutes/+150.degree. C. for 30 minutes with 500 cycles and sealing properties were also good.

The process of Example 1 was repeated except for using flat moldings having no projection in the cavity for holding the semiconductor. The thermal resistance at the IC joining poriton was as large as 150.degree. C./W. After the heat cycle test, some of the nail head portions of the wires were peeled off due to the thermal deformation of tab when observed by using a microscope, since the rear side of the tab was not supported by a projection of a flat molding.

The process of Comparative Example 1 was repeated except that a cylindrical metal having a diameter of 3 mm and l=120 .mu.m was inserted between the cavity surface of base flat molding and the rear side of the tab. After the integral joining under pressure, it was admitted by a microscope that the wires were deformed or cut due to the deformation of tab caused by the inserted metal piece.

As explained above, according to this invention, since the tab of lead frame is welded to a part of the resin of the projection formed in the cavity of one of flat moldings at the time of melt softening of the resin, the wires are not deformed nor cut and the resulting package including a semiconductor is excellent in heat dissipation and reliability.