Semiconductor Module

The present invention relates to a semiconductor module, and more particularly to a semiconductor module in which semiconductor chips are mounted on a multi-layer wiring substrate.

Semiconductor modules of various structure in which semiconductor chips are mounted on a multi-layer wiring substrate have been developed. For instance, a multi-chip module having an improved thermal performance is described by Kohara et al. in a paper entitled "High-Thermal Conductive Module" in 35TH Electronic Components Conference, Proceedings 1985, pp 180-186.

In addition, a new packaging technology of LSI chip is described by Watari et al. in a paper entitled "Packaging Technology For The NEC SX Supercomputer" in the above-mentioned 35TH Electronic Components Conference, Proceedings 1985, pp 192-198.

Conventional semiconductor modules have adopted structure in which a face down semiconductor chip is fixed on a semiconductor substrate and then a cap is provided to cover the fixed semiconductor chip by adhering a die of the semiconductor chip to a surface of the cap opposite the substrate. When such a structure is employed, since the adhering or bonded portions cannot be visually confirmed or recognized, high precision technique is required for assembling work. In addition, since the number of individual bonded portions is also increased, the number of assembling steps is increased, resulting in lowered reliability of the module itself.

An object of the present invention is to eliminate the above-mentioned drawbacks with the prior arts to provide a semiconductor module of a structure which can easily perform assembling work and connecting operation required therefor in a simplified manner.

A semiconductor module according to the present invention comprises a multi-layer wiring substrate provided at a first surface with a plurality of input and output terminals and at a second surface thereof with lead terminals connected to the input and output terminals. A rectangular cap and leg members are provided on the second surface of the multi-layer wiring substrate, the leg members being fixed to four corners of the rectangular cap to form between the multi-layer wiring substrate and the cap a space communicating with open air. A semiconductor chip is fixed to a surface of the square cap which is exposed to the space and is supported by the square cap. Lead wires are provided each having one end connected to a terminal of the semiconductor chip. The lead wires extend outwardly from the semiconductor chip so that they can be visually confirmed from above the cap, and are bent to permit the other ends of the lead wires to be connected to the lead terminals.

FIG. 1 is a perspective view, partly cut away, of a semiconductor module in accordance with the present invention.

FIG. 2 is a plan view of a semiconductor module in accordance with the present invention.

FIG. 3 is a sectional view along line A--A' of FIG. 2.

An embodiment of a semiconductor module according to the present invention will be described in detail with reference to the attached drawing.

FIG. 1 is a perspective view, partly cut away, illustrating the entirety of the semiconductor module according to this embodiment. FIGS. 2 and 3 are a plan view and a sectional view respectively of the semiconductor module. As seen from FIGS. 1-3, the semiconductor module includes a semiconductor chip 1, lead wires 2 of the semiconductor chip 1 and a square cap 3. Leg or post members 4 are fixed on four corners of the cap 3. A multi-layer wiring substrate 5, is included having at least one insulating layer 5' formed with a non-organic insulating material. Lead terminals 7 are provided for contact with the lead wires 2, and a heat sink 8 is provided on the cap 3. The leg members 4 are securely erected on a surface of the multi-layer wiring substrate so as to define a space between the cap 3 and the surface of the multi-layer wiring substrate 5. A rectangular area formed on the multi-layer wiring substrate 5 by the four leg members 4 has sides thereof each of which is parallel to and longer than a corresponding side of the cap 3. The lead terminals are arranged between the sides of the cap and the corresponding sides of the rectangular or square area formed by the four leg members 4 when viewed from above the cap. The semiconductor chip 1 is attached on a surface of the cap 3 opposing the multi-layer wiring substrate 5 i.e. on the surface exposed to the space 6 of the cap 3. Respective lead wires 2 of the semiconductor chip 1 extend outwardly so that they can be easily confirmed visually from above the cap 3, and are bent downwardly at positions corresponding to the sides of the cap 3. In addition, the lead terminals 7 are connected to input/output terminals 9 provided on the back surface of the substrate 5, respectively.

The assembling work for the semiconductor module shown is carried out as follows. At first, a die of the semiconductor chip 1, to which one terminal of each of the lead wires 2 is connected, is attached to the inner surface exposed to the space 6 of the cap 3 by bonding process etc. Thus, an assembly composed of the semiconductor chip 1, the lead wires 2, the cap 3 and the legs 4 is prepared. Next, the leg members 4 are fixed on the multi-layer substrate 5 by a bonding process. Then, the lead wires 2 of the semiconductor chip 1 are connected to the lead terminals 7 provided on the surface of the multi-layer wiring substrate 5 by presure-bonding or soldering process etc. Finally, the cooling heat sink 8 is provided on the cap 3. Instead of the cooling heat sink 8, a cooling heat sink (not shown) common to a plurality of caps may be provided over them. In the assembling work of the semiconductor module, the following advantages can be obtained. (1) It is possible to easily attach the die of the semiconductor chip 1 on the surface exposed to the space 6 of the cap 3 by bonding process etc. (2) It is also possible to easily fix the leg members 4 of the cap 3 on the multi-layer wiring substrate 5 by bonding process etc. in a manner similar to the above. (3) Since the lead wires 2 of the semiconductor chip 1 can be easily confirmed visually from above the cap 3, it is possible to easily connect these lead wires 2 to the respective lead terminals 7 of the multi-layer wiring substrate 5 by pressure-bonding or welding process. Accordingly, the assembling work is facilitated and the number of assembling steps is reduced.

In the above-mentioned embodiment, the multi-layer wiring substrate uses a non-organic material as the insulating material. In this case, since the lead terminal 7 is attached to the hard surface of the multi-layer wiring substrate, the pressure-bonding process can be easily performed. In addition, there may be employed a substrate which uses as the insulating material polyimide resin or a material obtained by adding fine powder of non-organic compound e.g. silica or alumina etc. into the polyimide resin.

While this invention has been illustrated and described in accordance with a preferred embodiment, it is recognized that variations and changes may be made and equivalents employed herein without departing from the invention as set forth in the claims.