Amplifier Circuit Suitable for Use as an Active Filter Circuit

This invention relates to an amplifier circuit, and particularly to an amplifier circuit suitable for use as an active filter circuit, which can be easily formed into an integrated circuit (IC).

When an attempt is made to allow an IC (integrated circuit) to comprise such circuits including filters as integrator and phase shift circuits, it is important how these filters should be formed in the IC so as to decrease the number of components to be externally connected. As filters for use in an integrated circuit, active filters are usually used. However, disadvantages of a conventional active filter are:

(1) it is difficult to form its resistors and capacitors with accurate values, causing errors in its cut-off frequency which is determined by the product of these values; and

(2) it is difficult to form a circuit with a lower cut-off frequency because resistors and capacitors are limited to have relatively low values.

Conventional active filters are disclosed in JP-A-55-45224 and JP-A-55-45266.

An amplifier according to the present invention comprises first and second transistors Q.sub.1 and Q.sub.2, which together form a first differential amplifier for converting the voltage of the input signal thereto to a signal current, third and fourth transistors Q.sub.3 and Q.sub.4, which together form a second differential amplifier for diving the signal current from the second transistor Q.sub.2 at a given division ratio, a capacitor C connected to the collector of the fourth transistor Q.sub.4, means connected to the base of the third transistor Q.sub.3 or fourth transistor Q.sub.4, said means responsive to a control voltage V.sub.c thereto to control the current division ratio for the currents of the third and fourth transistors Q.sub.3 and Q.sub.4, and first and second resistors R.sub.1 and R.sub.2 connected, respectively, to emitters of the first and second transistors Q.sub.1 and Q.sub.2. In the amplifier according to the present invention, the signal current shunted in the current division ratio K by the third and fourth transistors Q.sub.3 and Q.sub.4 flows through the load capacitor C so that the time constant of the active filter is controlled, the ratio K being controlled by the control voltage V.sub.c. The control voltage V.sub.c also compensates for the inaccuracy of the values of the resistors and capacitors. The resistors R.sub.1 and R.sub.2 connected to the emitters of the first and second transistors Q.sub.1 and Q.sub.2 function to provide the first and second transistors Q.sub.1 and Q.sub.2 with greater dynamic ranges against the input signal, and also to allow the first and second transistors Q.sub.1 and Q.sub.2 forming the first differential amplifier to operate constantly at emitter current with increasing transition frequency. This improves the high frequency characteristics of the first differential amplifier.

FIGS. 1 and 7 are schematic diagrams of amplifiers according to the present invention,

FIGS. 2 and 8 are schematic diagrams of amplifiers according to the present invention, which are intended for use as integrators,

FIG. 3 is diagram illustrating a relationship between the transition frequency and emitter current of a transistor,

FIGS. 4 and 9 are schematic diagrams of amplifiers according to the present invention, which are intended for use as low-pass filters,

FIGS. 5 and 10 are schematic diagrams of amplifiers according to the present invention, which are intended for use as high-pass filters,

FIGS. 6 and 11 are schematic diagrams of amplifiers according to the present invention, which are intended for use as phase shifters,

FIGS. 12 and 13 are schematic diagrams of circuits utilizing the low-pass filters shown in FIGS. 4 and 9, and

FIG. 14 is a block diagram illustrating a typical filter.

FIG. 1 shows a schematic diagram illustrating an amplifier according to the present invention.

Referring to FIG. 1, a differential amplifier is composed of a transistor Q.sub.1 connected to one end of a resistor R.sub.1 at its emitter and a transistor Q.sub.2 connected to one end of a resistor R.sub.2 at its emitter, the other ends of the resistors being connected to a first regulated current source A.sub.1. The base of the transistor Q.sub.1 is connected to one input T.sub.1, the base of the transistor Q.sub.2 is connected to another input T.sub.2, and an input signal V.sub.in is provided across the inputs T.sub.1 and T.sub.2. The collector current of the transistor Q.sub.2 is shunted by transistors Q.sub.3 and Q.sub.4, the emitters of which are connected to the collector of the transistor Q.sub.2. The transistors Q.sub.3 and Q.sub.4 together form a differential amplifier. The base of the transistor Q.sub.3 is supplied with a bias viltage V.sub.B1 through a terminal T.sub.8, while the base of the transistor Q.sub.4 is connected to a terminal T.sub.3. The current division ratio in which the current is divided between the transistors Q.sub.3 and Q.sub.4 is controlled by a control voltage V.sub.c applied to the terminal T.sub.3. The collector of the transistor Q.sub.4 is connected both to the collector of a transistor Q.sub.5 and to a capacitor C. The collector of the transistor Q.sub.4 is also connected to a terminal T.sub.4 at which an output voltage V.sub.out is produced. The capacitor C is connected to a terminal T.sub.5. The base of the transistor Q.sub.5 is connected to the base and collector of a transistor Q.sub.6, and the transistors Q.sub.5 and Q.sub.6 thus form a current mirror circuit in which the transistors Q.sub.5 and Q.sub.6 produce substantially the same collector current. Transistors Q.sub.7 and Q.sub.8 are connected together at their emitters which are connected to a second regulated current source A.sub.2. The current from the regulated current source A.sub.2 is selected to be half the current I.sub.0 from the regulated current source A.sub.1, that is, I.sub.0 /2. The bases of the transistors Q.sub.7 and Q.sub.8 are connected to the bases of the transistors Q.sub.3 and Q.sub.4, respectively, and the current division ratio between the transistors Q.sub.3 and Q.sub.4 is controlled by a control voltage V.sub.c applied to the terminal T.sub.3. Therefore, the collector currents of the transistors Q.sub.4 and Q.sub.8 are substantially equal, and the collector currents of the transistors Q.sub.3 and Q.sub.7 are substantially equal.

FIG. 2, in which like reference numerals represent like elements as in FIG. 1, shows a circuit wherein another bias voltage V.sub.B2 is applied to the terminal T.sub.2 with the terminals T.sub.5 and T.sub.6 being connected together.

When an input signal V.sub.in is supplied to the terminal T.sub.1 in FIG. 2, the collector current i.sub.s of the transistor Q.sub.2 driven by the input signal V.sub.in is represented by: ##EQU1## wherein r.sub.e is the emitter resistance of each of the transistors Q.sub.1 and Q.sub.2.

Let K be the current division ratio (the portion for the collector of Q.sub.4) of the current i.sub.s between the transistors Q.sub.3 and Q.sub.4, then a current Ki.sub.s flows through the capacitor C and produces an output voltage V.sub.out at the terminal T.sub.4.

where S is Raplacean, and .omega. is the angular frequency of the signal. From the formulas (1) and (2) ##EQU2## This indicates that the circuit shown in FIG. 2 is an integrator, the gain of which is given by K/C.(R.sub.1 +R.sub.2 +2r.sub.e). The emitter resistance r.sub.e is a function of the emitter current I.sub.E and given by

where k is Boltzman's costant, T is absolute temperature, and q is electron charge. The emitter resistance r.sub.E =260.OMEGA. at the emitter current of 100 .mu.A is obtained at an amlbient (room) temperature.

The transition frequency f.sub.T, which generally indicates the high frequency performance of a transistor, varies according to the emitter current I.sub.E as shown in FIG. 3. When the emitter current I.sub.E is selected relatively large, the transition frequency f.sub.T increases and thus the high frequency performance improves.

If the integral gain is determined by the emitter resistor r.sub.e, the transition frequency f.sub.T decreases. According to the present invention, resistors R.sub.1 and R.sub.2 and transistors Q.sub.3 and Q.sub.4 are provided to allow transistors Q.sub.1 and Q.sub.2 to operate constantly at the emitter currents I.sub.E with increasing transition frequency f.sub.T. If the values of the resistors R.sub.1 and R.sub.2 are both selected to be a resistance value R.sub.E which is sufficiently large compared to the emitter resistance r.sub.e, the formula (3) may be practically rewritten as follows: ##EQU3## which means that the integral gain is determined by the resistors R.sub.1 and R.sub.2 and the current division ratio K. If there is a change in the integral gain due to inaccuracy of the value of the capacitor C or resistor R.sub.1, then the control voltage V.sub.c supplied to the control terminal T.sub.1 is controlled to control the current division ratio K for the signal current to the collector of the transistor Q.sub.4, so that a desired integral gain can be obtained. Further, the resistance R.sub.E serves to provide a greater dynamic range for the input signal, thereby providing the circuit with improved characteristics against distortion and noise. Since the current division ratio K also varies with the bias voltage V.sub.B1 supplied to the terminal T.sub.8, the integral gain may be controlled by the voltage V.sub.B1 supplied to the terminal T.sub.8.

FIG. 4 shows an amplifier according to another embodiment of the present invention, which is intended for use as an integrator. Transistors Q.sub.10, Q.sub.11, Q.sub.12 and Q.sub.13 and a regulated current source A.sub.3 form a DC level shift emitter follower. The integral output from a capacitor C is coupled through a terminal T.sub.4 to the base of the transistor Q.sub.10, which in turn produces at its emitter an output signal V.sub.out which appears at a terminal T.sub.9. The output signal V.sub.out is also supplied through the transistors Q.sub.11, Q.sub.12 and Q.sub.13 to a terminal T.sub.2 connected to the base of a transistor Q.sub.2, which together form a negative feedback loop.

Therefore, the transfer function H.sub.2 (S) of the circuit shown in FIG. 4 is determined by ##EQU4## Thus, the circuit shown in FIG. 4 is a low-pass filter with a cut-off frequency .omega..sub.c given by ##EQU5##

In this circuit, the inaccuracy of the capacitor C and resistor R.sub.E is perfectly canceled by the current division ratio K being controlled. If the values of the capacitor C and resistor R.sub.E are relatively small, the current division ratio K is selected to be smaller accordingly so that the cut-off frequency .omega..sub.c becomes low. It was difficult to form an IC (integrated circuit) which includes a filter with a relatively low cut-off frequency. According to this invention, however, such an IC can be easily formed by utilizing the integrator having a low value capacitor C and low value resistors R.sub.1 and R.sub.2 as shown in FIGS. 2 and 4, because the integrator can operate as a filter with a low cut-off frequency.

FIG. 5 shows an amplifier according to an embodiment of the present invention, which is intended for use as a high-pass filter. An input signal V.sub.in is supplied through a terminal T.sub.5 to one end of a load capacitor C, the other end of which is connected to the collector of a transistor Q.sub.4. The base of the transistor Q.sub.1 is connected to the terminal T.sub.1 connected to a bias voltage V.sub.B3. The transfer function H.sub.3 (S) is determined by ##EQU6## Thus, the circuit shown in FIG. 5 functions as a high-pass filter.

FIG. 6 shows an amplifier according to an embodiment of the present invention, which is intended for use as a phase shifter. In this circuit, the collector of the transistor Q.sub.1 is connected to a load resistor R.sub.3 and the base of a transistor Q.sub.9. A regulated current source A.sub.4 is connected to the emitter of the transistor Q.sub.9, which thus forms an emitter follower. A terminal T.sub.5 connected to the capacitor C is connected to the emitter of the transistor Q.sub.9. The transistor Q.sub.13 has an emitter connected to the base of the transistor Q.sub.2 through the terminal T.sub.2 and also to a terminal T.sub.10 at which an output signal V.sub.out appears. The current i.sub.s through the collector of the transistor Q.sub.2 is given by ##EQU7## When the current i.sub.s flows through the capacitor C, a voltage appears across the capacitor C. Simultaneously, a current equal in amount and opposite in phase to the current i.sub.s flows through the collector of the transistor Q.sub.1 to the load resistor R.sub.3. This current produces a voltage across the resistor R.sub.3, and this voltage is then added to the voltage across the capacitor C through the transistor Q.sub.9 and capacitor C. The added signal passes through the transistors Q.sub.10, Q.sub.11, Q.sub.13 and Q.sub.14. Thereafter, this signal turns out to be an output signal V.sub.out at a terminal T.sub.10, and is simultaneously supplied to the base of the transistor Q.sub.2 so that a negative feedback loop is formed. The output signal V.sub.out is represented by ##EQU8## where i.sub.s is the angular frequency of the signal. From the formulas (9) and (10), the transfer function H.sub.4 (S) of this circuit is ##EQU9##

In this formula, the term R.sub.3 /(2r.sub.e +R.sub.1 +R.sub.e) represents the gain of the signal appearing as the voltage across the load resistor R.sub.3. If the term is selected to be 0.5, then the denominator and numerator of the formula are equal, that is, the circuit gain is 1 regardless of the input signal frequency, and the circuit shown in FIG. 6 functions as a phase shifter in which only the phase of the output signal varies with a change in frequency.

If the values of the resistors R.sub.1 and R.sub.2 are selected to be sufficiently larger than the emitter resistance value r.sub.e so that the gain of the signal across the resistor R.sub.3 will be determined by the resistors R.sub.1, R.sub.2 and R.sub.3, and if the values of the resistors R.sub.1 and R.sub.2 are selected to be equal to the value of R.sub.E, then the formula (11) is substantially equivalent to ##EQU10## If this phase shifter is formed with inaccurate capacitance C and resistance R.sub.E in an IC, the control voltage V.sub.c supplied to the terminal T.sub.3 is controlled to control the current division ratio K for the signal current through the transistor Q.sub.4, so that the value of K/(C2R.sub.E) is maintained to be constant. In a single IC (integrated circuit) chip including a plurality of resistors, ratios between their resistance values are substantially equal, so that the gain R.sub.3 (2R.sub.E) for the voltage signal across the resistor R.sub.3 remains substantially constant.

According to this invention, therefore, the probable inaccuracy of the capacitance and resistance composing the circuit of FIG. 6 in an integrated circuit is compensated for by controlling the current division ratio K between the transistors Q.sub.3 and Q.sub.4, and the current value from the regulated current source A.sub.1 can be selected to a desired value. It is thus possible to select the current value of the regulated current source A.sub.1 for an increasing transition frequency f.sub.T of the transistors Q.sub.1 and Q.sub.2, as shown in FIG. 3. This results in improved characteristics in high frequency regions of the transistors Q.sub.1 and Q.sub.2.

In the circuit shown in FIG. 1, the output resistance r.sub.c of the transistors Q.sub.4 and Q.sub.5 on the side of the terminal T.sub.4 would be infinitive if they were ideal current source. However, the output resistance r.sub.c of the transistors Q.sub.4 and Q.sub.5 actually decrease with the increasing collector currents. Especially when formed in an IC chip, the NPN transistor Q.sub.4 can have a greater output resistance, but the PNP transistor Q.sub.5 can have only a smaller output resistance up to several tens or hundreds of k.OMEGA.. This will cause the output signal V.sub.out at the terminal T.sub.4 to attenuate in the frequency range lower than the frequency determined by the product of the output resistance r.sub.c and the load capacitance C, resulting sometimes in such a problem as the inability of the circuit to operate properly. Circuits as will be described may be used to avoid this problem.

FIG. 7 shows an improved circuit of the amplifier circuit shown in FIG. 1 according to this invention. Referring to FIG. 7, a transistor Q.sub.21 is connected to the transistor Q.sub.5 to form a cascode arrangement. That is, the collector of the transistor Q.sub.4 is connected to the collector of the transistor Q.sub.21. A bias voltage V.sub.B4 is connected to the base of the transistor Q.sub.21, the emitter of which is connected to the collector of the transistor Q.sub.5, both transistors providing a cascode arrangement. The base of the transistor Q.sub.5 is connected to the base and collector of the transistor Q.sub.6 so that a current mirror circuit is formed. The collector current of the transistor Q.sub.5, which is substantially equal to the collector current of the transistor Q.sub.6, passes through the collector of the transistor Q.sub.21 as a substantially regurated current.

Because of the cascode arrangement of the transistors Q.sub.5 and Q.sub.21, the impedance Zo of the transistor Q.sub.21 at the terminal T.sub.4 is practically represented by

where r.sub.c and h.sub.fe are the output resistance and current amplification factor of the transistor Q.sub.21, respectively.

Thus, by connecting the PNP transistor Q.sub.21 in a cascode arrangement as a load current source, the output impedance is increased to h.sub.fe times the output resistance r.sub.e of the transistor Q.sub.21.

FIG. 8 shows an improved circuit of the integrator shown in FIG. 2. This circuit also comprises a cascode arrangement of the transistors Q.sub.5 and Q.sub.21, and the output impedance is increased to h.sub.fe times the output resistance r.sub.e of the transistor Q.sub.21 by connecting the PNP transistor Q.sub.21 in a cascode arrangement as a load current source. Therefore, if the output resistance of the transistor Q.sub.4 is sufficiently larger than that of the transistor Q.sub.21, the operating range in low frequencies of the integrator also becomes h.sub.fe times greater.

FIG. 9 shows an improved circuit of the low-pass filter shown in FIG. 4. This circuit also comprises a cascode arrangement of the transistors Q.sub.5 and Q.sub.21, and the output impedance is increased to h.sub.fe times the output resistance r.sub.e of the transistor Q.sub.21.

FIG. 10 shows an improved circuit of the high-pass filter shown in FIG. 5. This circuit also comprises a cascode arrangement of the transistors Q.sub.5 and Q.sub.21.

FIG. 11 shows an improved circuit of the phase shifter shown in FIG. 6. This circuit also comprises a cascode arrangement of the transistors Q.sub.5 and Q.sub.21.

FIGS. 12 and 13 show examples of the application of the low-pass filters shown in FIGS. 4 and 9. Referring to FIG. 12, the circuit comprises two units of the circuit shown in FIG. 4. In FIG. 13, the circuit comprises two units of the circuit shown in FIG. 9. In FIG. 12, a first low-pass filter is composed of transistors Q.sub.101, Q.sub.102, Q.sub.103, Q.sub.104, Q.sub.105, Q.sub.110, Q.sub.111, Q.sub.112 and Q.sub.113, current sources A.sub.101 and A.sub.103, resistors R.sub.101 and R.sub.102, and a capacitor C.sub.100, while a second low-pass filter is composed of transistors Q.sub.201, Q.sub.202, Q.sub.203, Q.sub.204, Q.sub.205, Q.sub.210, Q.sub.211, Q.sub.212, and Q.sub.213, current sources A.sub.201 and A.sub.203, resistors R.sub.201 and R.sub.202, and a capacitor C.sub.200. In FIG. 13, additional transistors Q.sub.121 and Q.sub.221 are provided in the first and second low-pass filters, respectively. In FIGS. 12 and 13, the current division ratio K between the transistors Q.sub.103 and Q.sub.104 and between the transistors Q.sub.203 and Q.sub.204 is controlled by the control voltage applied to the terminal T.sub.8, and a bias voltage V.sub.B5 is applied to the terminal T.sub.3.

FIG. 14 shows a typical block diagram of the circuits shown in FIGS. 12 and 13. Referring to FIG. 14, an input terminal T.sub.11 is connected to index circuits 51, 52 and 53, the outputs of which are connected to arithmetic circuits 54, 55 and 56, respectively. An integrator 100 is connected between the arithmetic circuits 54 and 55, and an integrator 200 is connected between the arithmetic circuits 55 and 56. The arithmetic circuits 54, 55 and 56 are connected to an output terminal T.sub.12. The transfer function H.sub.5 (S) of the circuit shown in FIG. 14 is given by ##EQU11## where G.sub.1 and G.sub.2 are integral gains of the integrators 100 and 200, respectively, and c, b and a are factors of the index circuits 51, 52 and 53. The circuit shown in FIG. 14 functions as a low-pass, high-pass or bandpass filter according to the values of the factors a, b and c.

In the circuits shown in FIGS. 12 and 13, the integrators 100 and 200 comprise the first and second low-pass filters, respectively. The factors fo the index circuits 51, 52 and 53 are selected to be a=0, b=0 and c=1. Therefore, the transfer function of the circuits shown in FIGS. 12 and 13 is given by ##EQU12## which is derived from the formula (13). The circuits shown in FIGS. 12 and 13 have low-pass characteristics of the second order. In the folmula (14), R.sub.E1 is the resistance of the resistors R.sub.101 and R.sub.102, and R.sub.E2 is the resistance of the resistors R.sub.201 and R.sub.202. The transistor Q.sub.9 compensates for the base current to assure the current mirror operation of the transistor Q.sub.6.

As described above, this invention provides an amplifier suitable for use as an acrive filter such as a low-pass filter, high-pass filter or phase shifter, which can be easily formed as part of an integrated circuit.