Reference Voltage Circuit

The present invention relates to a reference voltage circuit, and more particularly relates to a reference voltage circuit suitable for stabilization of a reference output voltage against variations in power source as well as in current amplification factor (h.sub.FE) of transistors.

Heretofore, a band gap reference voltage circuit is known as a circuit for obtaining a stabilized reference voltage having a small temperature coefficient (reference is made to a book entitled "Shuseki Kailo Kogaku (2) (Integrated Circuit Engineering (2))", by Nagata & Yanai, published by Corona Co., pages 23 and 24). The circuit is shown in FIG. 1.

In FIG. 1, the reference voltage circuit comprises transistors 1 to 3, resistors 4 to 6, and a constant-current power source 7. The resistors 4 and 6 and the transistors 1 and 2 constitute a constant-current circuit which determines a current I.sub.2 flowing in the resistor 5. An output voltage V.sub.0 at an output terminal 100 is the sum of a potential difference V.sub.BE3 between the base and the emitter of the NPN transistor 3 and a terminal voltage across the resistor 5. Because the potential difference V.sub.BE3 has a negative temperature coefficient while the terminal voltage across the resistor 5 has a positive temperature coefficient, the resistor 5 can be suitably adjusted to make the whole temperature coefficient zero. If the current flowing in the resistor 4, the current flowing in the resistor 5, the resistance value of the resistor 5, and the resistance value of the resistor 6 are represented by I.sub.1, I.sub.2, R.sub.5, and R.sub.6, respectively, the output voltage V.sub.0 is expressed by the equation: ##EQU1## in which k represents Boltzmann constant, and q represents the quantity of electric charge of an electron.

In the conventional circuit, the NPN transistor 3 of FIG. 1 performs a function of stabilizing the output voltage. The transistor 3 operates to absorb variations of the circuit current caused by the factors, such as variations in power source (that is, variations of the output current of the constant-current power source 7), variations in load connected to the output, and the like, to thereby keep the currents I.sub.1, I.sub.2 and the like constant.

The output current I.sub.CC of the constant-current power source 7 is the sum of the current I.sub.1 flowing in the resistor 4, the current I.sub.2 flowing in the resistor 5, and the collector current I.sub.C3 of the NPN transistor 3 (the current I.sub.2 being the sum of the collector current I'.sub.2 of the NPN transistor 2 and the base current I.sub.B3 of the NPN transistor 3). In order to keep the output voltage V.sub.0 constant regardless of the change of output current I.sub.CC, current I.sub.1 should be constant or in other words current I'.sub.2 should be constant. Accordingly, the variations of the output current I.sub.CC should be reflected mainly in the collector current I.sub.C3 of the NPN transistor 3. The constant-current circuit composed of the resistors 4 and 6 and the transistor 1 and 2 has high impedance in the region of current larger than the collector current I'.sub.2 of the NPN transistor 2, so that when viewed from the constant-current power source 7, the resistor 5 and the base-emitter of the NPN transistor 3 are in the form of a series connection. Accordingly, the variations of the output current I.sub.CC cause variations of the base current I.sub.B3 of the NPN transistor 3, and hence, variations of the collector current I.sub.C3 which is the product of the base current I.sub.B3 and the current amplification factor h.sub.FE. In short, the variations in the constant-current power source 7 or the like are absorbed by the NPN transistor 3.

However, in fact, the current amplification factor h.sub.FE of the NPN transistor 3 has a finite value, and if the collector current of the NPN transistor 3 changes, the base current of the same changes corresponding to the value of the current amplification factor h.sub.FE. Because the current I.sub.2 flowing in the resistor 5 is equal to the sum of the collector current of the NPN transistor 2 and the base current of the NPN transitor 3, the current I.sub.2 changes if the base current of the NPN transistor 3 changes. If the current I2 changes, the temperature coefficient of the terminal voltage across the resistor 5 changes, so that the temperature coefficient of the output voltage V.sub.0 is not kept zero to thereby exert an influence on the output voltage.

In the following, an example of variations of the current I.sub.2 is described.

Assuming that the values of the resistor 5, the current amplification factor h.sub.FE of the NPN transistor 3, the base-emitter voltage V.sub.BE3 of the NPN transitor 3, and output voltage V.sub.0 are 6 k.OMEGA., 100, 0.7 V, and 1.2 V, respectivley, then the current I.sub.2 takes the value of about 833 .mu.A from the following equation.

If a current variation of 1 mA is applied under this condition, the variation .DELTA.I.sub.2 of the base current I.sub.2 of the NPN transistor 3 takes the value of 10 .mu.A from the following equation.

Accordingly, the variation in the terminal voltage across the resistor 5 takes the value: 6 k.OMEGA..times.10 .mu.A=60 mV, or in other words the terminal voltage across the resistor 5 changes by 5% with respect to output voltage V.sub.0 =1.2 V.

Although description has been made as to variations in output due to variations in power source as well as due to variations in load, it is to be understood that variations in output depend on the fact that the current amplification factor h.sub.FE of the NPN transistor used for stabilization of output is limited. Accordingly, variations in output voltage are not avoidable also in the case where the current amplification factor h.sub.FE changes.

An object of the present invention is to provide a stabilized reference voltage circuit in which variations in output voltage due to variations in power source, in load, in current amplification factor (h.sub.FE) of transistor, and the like, are reduced to thereby stabilize the output reference voltage.

Another object of the present invention is to provide a reference voltage circuit which is simplified in arrangement by replacing a conventional constant-current power source by a low-stabilized DC power source.

In order to attain the foregoing objects, the reference voltage circuit according to one aspect of the present invention comprises: a DC power source; a first resistor having one end connected to a high-potential side terminal of the DC power source; a second resistor having one end connected to the high-potential side terminal; a first NPN transistor having a base, a collector connected to the base and to the other end of the first resistor, and an emitter connected to a low-potential side terminal of the DC power source; a second NPN transistor having a collector connected to the other end of the second resistor, a base connected to the collector of the first NPN transistor, and an emitter; a third resistor connected between the emitter of the second NPN transistor and the low-potential side terminal of the DC power source; a third NPN transistor having a base connected to the collector of the second NPN transistor, an emitter connected to the low-potential side terminal, and a collector; a fourth resistor having one end connected to the high-potential side terminal, and the other end connected to the collector of the third NPN transistor; and a PNP transistor having a base connected to the collector of the third NPN transistor, an emitter connected to the high-potential side terminal, and a collector connected to the low-potential side terminal. The high-potential side terminal or the low-potential side terminal forms an output terminal of the reference voltage circuit.

Being multiplied by the current amplification factor h.sub.FE of the PNP transistor, the current amplification factor h.sub.FE of the third NPN transistor can be greatly enlarged so as to reduce variations in base current of the third NPN transistor. The fourth resistor connected to the collector of the third NPN transistor supplies the collector currrent for the third NPN transistor at all times to thereby compensate the variations in base current of the PNP transistor so as to stabilize the operation of the third NPN transistor.

FIG. 1 is a wiring diagram showing a conventional reference voltage circuit;

FIG. 2 is a wiring diagram showing an embodiment of the reference voltage circuit according to the present invention;

FIG. 3 is a wiring diagram showing another embodiment of the reference voltage circuit according to the present invention;

FIG. 4 is a wiring diagram showing a further embodiment of the reference voltage circuit according to the present invention; and

FIGS. 5 and 6 are wiring diagrams respectively showing further embodiments of the reference voltage circuits according to the present invention.

An embodiment of the present invention will be described in detail with reference to FIG. 2.

In FIG. 2, the respective one ends of resistors 4, 5, 8 and 10 are commonly connected to an output terminal 100, and the other end of the resistor 10 is connected to a high-potential side terminal of a constant-voltage DC power source 11. A low-potential side terminal of the DC power source 11 is grounded. The resistor 10 and the DC power source 11 constitute a constant-current power source in which A represents the high-potential side terminal, and B represents the low-potential side terminal. The high-potential side terminal A is equal in electric potential to the output terminal, and the low-potential side terminal is equal in electric potential to the ground (GND). The other end of the resistor 4 is connected to the collector of an NPN transistor 1 with its base and collector short-circuited and connected to the base of an NPN transistor 2. The emitter of the NPN transistor 1 is directly connected to the GND, and the emitter of the NPN transistor 2 is connected to the GND through a resistor 6. The other end of the resistor 5 is connected to both the collector of the NPN transitor 2 and the base of an NPN transistor 3 with its emitter grounded. The other end of the resistor 8 is connected to both the collector of the NPN transistor 3 and the base of a PNP transistor 9 with its emitter and collector respectively connected to the output terminal 100 and the GND.

The output voltage V.sub.0 is the sum of the potential difference V.sub.BE3 between the base and the emitter of the NPN transistor 3 and the terminal voltage across the resistor 5 in the same manner as in the case of the conventional circuit of FIG. 1. That is, the output voltage is expressed by the equation (1).

In this embodiment, variations in circuit current due to variations in power source as well as in load are almost absorbed by the PNP transitor 9. Both the base current of the PNP transistor 9 and the current from the resistor 8 flow in the NPN transitor 3. By establishing the resistor 8 so that a current sufficiently larger than the base current of the PNP transistor 9 can flow in the resistor 8, it is possible to make the variations in the base current of the PNP transistor 9 hardly exert an influence onto the collector current or base current of the NPN transistor 3. In the following, an example of actual numerical values is shown.

Assuming that the resistance value of the resistor 5 is 6 k.OMEGA. similarly to the conventional case, that the current amplification factor h.sub.FE and the base-emitter potential difference V.sub.BE in each of the NPN transistor 3 and the PNP transistor 9 are 100 and 0.7 V, respectively, and that the collector current of the NPN transitor 3 is 200 .mu.A, then the resistor 8 takes the value: 0.7 V/200 .mu.A=3.5 k.OMEGA.. If the variation in current of 1 mA is applied in the same manner as in the conventional case, the variation in base current .DELTA.I.sub.BP of the PNP transistor 9 takes the value of 10 .mu.A from the following equation.

Accordingly, the collector current of the NPN transistor 3 takes the value of 200 .mu.A.+-.10 .mu.A, and the base current I.sub.BN takes the value of 2 .mu.A.+-.0.1 .mu.A from the following equation.

Accordingly, the variation in base current is 0.1 .mu.A. The variation in base current causes the variation of the current I.sub.2 flowing in the resistor 5. Accordingly, the variation in terminal voltage across the resistor 5 takes the value 6 k.OMEGA..times.0.1 .mu.A=0.6 mV, or in other words the terminal voltage across the resistor 5 changes by 0.05% with respect to the output voltage V.sub.0 (which is assumed to be 1.2 V as stated previously in the conventional case). It is to be understood that the variation of the terminal voltage is reduced to 1/100 in comparison with the conventional case.

FIG. 2 shows the case where the constant-current power source 7 in the conventional circuit of FIG. 1 is replaced by a DC power source 11 and a resistor 10. This is because the necessity of stabilization of the current fed from the constant-current power source becomes little owing to the reduction of variations in output voltage change with respect to the variations in current as described above, so that simplification of the circuit can be obtained.

Although the variations in current supplied for the circuit has been described above, this embodiment has also an excellent characteristic with respect to variations in transitor current amplification factor h.sub.FE. That is, because the current amplification factor h.sub.FE of the NPN transistor 3 is apparently multiplied by the current amplification factor h.sub.FE of the PNP transistor 9 and because the variations in collector curren of the NPN transistor 3 can be suppressed against the variations in current amplification factor h.sub.FE of the PNP transistor 9 by the resistor 8 provided to supply the NPN transistor 3 with its collector current which is so small that the variations in base current of the PNP transistor 9 can be neglected, it is possible to make the influence on the base current of the NPN transistor 3 very small. By properly establishing the collector current owing to the resistor 8, the variations in base current of the NPN transistor 3 can be suppressed regardless of both the power source and the load to thereby obtain a stabilized output voltage. However, according to the conventional circuit, the collector current cannot be established to the optimum value by the inside factors in the reference voltage circuit, because the collector current of the NPN transistor 3 is determined by external factors such as a power source, a load and the like.

FIGS. 3 and 4 respectively show other embodiments according to the present invention.

Referring to FIG. 3, there is shown an embodiment in which resistors 12 and 13 are provided between the output terminal 100 of FIG. 2 and the GND, and a further output terminal 200 is led out from the junction point between the resistors 12 and 13.

In FIG. 3, the output voltage V.sub.0a is expressed by the equation: ##EQU2## in which R.sub.12 and R.sub.13 represent the resistance values of the resistors 12 and 13. The output voltage V.sub.0a can be suitably established within a range of from 0 V to V.sub.0. Because the accuracy of the output V.sub.0a is determined by the relative accuracy of the resistors 12 and 13, considerably good accuracy can be expected under the use of semiconductor devices.

FIG. 4 shows the case where there is further provided an NPN transistor 14 having a base connected to the output terminal 200 and an emitter grounded. A detecting circuit 15 is arranged to detect the ON-state of the NPN transistor 14 to perform a given operation.

According to FIG. 4, a temperature detecting circuit can be realized. In the following, the circuit is described more in detail.

It is apparent from the prior art that the temperature coefficient of the output voltages V.sub.0 and V.sub.0a in FIGS. 2 and 3 can be designed to be nearly zero.

In the equation (1), the first term V.sub.BE3 of the right member has a negative temperature coefficient. Accordingly, if the values of I.sub.1 and I.sub.2 are established so that the second term of the right member is positive, the temperature coefficient of the output voltage V.sub.0 can be zero for the resistance value of the resistor R.sub.5 suitably selected to match the temperature coefficient of the V.sub.BE3 (a resistor having a positive temperature coefficient).

The output voltage V.sub.0a is a division of the output voltage V.sub.0 obtained through a resistance type voltage divider composed of the resistors R.sub.12 and R.sub.13 . Accordingly, if the resistors 12 and 13 are selected to have the same resistance value, the output voltage V.sub.0a has the same temperature coefficient as that of the output voltage V.sub.0. If the resistors 12 and 13 are selected to have different values, the output voltage V.sub.0a has a certain temperature coefficient even though the temperature coefficient of the output voltage V.sub.0 is zero. (Even though the resistors 12 and 13 are equal in temperature coefficient, the relative rate thereof changes depending on the temperature.) In this case, the output voltage V.sub.0 may be suitably selected to have a certain temperature coefficient by properly selecting the resistance value of the resistor 5 so as to match with the temperature coefficient with respect to the relative ratio of the resistors 12 and 13.

Accordingly, it is possible that the base voltage of the NPN transistor 14 in FIG. 4 is biased to a constant voltage without depending on the temperature. On the other hand, the potential difference V.sub.BE between the base and emitter of the NPN transistor 14 has a negative temperature coefficient and is reduced in the rate of about -2 mV/.degree.C. with the rise of temperature. Accordingly, if the output voltage V.sub.0a is set to a value a little lower than the base-emitter potential difference V.sub.BE so as to prevent the NPN transistor 14 from operating at a low temperature, the NPN transistor 14 can be operated at the point in time when the temperature rises so that base-emitter potential difference V.sub.BE is reduced to a value lower than the output voltage V.sub.0a. The setting of temperature for causing the NPN transistor 14 to operate can be adjusted by the value of the output voltage V.sub.0a, that is, the setting values of the respective resistors 12 and 13. According to the circuit, the junction temperature of semiconductor devices can be detected, and the circuit is applicable to the protection of semiconductor devices from overheating or the like.

FIGS. 5 and 6 show modifications of the embodiments of FIGS. 2 and 4. In each of the modifications, the position of the power source 11 is reversed but the direction of current is the same as that in each of FIGS. 2 and 4. The operation in each of the modifications is made in the same manner as in each of FIGS. 2 and 4 except that the output voltage has a negative value.

According to the present invention, it is possible to easily obtain a reference voltage circuit in which variations in output voltage due to variations in power source, as well as in transistor current amplification factor h.sub.FE are reduced to thereby stabilize the output reference voltage. Accordingly, the reference voltage circuit can be widely used for various industrial purposes, such as reference voltage sources for semiconductor integrated circuits, thermal shut-down circuits in dot printer driver ICs, and the like.