Pressure Measuring System With Internal Reference

The present invention relates to a pressure measurement system and, in particular, to a pressure measurement system which incorporates sensing and reference capacitor networks energized by an external source and a feedback loop to generate oppositely-phased signals which are summed to produce an error signal representative of the difference therebetween. The error signal is demodulated and digitally processed through the feedback loop to null the error signal and generate a digital signal representative of pressure.

Pressure measuring systems incorporating this basic configuration are disclosed in U.S. Pat. No. 4,322,977 entitled, "Pressure Measuring System" to Robert C. Sell, John R. Sheler and John M. Juhasz, and U.S. Pat. No. 4,449,409, to Frank J. Antonazzi, and other patents referenced therein. These patents are assigned to the assignee of this invention. Characteristically, this general type of pressure measuring system is rugged and provides for pressure measurement to a high degree of accuracy. Such systems find broad application in such rigorous environments as fuel control systems for gas turbine engines. In such applications, it is common for the pressure sensors, a central processing unit, power supplies and the like to be located in various parts of an aircraft. From the above-referenced United States patents it will further be seen that these systems incorporate a phase sensitive demodulator to receive, demodulate and amplify the error signal subsequently used to generate a nulling signal and provide a digital indication of pressure. Because the demodulator is phase sensitive, any phase shift between the error signal and the excitation source utilized for the phase sensitive demodulator resulting from variations in wiring from system to system can cause variation in the pressure measurement and careful matching of units becomes necessary when units are interchanged. Accordingly, it is desirable to provide a pressure measuring system in which this problem is eliminated.

Broadly, the present invention is a pressure measuring system which includes at least one pressure sensitive capacitor and a reference capacitor. The pressure sensitive capacitor is connected to a source of excitation voltage and the reference capacitor is excited by an oppositely phased signal from a feedback loop. The output signals from the two capacitors are summed to produce an error signal which is demodulated by a phase sensitive demodulator to generate a signal which is applied to a digital computing circuit to generate the feedback signal applied to the reference capacitor. Simultaneously, the digital circuit generates a digital number or value corresponding to the feedback signal required to null the capacitance circuit and, correspondingly, a signal which corresponds to pressure. The circuit is characterized in that it includes a phase sensitive demodulator reference voltage source which generates a source signal for the phase sensitive demodulator precisely in phase with the capacitor excitation signal. The phase sensitive demodulator excitation source is located adjacent to the phase sensitive demodulator. This reduces wire requirements between the central processor and transducer module. This in turn assures phase coherence and interchangeability of the pressure transducer modules without special matching.

It is therefore an object of the invention to provide an improved pressure measurement system.

It is another object of the invention to provide such a system in which the effect of a phaser difference in the excitation signals for the pressure sensing capacitor(s) and phase sensitive demodulator is eliminated.

Still another object of the invention is to provide a phase shift demodulator circuit for use in a pressure measurement system wherein the excitation signal for the phase sensitive demodulator is derived directly from the input to the pressure sensing capacitor.

These and other objects of the invention will be best understood in reference to the following description taken in conjunction with the attached drawings wherein:

FIG. 1 is a circuit block diagram of a pressure measurement system incorporating the present invention;

FIG. 2 is a chart showing the phase relationship of various signals in the circuit and useful in explaining the invention; and

FIG. 3 is a simplified schematic diagram of the phase sensitive demodulator .

Referring now to FIG. 1, there is shown a pressure measuring system which includes, in the illustrated embodiment, a network of four capacitors 10. The invention is, however, equally applicable to other capacitor configurations and the four capacitor network is presented here only by way of example. This network of capacitors includes a primary sensing capacitor 12 associated with a substantially invariable reference capacitor 14, a feedback capacitor 16, and a substantially invariable feedback reference capacitor 18. An external source of excitation 20 applies an alternating current excitation via a conductor 22 to a buffer amplifier 24. The output from the buffer amplifier 24 is applied directly to capacitor 12 and is simultaneously converted by inverter 26 and applied to one terminal of the capacitor 14. The output from capacitors 12 and 14 at terminal 28 will be an alternating current signal i.sub.s that is a function of the difference between the values of the sense capacitor 12 and reference capacitor 14.

Simultaneously, a feedback excitation signal of variable magnitude is applied to a feedback capacitor 16 and through an inverter 30 to a feedback reference capacitor 18 to generate a second output current i.sub.f at terminal 32 determined by the difference in value between capacitors 16 and 18 and the magnitude of the feedback excitation. The signals appearing at terminals 28, 32 are applied to a summing junction 34, the output of which is a signal equal to the difference between the signals i.sub.s and i.sub.f at terminals 28, 32.

In a manner more fully described in U.S. Pat. No. 4,449,409, and other patents referenced therein this signal is fed through a phase sensitive demodulator 36 to produce the error signal i.sub.e. This signal i.sub.e is then passed via amplifier and filter circuit 38, an analog to digital converter 40, and a multi-conductor bus 42, to a central processing unit or computer 44. The computer 44 in turn generates a digital output signal denominated N which is an accumulative value that is a function of the magnitude of the feedback signal required to null the signal from capacitors 12, 14. This value is passed, again by a multiconductor bus 46, to a multiplying digital to analogue converter 48 which outputs the analog feedback signal i.sub.f utilized as excitation for the capacitors 16, 18. From the above-referenced patents, it will be recognized that the feedback signal is incremented to generate a feedback signal of magnitude to precisely null the output from the summing junction 34. The circuit effectively functions as a capacitance bridge to provide a digital output from the computer 44 based representative of the pressure being applied to the sense capacitor 12.

In the illustrated embodiment, the capacitors 12, 14, 16 and 18 are incorporated in a single quartz capsule having exceptional stability and repeatability. While the capsule has been illustrated as containing four capacitors, the circuit can be produced utilizing two, three, or four capacitors, again, as explained more fully in the above-referenced United States patents.

With reference now to FIGS. 2 and 3, the operation of the phase sensitive demodulator 36 is explained in more detail. The phase sensitive demodulator, as best seen in FIG. 3, is essentially a two pole switch 50 in which the poles are alternately opened and closed in response to an external excitation signal herein excitation e.sub..phi. as indicated at A and B in FIG. 2. The summed signal from junction signal 34 is applied directly to one of the switch poles 52 and simultaneously is passed through an inverter to the other of the poles 54. The resultant output signals passed by each of the poles 52, 54, are illustrated as i.sub.1 and i.sub.2 in FIG. 2. These signals are then summed to produce the output signal i.sub.e as shown. This summation result occurs when the excitation source e.sub..phi. is precisely in phase with the error signal i.sub.e as shown in FIG. 2. If, however, there is a difference in the phase between the excitation voltage e.sub..phi. and the signals from junction 34, the switch polls 52, 54, will be conductive as indicated at C and D in FIG. 2. These conductive states will coincide with signals i.sub.1 and i.sub.2 as indicated by the shaded areas in charts i.sub.1 and i.sub.2 producing the output signal denominated ie.sub.2 in FIG. 2. It will now be apparent that even a small amount of phase shift between the error signal and demodulator excitation signal will produce a significant variation in the magnitude of the error signal. Since this error signal is, in turn, utilized to generate the feedback signal, i.sub.f and as the basis for measurement of pressure, any phase error will produce a corresponding error in the pressure measurement. It will now be seen that providing precise phase coherence between the excitation signal e.sub..phi. and the excitation signal for capacitors 12, 14 is necessary for high precision pressure measurement. In accordance with the present invention, the excitation signal for the phase sensitive demodulator 36 is generated internally on the circuit board containing the pressure capsule 10. This provides an internal reference signal for the phase sensitive demodulator precisely in phase with the capacitor excitation signal. Any remaining phase differential is corrected during calibration of the units. This assures transducer module interchangeability and eliminates the external excitation source 20 formerly used for this purpose.

The phase sensitive demodulator excitation signal is generated by tapping the capacitor excitation signal at the point of application thereof to the pressure capsule at terminal 60. The signal is passed through a load resistor and voltage regulating zener diode network 62, 64. The output from this circuit is applied directly to the phase sensitive demodulator 36 and simultaneously passed through a buffer amplifier 66 appropriately configured by resistors 68 and 70 to provide an oppositely phased reference phase demodulator signal applied to input terminal 72. The output from the phase sensitive demodulator 36 is amplified and filtered by circuit 74 and passed to the analog to digital converter 40 as described in the above-referenced United States patents. Typically, the circuit will further include a temperature compensation device 78, the output of which is also multiplexed to an external remotely located central processing unit 44.

By providing a phase demodulator excitation source located internally on the circuit board adjacent the sensing capacitors, phase variation caused by inter-module wiring is eliminated and interchangeability of modules is assured.

Although the present invention has been illustrated and described in connection with example embodiments, it will be understood that this is illustrative of the invention, and is by no means restrictive, thereof. It is reasonable to be expected that those skilled in the art can make numerous revisions and additions to the invention and it is intended that such revisions and additions will be included in the scope of the following claims as equivalents of the invention.