Frequency Measurement Circuit

This invention relates to a circuit for measuring the frequency of a signal, and in particular to a circuit that rejects noise and spurious signals while accepting valid signals for frequency measurements.

In systems that employ circuits to compensate for timing errors present in a processed signal, the presence of noise, spurious input signals, missing signals or other signal condition anomalies adversely affects the performance of the compensation circuit. One undesirable result is that systems relying on such compensation circuits take a relatively long time, over many periods of the input signal, to recover to normal operating conditions following the occurrence of a signal anomaly. Also, in order to determine the frequency of the incoming pulse signal it is common to count the number of pulses or transitions that occur within a predetermined period. In such systems, it takes a relatively long time to determine the frequency, whereupon frequency and phase compensation and thus timing stability are unduly delayed to the detriment of the system operation. Therefore it would be desirable to reject rapidly those signal anomalies such as noise, and to accept rapidly only those signals which are within defined parameters and, therefore, considered valid.

The invention overcomes the disadvantage of previous mention by providing a circuit for rapidly and continuously measuring the frequency of a signal which may contain noise. The circuit incorporates a frequency measuring circuit, and an averaging circuit that continually averages previous frequency measurements over a long term. The difference in frequency between the averaged value and the current frequency measurement provides an error signal. The error signal is compared to a threshold value to determine whether a signal is to be accepted as valid or rejected as noise. The threshold is adjusted for each period defined by two adjacent pulses by incrementing by one count when an existing error is found to be greater than the threshold value. If the existing error is less than the threshold then the threshold value is decremented. Thus the threshold automatically is adjusted for successive periods between adjacent pulses, which enables a rapid and accurate determination for qualifying valid pulses.

The circuit is particularly useful in a time base correction system for a video tape signal processing apparatus when the system senses that the frequency of the tape clock is characterized by a large error.

The invention is described with reference to the drawing in which the sole FIG. is a schematic block diagram of an implementation of the invention.

With reference to the drawing, an input pulse signal having an unknown frequency is applied to a counter 10 which is under control of a fixed frequency clock on a line 12. The fixed frequency clock operates at a relatively high frequency such as 10 MHz, by way of example, and affords high resolution operation of the system. For purpose of explanation, the input pulse signal used in this description is a horizontal sync pulse derived from a recorded video tape, generally having a frequency in the range of 15.75 KHz.

In operation, the counter 10 is cleared by a first narrow horizontal sync pulse to provide the counter at an all zero state. The counter 10 counts from the first horizontal sync pulse that it senses to the following second horizontal sync pulse, whereupon the accumulated count is loaded into a register 14. The count is reset by the leading edge of each horizontal sync pulse and counts up for each period between the pulses. The count number represents the period measured in clock cycles between adjacent horizontal sync pulses. The register provides a binary number output which is proportional to the period between the leading edges of the input pulses. This binary number is fed to a programmed read only memory (PROM) 16 which includes a lookup table providing a 1/X function for generating a measured frequency signal that is inversely related to the measured period signal obtained at the output of the register 14.

The measured frequency, which by this simplified circuitry is rapidly obtained from the measured period, is applied to a subtractor 18 at the input stage of an error threshold channel. The subtractor 18 also receives a filtered frequency measurement signal from the output of an averaging filter channel, as described hereinafter, which provides a signal to the subtractor representing the average of a series of successive frequency measurements. The output from the subtractor 18 is processed by an absolute value circuit 20 to produce an absolute binary signal representing the error between the measured frequency from the PROM 16 and the filtered average frequency measurement from the channel which performs an averaging of the measured frequencies. The error signal is applied to a comparator 22 which forms a feedback loop with a counter 24 for generating a variable threshold, in accordance with this invention. The counter 24 is clocked by the clock on line 12 of previous mention. The threshold varies in accordance with the absolute values of the error signal received from the absolute value circuit 20.

For each measurement of the signal frequency, the counter 24 counts up or down depending upon the value of the error. If the error is greater than the existing threshold, the signal is rejected and the threshold value is incremented by a one count unit. Conversely, if the error of the measured frequency is less than the existing threshold, the counter is decremented to decrease the level of the threshold. Thus the feedback circuit tolerates errors of lower value and rejects those above the newly created threshold. Since the increment or decrement of the threshold is accomplished by one unit for each error sensed, the circuit effectively responds in gradual steps to change the threshold linearly, whereby the circuit is not over-responsive.

In order to obtain a frequency value for comparison in the comparator 22, the averaging filter channel is employed to provide a filtered frequency measurement so that noise signals are not introduced into the circuit for establishing the proper threshold. When the error signal sensed from the comparator is less than the threshold, a low logic signal is provided to an AND gate 26 which also receives a low signal from the horizontal input pulse. Therefore, when the error signal is below the threshold level, the AND logic circuit 26 provides a signal to register 30, which is under control of the clock on the line 12. The averaging filter channel, which receives the measured frequency, includes a constant multiplier 28 that acts as a filter and provides a fraction, for example 1/16th, of the current measured frequency signal obtained from the PROM 16. The filter channel also includes a 1-K constant multiplier 32 which provides a signal, in this example, of 15/16ths of the filtered and measured signal received from the register 30. The multipliers 28 and 32 provide their outputs to an adder 34 which replaces the previous value of the measured frequency signal with the current value of the measured frequency signal and applies the latter to the register 30. When the logic signal from AND gate 26 to register 30 goes low, new frequency data is loaded and passed to the adder 18 for processing through the error threshold channel to provide adjustment of the threshold. The new frequency data is circulated through the 1-K constant multiplier 32 and back to the adder 34 to weight and reinforce the new frequency data.

By way of example only, the new filtered frequency measurement signal is utilized for the timing circuits of a time base correction system, depicted by the block and numeral 36, to aid in coarse corrections of frequency of an off-tape related clock. When the system senses that the frequency of the tape clock is characterized by a large error, the magnitude of the error is determined by comparing a primary frequency control word and a secondary frequency control word in a pair of comparators (not shown) of the system. When the error exceeds a given value, .+-.5% for example, the frequency measurement circuit of this invention is automatically switched in to effectuate rapid frequency lock prior to time base correction.

There has been described herein a frequency measuring circuit with adaptive noise rejection capability, particularly applicable for measuring the frequency associated with horizontal sync pulses in the presence of noise, which herein are derived from a recorded TV signal. The novel circuit of this invention rejects spurious frequency measurements by comparing them to a long term average of previous frequency measurements. Only those measurements within a specified error and less than the current threshold are accepted to update the average. The threshold is adjusted for each period to minimize the number of erroneous measurements which are accepted as valid. As a result, noise is effectively removed from the frequency signal being processed, and the signal is then passed to a utilization apparatus, such as a time base correction system, for further processing.