High Temperature Hetero-Epitaxial Pressure Sensor

The field of the invention is piezoresistive pressure sensors.

Prior art silicon piezoresistive pressure sensors are made by etching thin diaphragms into the monocrystalline silicon. Piezoresistors are implanted into the silicon and because of the large piezoresistive effect in the silicon a good pressure sensor results. Such sensors have proven to be excellent low cost, high performance devices and are completely satisfactory where operating temperatures remain no higher than about 150.degree. C. One example of the prior art is the disclosure of U.S. Pat. No. 4,054,497.

In certain applications of piezoresistive sensors operating temperatures will be in the range above 150.degree. C., for example up to about 200.degree.-250.degree. C. The silicon device cannot operate at these elevated temperatures because the transducer performance degrades due to the limitations caused by the approximately 1 eV bandgap of silicon.

In the present invention to achieve higher temperatures, an epitaxial layer of GaAs is grown on a single crystal silicon structure and resistors are implanted into the GaAs layer. In this way the excellent mechanical properties of silicon as well as the chemical inertness of the Si/SiO2 surface is retained on the inside of the diaphragm while the piezoresistive sensing elements are formed in the larger bandgap semiconductor layer on the reverse side of the diaphragm which allow higher temperature operation.

FIGS. 1, 2 and 3 are sectional views of the present invention in successive stages of fabrication. These sensor transducers may be batch fabricated over the entire surface of a wafer as shown in FIG. 3.

The use of the piezoresistive effect in silicon as the transducer basis for a pressure sensor is well known and such pressure sensors are widely used. Typically p-type conductivity resistor regions are formed in an n-type conductivity silicon layer so that the p-type regions become pn junction isolated resistors. By adding contacts and measuring the resistance between the contacts while pressure is applied to the diaphragm, the pressure or stress can be determined due to the piezoresistive effect.

Referring now to FIGS. 1-3, not drawn to scale, it may be seen that a monocrystalline silicon substrate 10 is provided that has a thin film layer of a wide-bandgap semiconductor 11 epitaxially grown on the silicon. For one implementation, the orientation of the silicon wafer plane is in or near the <100> direction. This wide bandgap semiconductor may be, for example, n-type or semi-insulating GaAs or AlAs or AlGaAs. These wide-bandgap semiconductors in their epitaxial single crystal form exhibit large (large means piezoresistive coefficient >50.times.10.sup.-12 cm.sup.2 /dyne) piezoresistive effects when doped with p-type impurities in a manner similar to silicon. The thickness of the layer 11 may be, by way of example, about 1-2 microns. Using photolithography, p-type piezoresistors 12 and 13 are formed in the GaAs film 11 by diffusion or ion implantation and are oriented to be parallel or perpendicular to the <110> direction and form a 4-arm bridge in a manner analogous to silicon sensors. The ion implantation may be by way of example, to a depth of about 1/2-1 micron and with a concentration of doping level in a range of about 10.sup.17 to 5.times.10.sup.19 atoms/cc. The implant source is preferably of beryllium, but other p-type impurities can be used. Low resistance ohmic electrical contacts 14 and 15 are made to these resistors 12 and 13 as shown in FIG. 2. While a single device is shown in FIGS. 1 and 2, the devices are preferably batch fabricated over the entire surface of a wafer as suggested in FIG. 3. Other crystallographic planes are also possible providing that high quality epitaxial layers can be formed on the silicon and the piezoresistors are oriented in crystallographic directions exhibiting large piezoresistance effects.

The silicon wafer 10 is then masked and etched to form a cup-like structure 20 with a diaphragm area 21 in this preferred embodiment, as shown in FIG. 3. Conventional isotropic or anisotropic etchants for silicon may be used. The resistors 12 and 13 are located in the remaining diaphragm area 21 at the base of the etched cup-like structure. The diaphragm remaining may be about 20 microns in thickness and includes the remaining silicon and the GaAs layer 11. The final thickness is determined by the pressure range over which the pressure sensor is designed to operate. Currently used processes for controlling the thickness of the silicon diaphragm can be utilized. Finally the sensor is connected to a pressure tube and packaged using conventional silicon pressure sensor processes.

A second embodiment for forming high temperature heterostructure pressure sensors is similar to the first but an etch is made entirely through the silicon 10 so that the pressure sensing diaphragm is the large bandgap semiconductor layer 11 and the thickness of the diaphragm is determined by the epitaxial layer thickness.

Any large bandgap semiconductor which has a suitable energy band structure to exhibit large piezo-resistance effects and which can be grown on silicon in a good quality heteroepitaxial layer can be used in these devices. Examples in addition to p-type GaAs (1.4 eV bandgap) include p-type Al.sub.x Ga.sub.1-x As alloys and n or p-type AlAs which are lattice matched to GaAs and allow bandgaps up to 2.1 eV and .beta.-SiC which has a bandgap of 2.7 eV. When the epitaxial layer is Al.sub.x Ga.sub.1-x As and if x>0.5, then either n-type or p-type piezoresistive resistors may be utilized.

It is also possible to integrate the read-out electronics into the large bandgap semiconductor film in a manner similar to current practice in silicon pressure transducers. This has the advantage that the electronics will be located close to the sensing elements, and yet be able to operate at the high temperature of the sensor.