Apparatus and Method for Generating Multi-Digit Codes

The present invention relates to apparatus and method for generating multi-digit destination codes which are used in radio transceivers for establishing communication between stations.

In personal radio transceivers, a call is set up by selecting a five-digit destination code. Destination codes of frequently called stations are usually stored in a memory to fascilitate calling operation.

Conventional personal transceivers comprise a code entry keypad having 0- to 9-figure keys, a memory write function key, a memory read function key and a five-digit display. The ten figure keys are used to enter a desired destination code which is stored in response to the operation of the write-in function key followed by the specification of an associated access code. The stored five-digit code is retrieved in response to the operation of the read function key followed by the depression of a figure key representing the access code.

One shortcoming in the conventional personal transceiver is that the memory capacity is limited because of the space and cost problems. While it is technically possible, an attempt to increase the memory capacity would result in an increase in hardware components with an attendant increase in size and cost.

The present invention is to eliminate the problem just mentioned without increasing the memory capacity and has for its object the provision of a radio apparatus having a memory capacity practically ten times the current memory capacity.

The present invention provides a radio apparatus having a code generating circuit including a manual keypad for keying numerical data and write and read function keys. The apparatus comprises a read-write memory means, and a data processor. The processor is programmed to store keyed numerical data representing part of a multi-digit destination code into a storage location of the memory in response to operation of the write function key and store keyed numerical data representing the address of the storage location. The stored part-destination code data are retrieved in response to successive operation of the read function key and the keypad keying the address respresenting numerical data. In response to subsequent operation of the keypad keying an additional digit, the latter is appended to the part destination code read out of the memory to complete a full destination code.

With the memory storing a part destination code, the most or least significant digit position of the code is left vacant, thus saving the memory capacity. By operating the keypad to generate the additional digit, the vacated digit position is filled to complete the destination code.

The present invention will be described in further detail with reference to the accompanying drawings, in which:

FIG. 1 is an illustration of a control panel of a personal transceiver;

FIG. 2 is a block diagram of the data processor of the personal transceiver; and

FIG. 3 is a flow diagram describing the operation of the microprocessor of FIG. 2.

FIG. 1 is an illustration of a control panel of a personal transceiver embodying the present invention. This control panel 1 is provided with a code entry keypad 1 having ten figure keys, a memory write command key 2, a memory readout command key 3, reset key 4 and CQ key 5. A five-digit seven-segment display 6 and light-emitting diodes 7 are provided for call status indication.

FIG. 2 is an illustration of a block diagram of a data processor programmed according to the present invention. A microprocessor (CPU) 11 is driven by a 1200-Hz clock supplied from a clock generator 14 to perform operations on the various functions of the personal transceiver including code number write and read operations and transmission of code numbers upon request. Command signals are generated by function keys 2-5 and destination code is keyed in by the figure keys on keypad 1. Since the present invention is concerned with write and read operations of destination codes, descrition is omitted with respect to the operation of the CQ and reset keys. A read only memory (ROM) 12 stores programmed instructions which will be described in detail later. Key inputs are fed to the microprocessor 11 through an input/output port 13 and output data to LED display 6 are fed through the port 13 to four-input decoder 16 and inverter 17 and through a 7-segment decoder-driver 15. The microprocessor flashes the LED display 6 on a per digit basis at clock intervals. To effect this flashing operation, the decoder 16 shifts the display 6 one digit position in response to shift command signal from the microprocessor at clock intervals and a digit signal is applied from the CPU to the segment decoder 15 in synchronism with the rate at which the display is shifted. Decoder 16 disributes voltages necessary for keying operation to the keypad 1 and other keys 2 to 5 at clock intervals. Random access memory (RAM) 18 has a memory capacity capable of storing as many as five destination codes of four digits each and other information necessary for addressing the stored data.

The write operation of the microprocessor for storing destination codes will now be described with reference to a programmed routine shown in FIG. 3. The program is initiated at regular intervals of typically 5/1200 seconds. In the absence of operation of any one of figure keys on keypad 1 and keys 2 and 3, control is passed through block 21 to block 23 to unset key flag. Operation of such a key will cause control to be passed to block 22 to discover if the key flag has already been set, and if it has, the condition indicates that the processor is still performing operation on a previous key operation. When this occurs the processor jumps to the end of the routine to nullify the subsequent key operation.

It is assumed that the operator stores a destination code "87653" in a storage location of the RAM 18 which is addressed by an access code 4, for example.

Operation of the numeral 8 key on the keypad 1 is detected in block 21 and control is passed through blocks 22, 24, 25, 26 and 27 to block 28 where it shifts data to be loaded into LED display 6 one digit to the next higher positions. Control is advanced to block 29 to load the keyed-in information, i.e. numeral 8 into the first or least significant digit position of the display 6. The processor proceeds to block 30 to set key flag.

It will be seen that in response to each operation of succeeding the numeral 7, the numeral 6, and the numeral 5 keys at appropriate intervals the display is shifted one digit to the next higher position and numbers "7", "6" and "5" are loaded into the least significant digit position and thereafter shifted in succession to higher digit positions. It is noted that the least signicant digit number "3" is not keyed in at this moment and the most significant digit position is left vacant.

Next, the write command key 2 is depressed. Upon depression of this key, control is passed through blocks 21, 22, 24 to block 31 to set write flag and thence to block 32 to turn on display 6 to provide the loaded numbers "8765" on display. Control is advanced to block 30 to set key flag again.

With the write flag being set, the access code 4 is keyed in by depression of the numeral 4 key. Control is passed through blocks 21, 22, 24, 25 to block 26 and exits to block 33 to discover if the keyed-in number corresponds to any one of preassigned access codes "1" to "5". Since the condition is true, the processor proceeds to block 34 to write the keyed-in numeral data "8765" into a storage location of the RAM 18 which is addressed by access code 4. The LED display 6 is turned off (block 35) and the write-in access code "4" is stored into RAM 18 (block 36). Control is advanced to block 37 to unset the write flag.

The write operation just described may be repeated to store destination codes as many as there are preassigned memory access codes available. In the present embodiment, the number of such preassigned access codes is five as determined by the memory capacity. The program step at block 33 is to reject a request which is made when the available number is exceeded.

The stored destination codes are retrieved by operating the memory read key 3. The operation of read key 3 causes the processor to pass through blocks 21, 22, 24, 25 to block 38 to set read flag. An access code associated with the calling party is depressed on the code entry unit 1. For example, the stored destination code "8765X" (where X is a number to be added later) is retrieved by operating numeral 4 key. When this occurs, control is passed through blocks 21, 22, 24, 25, 26 and 27 to block 39 to discover if a preassigned access number has been depressed, and if it has, the processor proceeds to block 40 to read the stored data from RAM 18 into LED display 6 to put "08765" on display. Read flag is subsequently unset in block 41. With the most significant digit position being left blank, the operator depresses the least significant digit number "3". Microprocessor 11 now has to add the last number to the previously stored code to complete the desired destination code. It does this by having control pass through blocks 2, 22, 24, 25, 26, 27 to block 28 to shift displayed data one digit to higher positions to leave the least significant digit position vacant and proceed to block 29 to load the keyed-in number "3" into the vacated least significant digit position, whereby the destination code "87653" is completed and displayed.

Therefore, the stored code "8765" can be readily changed to a desired full destination code by the addition of a desired least significant digit number. Practically, the present invention permits the number of destination codes that can be stored in memory to be increased ten times without increasing the memory capacity. The foregoing description shows only preferred embodiments of the present invention. Various modifications are apparent to those skilled in the art without departing from the scope of the present invention which is only limited by the appended claims. For example, the direction in which data are shifted in digit position could be reversed so that the most significant digit position is vacated to allow insertion of the additional digit. The embodiments shown and described are only illustrative, not restrictive.