Horizontal Deflection Circuit Having a Variable Retrace Period

The present invention relates generally to horizontal deflection circuits for cathode ray tubes, and more specifically to a horizontal deflection circuit having a retrace period which is variable in response to operation of a manually controlled switch.

There is often a need to operate a cathode ray tube with a variable line frequency to make it compatible with different line scanning systems. It is also desirable that the line scan retrace period be made variable with thresone variable trace period for adjusting the horizontal deflection amplitude of a raster.

One prior horizontal deflection circuit as described in Japanese Utility Model Provisional Specification No. 60-18965 employs a variable frequency oscillator for generating a variable frequency oscillation in response to horizontal sync pulses supplied from an external source. A switching device comprising a transistor and a diode is provided for switching the frequency of a variable frequency resonant circuit that determines the retrace period depending on whether the transistor is turned on or off. The turn-on of the transistor is effected by a DC bias supplied from a voltage source to the base of that transistor when a manually controlled switch is closed. This DC bias is applied to the transistor as long as the switch is maintained in the closed condition. One disadvantage of the prior deflection circuit is that, since a large collector current flows through the switching transistor when it is turned on, a large base current needs to be supplied to that transistor to switch it into a fully conductive state. Furthermore, the switching transistor must be capable of withstanding a high voltage flyback pulse which is generated in the deflection circuit during the retrace period and the transistor of this type has a very small value of current amplification. Therefore, a substantial amount of power is needed to drive the switching transistor.

It is therefore an object of the present invention to provide a horizontal deflection circuit for a cathode ray tube which requires a small amount of power for switching the retrace period between different values.

The horizontal deflection circuit of the invention comprises an oscillator responsive to a horizontal sync pulse applied thereto for generating a first oscillation at the frequency of the sync pulse. A first switching device is responsive to a first half cycle of the first oscillation to cause a ramp current to be generated in a resonant circuit. The resonant circuit comprises a deflection coil and a first capacitor to produce a second, half-cycle oscillation immediately following a complete cycle of the first oscillation to define the retrace period of the circuit. While a second switching device is enabled by operation of a manually controlled switch, it is responsive to a second half cycle of the first oscillation for intermittently coupling a second capacitor to the first capacitor of the resonant circuit to vary the retrace period.

The present invention will be described in further detail with reference to the accompanying drawings, in which:

FIG. 1 is a circuit diagram of a horizontal deflection circuit of the invention;

FIG. 2 is a timing diagram associated with the circuit of FIG. 1; and

FIG. 3 is a circuit diagram of a modified embodiment having a plurality of switched resonant capacitors for varying the retrace period in multiple steps.

Referring now to FIG. 1, there is shown a variable frequency horizontal deflection circuit according to an embodiment of the invention. The deflection circuit comprises a variable line frequency oscillator 1 which generates a line-frequency current pulse through the primary winding 2a of a transformer 2 in response to a horizontal sync pulse supplied to its input line 1a from an external video signal source. The frequency of oscillator 1 is variable in response to operation of a frequency changeover switch 21 so that it conforms to the repetition frequency of the applied sync pulse. Transformer 2 has a pair of secondary windings 2b and 2c. Secondary winding 2b develops a voltage plse V1 in response to the sync pulse and applies it through a current-limiting resistor 18 across the base and emitter of a switching transistor 3 which forms a first switching device with a damper diode 4 connected in antiparallel relationship with the transistor, i.e., the transistor emitter-collector path and the diode conduct in opposite directions between line 20 and ground. The collector of transistor 3 is connected to a line 20 to which a DC source voltage is applied from a voltage regulator 11 through the primary of a flyback transformer 10. To the line 20 is connected a parallel circuit including a series circuit of a horizontal deflection coil 5 and a nonlinearity correction capacitor 6, a first resonant capacitor 7 and a second resonant capacitor 8 which is connected from line 20 to ground through a second switching device formed by a switching transistor 14 and a diode 15 which is connected in antiparallel relationship with the collector-emitter path of transistor 14.

Capacitors 7 and 8, deflection coil 5 and the primary of flyback transformer 10 form a variable frequency resonant circuit which determines the retrace period of the deflection circuit depending on whether transistor 14 is turned on or off to conform to the variable line frequency.

Secondary winding 2c of transformer 2 applies a voltage pulse V2, which is opposite in polarity to voltage pulse V1, from one terminal of winding 2c through a current-limiting resistor 13 to the base of a switching transistor 14, the other terminal of winding 2c being connected through a storage capacitor 16 to the emitter of transistor 14 which is grounded. The collector of transistor 14 is connected to a junction between capacitor 8 and diode 15. A terminal between storage capacitor 16 and secondary winding 2c is connected to ground by a frequency changeover switch 17 which is ganged to the frequency changeover switch 21.

In response to the application of a sync pulse to oscillator 1, the transistor 3 and damper diode 4 turn on, causing a ramp current to flow through deflection coil 5, the ramp current branching to a component Ic.sub.1 that flows through transistor 3 and a component Id.sub.1 that passes through damper diode 4. As indicated by a waveform Ic.sub.1 in FIG. 2, the ramp current to the collector of transistor 3 starts in the negative direction at time t.sub.1 in response to the leading edge of a voltage pulse V1, then flows in the positive directiron and then sharply drops to zero at time t.sub.2 after a delay time "t" following the trailing edge of the voltage pulse V1. This delay is caused by minority carriers in transistor 3 being discharged upon the turn-off of transistor 3 following the trailing edge of pulse V1. There is no collector current in transistor 3 during the interval between times t.sub.2 and t.sub.5. The waveform of the combined currents passing through transistor 3 and diode 4 is indicated by a waveform represented as Ic.sub.1 +Id.sub.1. During the trace period between time t.sub.0 and time t.sub.2, the combined current (Ic.sub.1 +Id.sub.1) flows through the deflection coil 5 and during the retrace perid a cosine current flows in deflection coil 5. During the retrace period, a half-cycle, high voltage oscillation is generated in the resonant circuit to cause a flyback current to flow through the primary winding of the flyback transformer 10 so that it generates a high voltage at the flyback transformer secondary winding.

When switch 17 is in an off, i.e., open, state, storage capacitor 16 is charged by a current passing through the base-emitter path of transistor 14. The voltage so developed in capacitor 16 biases the transistor 14 into a nonconductive state. Thus, diode 15 is nonconductive and capacitor 8 is effectively disconnected from the deflection circuit. The retrace period is determined by the duration of one half cycle of the resonant frequency current generated by the circuit formed by deflection coil 5, capacitor 7 and the primary winding of flyback transformer 10 in response to the termination of a trace period at time t.sub.2. The initiation of diode current Id.sub.1 occurs at time t.sub.3 so that the interval between times t.sub.2 and t.sub.3 determines the retrace period when switch 17 is in off-state.

When switch 17 is turned on, capacitor 16 is discharged, causing transistor 14 and hence diode 15 to be turned on in response to the leading edge of a voltage pulse V2 from secondary winding 2c. Under these circumstances, capacitor 8 is connected to the resonant circuit through the now conducting diode 15. An oscillation generated by the resonant circuit using additional capacitor 8 causes a collector current Ic.sub.2 to flow through transistor 14 during a quarter cycle of the oscillation and a diode current Id.sub.2 to flow through diode 15 during a subsequent quarter cycle of the oscillation, so that the retrace period is determined by the interval between times t.sub.2 and t.sub.4.

It is seen therefore that when switch 17 is in an on-state the base current for driving the switching transistor 14 exists only during the retrace period. Thus, the amount of power needed to drive the transistor 14 is significantly reduced compared with the aforesaid prior art. If there is a need to vary the retrace period without altering the line frequency, oscillator 1 is modified to have a single constant frequency and switch 21 is eliminated.

The retrace period can be varied in n steps as desired by providing n resonant capacitors 8a-8n and n associated capacitor-switching circuits as shown in FIG. 3. Switching circuits include transistors 14a-14n, diodes 15a-15n and switches 17a-17n. If it is desired to change the line frequency with changes in retrace period, switches 21a-21n are respectively ganged to switches 17a-17n to alter the resonant frequency of oscillator 1.

The foregoing description shows only preferred embodiments of the present invention. Various modifications are apparent to those skilled in the art without departing from the scope of the present invention which is only limited by the appended claims. Therefore, the embodiments shown and described are only illustrative, not restrictive.