Method and System for Processing a Border Pixel

This invention relates generally to a method and system for processing a border pixel located between a pictorial component and another one (a pictorial component, a ruling line component or a screen tint component) to be recorded on a reproduction image by using an image reproducing system such as a layout scanner, and more particularly to such a method and system in which the border pixel is recorded by using halftone dot image data of at least one of the surrounding pixel(s) thereof.

In the field of image reproducing systems such as a color scanner, a layout scanner system exists which has a function of recording the images of plural original pictures on a photosensitive film in a desired layout pattern. However, if a a pictorial component having various halftone dot density gradations and a letter or drawing (called a "literal" hereinafter) component having a binary level (black or white) must be recorded together in a desired layout pattern on a photosensitive film, higher resolving power is required for recording the pixels of the literal component in comparison with that for recording the pixels of the pictorial component, because the literal component consists mainly of fine line segments. Thus, if both components are recorded with an identical resolving power suitable for recording the literal component, excessive processing time is needed.

In addition, when a disc memory is used for performing layout work, the memory is required to have greater amount of capacity, which causes longer processing time. In order to resolve the above problem, U.S. application Ser. No. 471,859, now U.S. Pat. No. 4,553,172, discloses a method wherein first image data of pictorial components and that of literal components scanned more minutely are together input to one memory according to a desired layout pattern, wherein both data are separable. The image data are then output from the memory separately to be used for recording respective reproduction images on a photosensitive film.

However in this method, as the border pixels between both components can only be recorded by the image data of either the pictorial component or the literal component, there exists a drawback that a vacant (white) portion might be produced along the border.

In order to overcome the above drawback, U.S. application Ser. No. 507,719 discloses a method in which the border pixels between a literal component P.sub.L and a pictorial component P.sub.P are recorded using the image data of both components simultaneously as shown in FIG. 1. To prevent any blank areas along contours of the line drawing in the reproduction from occurring, graphic signals originating from pictorial element of a line drawing are added to a line signal originating from the pictorial element. This method is also permissible when the literal pixel is recorded in 100% halftone dot density, but produces an unwelcome solid portion P.sub.5 on the border pixels when the literal component is recorded in less than 100% halftone dot density as shown in FIG. 1.

On the other hand, U.S. application Ser. No. 532,737 discloses a method in which the border pixels are recorded by converting picture and line signals into different digital words having the same number of bits and adding bits to distinguish between line and picture signals. A dot is formed in the picture portion according to picture information. In the line drawing, a screen tint is formed according to dot percentage data, and in the boundary portion line drawing data rather than picture data are output. However in this method, because the border pixels are not recorded by using the pictorial component data, a vacant portion P.sub.P0 is produced on the border pixels as shown in FIG. 2. Even this method, however, cannot resolve the conventional problems.

Furthermore, conventional methods have a common drawback of the appearance of vacant portions owing to incorrect registration, which also affects the quality of reproduced images.

An object of this invention is to accurately process a border pixel between a pictorial component and another one (a pictorial component, a ruling line component or a screen tint component) in order to produce no "undesirable" solid portion (like portion P.sub.L0 in FIG. 1) or "vacant portion" (like portion P.sub.P0 in FIG. 2). Another object is to prevent a "vacant portion" from appearing caused by a "shear" produced by poor registration.

In order to realize the above objects, this invention provides the following method.

A border pixel between a pictorial component and another one (a pictorial component, a ruling line component or a screen tint component) is recorded using image data of one or two out of the surrounding pixels of the border pixel. Which pixel(s) should be selected for recording the border pixel depends upon the content of the bit data unit (called a "word" hereinafter) for expressing the border pixel. This selection process is shown generally in FIG. 10, and more specifically in Table 1. How image data of the selected pixel(s) are used for recording the border pixel is as shown in Table 2.

The above and other objects and features of this invention can be appreciated more fully from the following detailed description when read with reference to the accompanying drawings.

FIG. 1 is a diagram of the region around the border pixels of a reproduction image wherein the border pixels are recorded using a conventional method.

FIG. 2 is a diagram of the region around border pixels of a reproduction image wherein the border pixels are recorded by using another conventional method.

FIG. 3 shows the bit pattern of a border pixel.

FIG. 4 shows the region around border pixels of a reproduction image wherein the border pixels are recorded by using the method of this invention.

FIG. 5 shows a border pixel and the surrounding pixels thereof for explaining the concept of the method of this invention.

FIG. 6 shows a supplementary chart for explaining the concept of the method of this invention.

FIGS. 7(a)-7(c) show sections of layers, each of which consists of four color separation inks.

FIGS. 8(a)-8(b) show two examples of the construction of a "word" (bit unit).

FIG. 9 shows a bit pattern of a pixel in which each bit corresponds to the "word" shown in FIG. 8(b).

FIGS. 10(a)-10(h) show the pixels to be selected, of which data are to be used for recording the border pixel in each case.

FIG. 11 shows a surrounding pixel selector for selecting the image data of appropriate surrounding pixels for recording the pixel to be processed.

FIG. 12 shows a circuit for regulating the order of data of this invention.

FIGS. 13(a) and 13(b) show a signal timing chart of the circuit shown in FIG. 12.

FIG. 14 shows a border pixel processer of this invention.

FIG. 15 shows a flow chart indicating the process of the method of this invention.

FIG. 16 shows a decoder of this invention.

FIG. 17 shows a pixel data selector of this invention.

FIG. 18 shows the function of a parallel-series converter of this invention .

In the following a "border pixel" is defined as a pixel which contains more than one type of image data, of which surface area is equivalent to that of a pictorial pixel. And the "pictorial pixel" is a term general to a literal pixel such as a letter or drawing (expressed by using halftone dots of 100%) and a screen tint pixel (expressed by using halftone dots of a constant density less than 100%; a screen tint is defined herein as a tone without gradation, i.e., having only one tone value) as well as to a picture pixel (expressed by using halftone dots of various densities).

FIG. 3 shows an example of the bit pattern of a border pixel, which state is presented by an interface between a pictorial component and a literal component or a screen tint component. In this, 5.times.5 literal pixels P.sub.cy arranged in matrix in the main and subscanning directions correspond to one pictorial pixel P.sub.cx, and each literal pixel P.sub.cy is numbered "0" and "1" to represent the border state (a line L is an approximate border line). On the other hand, when the pictorial pixel is expressed in 32 bit data (one "word"), the 5.times.5 literal pixels in matrix are expressed in 25 bit data in order to be processed together with the pictorial pixel data.

FIG. 4 shows an example of the state of a border pixel produced using the method of this invention wherein two distinct types of halftone dots are recorded together sharing the border line L on the border pixel.

FIG. 5 shows a border pixel and the surrounding pixels thereof for explaining the conception of the method of this invention, in which two distinct halftone dots are recorded together sharing a border line on a border pixel of which surface area corresponds to one pictorial pixel as shown in FIG. 4. FIG. 6 shows a supplementary chart for explaining FIG. 5. It is now assumed the border and the surrounding pixels thereof are given signs D.sub.1 to D.sub.9 as shown in FIG. 6. When a border line L' traverses a pixel P.sub.c0 as shown in FIG. 5, in other words, the central pixel D.sub.5 of FIG. 6 is a border pixel between for example two pictorial components, the border pixel P.sub.c0 (D.sub.5) is recorded as follows. In FIG. 6, the pixels D.sub.2, D.sub.5 and D.sub.8 are situated on one record scanning line. When the record scanning point comes to the pixel D.sub.5, at first image data of two out of the pixels D.sub.1 . . . D.sub.4, D.sub.6 . . . D.sub.9 are selected according to a rule (mentioned later), then, the pixel D.sub.5 is recorded using the image data of the selected two surrounding pixels sharing the border line L'.

In addition, the method of this invention can prevent the appearance of a vacant portion which takes place on a print made of four color separation images Y (Yellow), M (Magenta), C (Cyan) and K (Black) having a discrepancy caused by poorly performed registration. Thus, with reference to FIGS. 7(a)-7(c), the invention prevents appearance of any vacant or blank portions in a border pixel, otherwise caused by poor coincidence of the four color separation images, by adding data borrowed from surrounding pixels. In FIG. 7(a), there are no blank or vacant regions because all four color separation images coincide with each other. However, when a black color separation image is out of position by a half width of one pixel, as shown in FIG. 7(b), a vacant portion D appears along a printed rule when image data of 0% are applied to applied to elements P.sub.7Y, P.sub.7M and P.sub.7C on color separation images Y, M and C, respectively, as well as to an adjoining element P.sub.8K while image data of 100% are applied to element P.sub.7K. This is avoided by adding image data of pictorial element P.sub.C1 to element P.sub.C0 on color separation images Y, M and C as shown in FIG. 7(c).

More specifically, FIG. 7(a) shows a state in which the color separation images are printed in a perfect location (perfectly registered). When two surrounding pixels P.sub.c1 and P.sub.c2 of the border pixel P.sub.c0 contain more than 0% halftone dots, the border pixel P.sub.c0 can be recorded using the image data of the pixels P.sub.c1 and P.sub.c2 as shown as solid arrows in FIG. 7(a). Even when the color separation images are not printed in a perfect location (poorly registered), no vacant portion is produced as long as the pixels P.sub.c1 and P.sub.c2 contain halftone dots.

FIG. 7(b) shows a section of the ink layers of a ruling line, where the ruling line is recorded having a shear corresponding to one half of the width of a pictorial pixel of a Black (K) layer. When the ruling line is composed of a Yellow (Y) layer P.sub.7Y, Magenta (M) layer P.sub.7M, Cyan (C) layer P.sub.7C and Black (K) layer, and the halftone dot percentage of the layers P.sub.7Y, P.sub.7M, P.sub.7C and P.sub.7K are P.sub.7Y =P.sub.7M =P.sub.7C =0% and P.sub.7K =100%, and the halftone dot percentage of the adjacent pictorial pixel P.sub.8K is P.sub.8K =0%, a vacant portion D is produced as shown in FIG. 7(b) along the ruling line. This phenomenon deteriorates the quality of final printed matters. However, in accordance with the method of this invention as shown in FIG. 7(c), image data of the separation colors Y, M, C and K of the pixel P.sub.c1 are used for recording the corresponding color separation images of the border pixel P.sub.c0.

FIG. 8(a) shows a word (bit data unit) for representing image data of a pictorial pixel.

FIG. 8(b) shows the same for representing image data of a border pixel. Image data of each pixel are expressed in 32 bits. The following explanation is based on the 32 bit data (a "word"). The first bit d.sub.0 is a bit for designating whether the pixel to be processed (called "the present pixel" hereinafter) is a pictorial pixel (the bit d.sub.0 is d.sub.0 =0) or a border pixel (the bit d.sub.0 is d.sub.0 =1). When the present pixel is a pictorial pixel, the other 31 bits are used for representing the color separation image data of Y, M, C and K where every 8 bits are allotted to each of the color separation image data of Y, M and C, and the remaining 7 bits are allotted to the color separation image data of K.

When the pixel is a border pixel, the composition of the 32 bits is as follows. That is, 25 bits from d.sub.7 to d.sub.31 are used for representing the bit pattern of the border pixel as shown in FIG. 8(b), wherein each of the bits d.sub.7 to d.sub.31 corresponds to the portion of the same sign shown in FIG. 9.

The other 6 bits d.sub.1, d.sub.2, d.sub.3, d.sub.4, d.sub.5 and d.sub.6 are used as follows. The bit d.sub.0 is used for designating the type of the present pixel as mentioned before (when the present pixel is a border pixel, the bit d.sub.0 is d.sub.0 =1). The bit d.sub.1 is used for designating whether the present pixel must have a ruling line (the bit d.sub.1 is d.sub.1 =1) or not (the bit d.sub.1 is d.sub.1 =0).

The bit d.sub.2 is used for designating whether the appearance of a vacant portion on the present pixel must be suppressed (the bit d.sub.2 is d.sub.2 =1) or not (the bit d.sub.2 is d.sub.2 =0).

When the bit d.sub.2 is d.sub.2 =1, the present pixel is recorded by using image data of a ruling line and one of the surrounding pixels thereof as mentioned later.

The bits d.sub.3, d.sub.4, d.sub.5 and d.sub.6 are used for designating on which color separation films of Y, M, C and K a ruling line (mainly) is to be recorded. When the ruling line must be recorded on the Y and M color separation films, the sequence of the bits d.sub.3 d.sub.4 d.sub.5 d.sub.6 becomes d.sub.3 d.sub.4 d.sub.5 d.sub.6 =1100.

Therefore, when the present pixel is a pictorial pixel, the bit d.sub.0 becomes d.sub.0 =1 and the other 31 bits are used for representing the color separation image data of Y (8 bit), M (8 bit), C (8 bit) and K (7 bit) as indicated in Table 2 (Mode I).

When the present pixel is a border pixel between a pictorial pixel and another pictorial pixel or a screen tint pixel, and there is no need to suppress the appearance of a vacant portion, the bits d.sub.0, d.sub.1 and d.sub.2 become d.sub.0 =1, d.sub.1 =0 and d.sub.2 =0 as indicated in Table 2 (Mode II). In this case, the present (border) pixel is recorded by using image data of two of the surrounding pixels thereof (in FIG. 5, they are the pixels P.sub.c1 and P.sub.c2).

When the present pixel is a border pixel between a pictorial pixel and another pictorial pixel or a screen tint pixel, and there is a need to suppress the appearance of a vacant portion, the bits d.sub.0, d.sub.1 and d.sub.2 become d.sub.0 =1, d.sub.1 =0 and d.sub.2 =1 as indicated in Table 2 (Mode V).

In any case, the value of the bit d.sub.2 in each word is prerecorded by the human operator prior to printing depending upon whether the prevention of vacant or blank portions in the pixel must be suppressed.

In the above Modes II and V, if one of the surrounding pixels P.sub.c1 and P.sub.c2 has 0% halftone dot, image data of the other surrounding pixel are used for recording all the surface of the present (border) pixel.

When the present pixel is a border pixel and is to be recorded by using ruling line data, the bit d.sub.1 becomes d.sub.1 =1. Moreover in this condition, when the ruling line is to be recorded in 100% halftone dot density (solid), the bit d.sub.2 becomes d.sub.2 =1. In this case, the bits d.sub.3, d.sub.4, d.sub.5 and d.sub.6 become "1" or "0" respectively in order to designate a separation color film on which the ruling image must be recorded out of four separation color films Y, M, C and K as indicated in Table 2 (Mode VI).

When the ruling line is to be recorded in 0% halftone dot density (vacant), the bit d.sub.2 becomes d.sub.2 =0. In this case, referring to FIG. 3, the area numbered "1" of each of four color separation images Y, M, C and K is recorded in 0% halftone dot density (namely, nothing is recorded), the area numbered "0" of each of the color separation images Y, M, C and K is recorded by using the image data of P.sub.c1 (FIG. 5) as indicated in Table 2 (Mode VII).

When all the surrounding pixels of a border pixel are border pixels too, the bits d.sub.0, d.sub.1 and d.sub.2 become d.sub.0 -2, d.sub.1 =0 and d.sub.2 =1, and one portion of the border pixel is recorded by using one separation color ink of 100% halftone dot density as indicated in Table 2 (Mode III).

FIGS. 10(a) to (h) show that image data of which pixels are used for recording the border pixel. Actually, the border line L' is not always a straight line but can be assumed so in the level of one pictorial pixel. Therefore, whichever course the border line L' may pass, it can be one of the states of FIGS. 10(a) to (h).

In the method of this invention, the pixels of which data are used for recording the border pixel are determined according to the state of four corners of the border pixel, that is, each of the bits d.sub.31, d.sub.27, d.sub.11 and d.sub.7 shown in FIG. 9 is "1" or "0" as mentioned later.

FIG. 11 shows a surrounding pixel selector 27 for selecting two pixels of which data are used for recording the border pixel according to the state of four corners thereof. The surrounding pixel selector 27 is connected to a latch 26 in a circuit shown in FIG. 14 (mentioned later). In FIG. 11, one of output signals C.sub.0 to C.sub.15 from a priority encoder 71.sub.-1 becomes "1", while one of output signals C'.sub.0 to C'.sub.15 from a priority encoder 71.sub.-2 becomes "1" according to the state of four corners of the border pixel as shown in Table 1. Consequently, data M for designating one surrounding pixel P.sub.c1 and data N for designating another surrounding pixel P.sub.c2 are output from respective corresponding terminals of D.sub.1 . . . D.sub.4, D.sub.6 . . . D.sub.9. Said data M and N are input to pixel data selectors 37 and 38 of the circuit shown in FIG. 14.

FIG. 12 shows a data order regulator which regulates image data of each pixel to output image data of the present pixel (the pixel D.sub.5 in FIG. 6) from an identical terminal when image data which experienced a layout process are read from a memory of large capacity such as a disc memory. FIG. 13 shows the timing chart of the data order regulator of FIG. 12.

At first, a timing pulse generator 22 generates a pulse TP which is output once a revolution of an original picture drum from a rotary encoder connected coaxially to the drum.

The timing pulse generator 22 generates buffer control signals (a), (b), (c) and (d) as shown in FIG. 13(a) by using the one pulse TP.

To the timing pulse generator 22, a data clock pulse D.sub.cp for controlling reading time of the image data from a memory 20 is applied. By using the clock pulse D.sub.cp, the timing pulse generator 22 generates writing control signals M1WE, M2WE, M3WE and M4WE for respective line memories M.sub.1, M.sub.2, M.sub.3 and M.sub.4, an address signal AD of which value (number) is increased every time the clock pulse D.sub.cp is input thereto, and shift signals S.sub.1, S.sub.2 and S.sub.3 are developed for giving a shift order to image data to shift registers SR.sub.1 to SR.sub.9.

When the buffer control signal (a) output from the timing pulse generator 22 becomes "1", the signal (a) opens a tri-state buffer 21.sub.-1 to pass image data from the memory 20 through to the corresponding addresses of a line memory M.sub.1 according to the address signal AD. At the same time from the line memories M.sub.2, M.sub.3 and M.sub.4 which already hold image data of the previous three scanning lines, the image data are read according to the address signal AD and are input via tri-state buffers 23.sub.-2, 24.sub.-3 and 25.sub.-4 to shift register groups SR.sub.1 to SR.sub.3, SR.sub.4 to SR.sub.6 and SR.sub.7 to SR.sub.9, respectively.

Assuming that image data of the pixels D.sub.1 to D.sub.9 (shown in FIG. 6) are input to the shift registers SR.sub.1 to SR.sub.9, at first the image data of the pixels D.sub.1, D.sub.2 and D.sub.3 held in the respective shift registers SR.sub.3, SR.sub.6 and SR.sub.9 are read with the shift signal S.sub.1. Secondly, the image data of the pixels D.sub.4, D.sub.5 and D.sub.6 held in the respective shift registers SR.sub.2, SR.sub.5 and SR.sub.8 are read in synchronism with the shift signal S.sub.2. Simultaneously, the image data of the pixels D.sub.4, D.sub.5 and D.sub.6 are shifted to the shift registers SR.sub.3, SR.sub.6 and SR.sub.9 respectively. Then the image data of the pixels D.sub.7, D.sub.8 and D.sub.9 held in the respective shift registers SR.sub.1, SR.sub.4 and SR.sub.7 are read in synchronism with the shift signal S.sub.3. Simultaneously, the image data of the pixels D.sub.7, D.sub.8 and D.sub.9 are shifted to the shift registers SR.sub.2, SR.sub.5 and SR.sub.8 respectively. Consequently, the image data of the pixels D.sub.1 to D.sub.9 are output from the data order regulator in synchronism with the clock pulse D.sub.cp.

When the buffer control signal (b) output from the timing pulse generator 22 becomes "1", image data read from the memory 20 are input via a tri-state buffer 21.sub.-2 to a line memory M.sub.2. At the same time, image data of the previous three scanning lines held in the line memories M.sub.3, M.sub.4 and M.sub.1 are read according to the control signals M3WE, M4WE and M1WE respectively. These image data are input via tri-state buffers 23.sub.-3, 24.sub.-4 and 25.sub.-1 to the shift register groups SR.sub.1 to SR.sub.3, SR.sub.4 to SR.sub.6 and SR.sub.7 to SR.sub.9, respectively. Subsequently, the same process is repeated in the stages controlled by the control signals (c) and (d). In every case, the data order regulator outputs the image data of the present pixel D.sub.5 and the surrounding pixels D.sub.1 . . . D.sub.4, D.sub.6 . . . D.sub.9 from the corresponding terminals. That is, the image data of the pixels D.sub.1, D.sub.2 and D.sub.3 are output from the shift registers SR.sub.3, SR.sub.6 and SR.sub.9 respectively in synchronism with the shift signal S.sub.1 . The image data of the pixels D.sub.4, D.sub.5 and D.sub.6 are output from the shift registers SR.sub.2, SR.sub.5 and SR.sub.8 in synchronism with the shift signal S.sub.2. The image data of the pixels D.sub.7, D.sub.8 and D.sub.9 are output from the shift registers SR.sub.1, SR.sub.4 and SR.sub.7 respectively in synchronism with the shift signal S.sub.3.

FIG. 14 shows a border pixel processor of this invention and FIG. 15 shows the flow chart indicating the process of the method of this invention. In FIG. 14, the data bit number of each line is as shown therein, however FIG. 14 prints one element on each line for simplification. The image data of the present pixel D.sub.5 output from the data order regulator are at first latched in a latch 26. Among the 32 bit data of the present pixel D.sub.5, data corresponding to the 7 bits d.sub.0 to d.sub.6 are input to a decoder 35.

The decoder 35 has a structure as shown in FIG. 16. The decoder 35 judges to which type of the following seven modes I to VII the present pixel D.sub.5 corresponds according to the bits d.sub.0 to d.sub.6 and signals .circle.Q , .circle.e and .circle.i (mentioned later). The following explanation of FIG. 14 is based on Table 2 and the flow chart shown in FIG. 15.

Mode I: When the present pixel is a pictorial pixel, the bit d.sub.0 indicates d.sub.0 =0 as in FIG. 15. The value of the bit d.sub.0 is inverted in an inverter 50 to become "1" and is output as a signal .circle.A from the decoder 35. The output signal opens an AND-gate 29 while the signal .circle.A is inverted in an inverter 31 to close an AND-gate 32. Therefore, the 31 bit pictorial data are input via an OR-gate 33 to a halftone dot generator 34. The halftone dot data from the halftone dot generator 34 are output via an AND-gate 44.sub.-1 and an OR-gate 45 of each of output data selectors 41.sub.-1 to 41.sub.-4. As a result, the present pixel D.sub.5 is recorded by using the halftone dot data of the pictorial pixel.

As the data selectors 41.sub.-1 to 41.sub.-4 are similar, the following explanation is directed toward only selector 41.sub.-1.

Meanwhile, image data of the surrounding pixels D.sub.1 . . . D.sub.4, D.sub.6 . . . D.sub.9 are input to a surrounding pixel decoder 36 and are used for supplying a selection signal to the decoder 35 when the present pixel D.sub.5 is a border pixel. The data are also input to pixel data selectors 37 and 38.

The following Mode II to VII indicate cases in which the present pixel D.sub.5 is not a pictorial pixel but rather is a border pixel.

Mode II: When the present pixel is a border pixel between a pictorial component and another pictorial component or a screen tint component, at least one of the surrounding pixels D.sub.1 . . . D.sub.4, D.sub.6 . . . D.sub.9 is not a border pixel, and the appearance of a vacant or blank portion need not be suppressed; the bits d.sub.0, d.sub.1 and d.sub.2 indicate d.sub.0 =1, d.sub.1 =0 and d.sub.2 =0 respectively. In this case, as a signal .circle.Q output from the surrounding pixel decoder 36 is .circle.Q =0, an AND-gate 63 is opened to render an output signal .circle.E becomes .circle. =1. In the meantime, as the signal .circle.A becomes .circle.A =0, the AND-gate 29 is closed and the AND-gate 32 is opened. Then the image data of two of the surrounding pixels D.sub.1 . . . D.sub.4, D.sub.6 . . . D.sub.9 which are selected as the pixels P.sub.c1 and P.sub.c2 by the pixel data selectors 37 and 38 are input via the halftone dot generator 34 and 34' to AND-gates 44.sub.-7 and 44.sub.-8 respectively. On the other hand, the bit pattern data of the present (border) pixel D.sub.5 is used for controlling the AND-gates 44.sub.-7 and 44.sub.-8, when the bit pattern data already undergoes parallel/series conversion in a parallel-series converter 28 as shown in FIG. 18. As a result, two portions of the pixel D.sub.5 are recorded by using the halftone dot data of the pixels P.sub.c1 and P.sub.c2.

Each of the pixel data selectors 37 and 38 is composed of tri-state buffers 70.sub.-1 to 70.sub.-8 as shown in FIG. 17. They select the pixels P.sub.c1 and P.sub.c2 from out of the surrounding pixels to use the image data thereof for recording the border pixel on command of the signal .circle.M and .circle.N output from the decoder 27.

Mode III: When the present pixel is a border pixel between a pictorial component and another pictorial component or a screen tint component, all the surrounding pixels D.sub.1 . . . D.sub.4, D.sub.6 . . . D.sub.9 are border pixels, and the appearance of a vacant portion must be suppressed; the bits d.sub.0, d.sub.1 and d.sub.2 indicate d.sub.0 -1, d.sub.1 =0 and d.sub.2 =1 respectively, and one or more of the bits d.sub.3, d.sub.4, d.sub.5 and d.sub.6 indicate(s) "1". Thus, one or more of signal(s) .circle.H , .circle.I , .circle.J and .circle.K for designating desired separation colors output from the decoder 35 become(s) "1". At the same time the signal .circle.Q from the surrounding pixel decoder 36 becomes "1" to open an AND-gate 61, and then the decoder 35 outputs a signal .circle.D of logic "1".

By being controlled by the separation color designation signals .circle.H , .circle.I , .circle.J and .circle.K and the bit pattern data of the present pixel D.sub.5 from the P/S converter 28, (an) AND-gate(s) 44.sub.-1 to 44.sub.-4 is (are) opened. As a result, one portion of the present pixel D.sub.5 of the designated separation color films is recorded in 100% halftone dot density.

When no ruling line must be recorded on the present pixel D.sub.5 and the appearance of a vacant portion must be suppressed, the bits d.sub.0, d.sub.1 and d.sub.2 indicate d.sub.0 =1, d.sub.1 =0 and d.sub.2 =1 respectively. In this case, signals .circle.e and .circle.i are output from zero percent density discriminators 39 and 40, which discriminate whether the image data of the pixels P.sub.c1 and P.sub.c2 selected in the surrounding pixel selectors 37 and 38 are 0% halftone dot data or not. The zero percent density discriminators 39 and 40 are provided in each circuit of the separation colors Y, M, C and K. If the image data of the pixels P.sub.c1 and P.sub.c2 are 0% halftone dot data, the signals .circle.e and .circle.i become .circle.e =1 and .circle.i =1. If the image data of the pixels P.sub.c1 and P.sub.c2 are not 0 % halftone dot data, the signals .circle.e and .circle.i become .circle.e =0 and .circle.i =0.

Mode IV: When the present pixel D.sub.5 is a border pixel between a pictorial component and another pictorial component or a screen tint component, the appearance of a vacant portion must be suppressed and both the signals .circle.e and .circle.i are .circle.e =0; the output signal of an AND-gate 56 becomes "1" to open an AND-gate 62. Consequently, the decoder 35 outputs a signal .circle.F of logic "1". Therefore by being controlled by the signal .circle.F and the bit pattern data of the present pixel D.sub.5, AND-gates 44.sub.-9 and 44.sub.-10 of respective output data selectors 41.sub.-1 to 41.sub.-4 are opened. As a result, two portions of the present pixel D.sub.5 are recorded by using the halftone dot data of the pixels P.sub.c1 and P.sub.c2 output from respective halftone dot generators 34 and 34'.

Mode V: When the present pixel D.sub.5 is a border pixel between a pictorial component and another pictorial component or a screen tint component, the appearance of a vacant portion must be suppressed, and one of the signals .circle.e and .circle.i indicates "0" and the other indicates "1"; the output signal from the AND-gate 62 becomes "0" to open an AND-gate 66 (or an AND-gate 65). Consequently, a signal .circle.G.sub.2 (or a signal .circle.G.sub.1 ) of logic "1" is output from the decoder 35 as a selection signal. Therefore one of AND-gates 44.sub.-11 and 44.sub.-12 of designated ones of output data selectors 41.sub.-1 to 41.sub.-4 are opened according to the signals .circle.e and .circle.i from respective zero percent density discriminators 39 and 40. As a result, one of two portions of the present pixel D.sub.5 is recorded by using as the halftone dot data either of the pixels P.sub.c1 and P.sub.c2 output from respective halftone dot generators 34 and 34'.

In Mode V, both of the signals .circle.e and .circle.i indicate .circle.e = .circle.i =1, the output signal .circle.G.sub.1 from the AND-gate 65 and the output signal from the AND-gate 66 become logic "1". At the same time as the output signal from an AND-gate 67 becomes "1", the output signal .circle.G.sub.2 from an Exclusive-OR-gate 68 becomes "0". In short, only the signal .circle.G.sub.1 becomes "1". Consequently, output from an AND-gate 44.sub.-11 is the image data of the pixel P.sub.c2 of 0% halftone dot density. This is equivalent to the case wherein no image data are output from the AND-gate 44.sub.-11 of the output data selector 41.sub.-1, which means that nothing is recorded on the present pixel D.sub.5.

Mode VI: When the present pixel D.sub.5 is a border pixel between a ruling line component and a pictorial component or a screen tint component, and the appearance of a vacant portion must be suppressed; the bits d.sub.0, d.sub.1 and d.sub.2 indicate d.sub.0 =d.sub.1 =d.sub.2 =1. These bits open an AND-gate 59 of the decoder 35 to output a signal .circle.B of logic "1". At the same time, the separation color designation signals .circle.H , .circle.I , .circle.J and .circle.K corresponding to respective bits d.sub.3, d.sub.4, d.sub.5 and d.sub.6 (at least one of these bits indicate(s) "1") are input to the output data selectors 41.sub.-1, 41.sub.-2, 41.sub.-3 and 41.sub.-4 respectively.

Assuming that the signal .circle.H is .circle.H =1, according to the portion "1" of the bit pattern of the present pixel D.sub.5 output from the P/S converter 28, a ruling line data (logic "1" in this case) is output from from an AND-gate 44.sub.-2 of the output data selector 41.sub.-1. As a result, the portion "1" of the present pixel D.sub.5 is recorded by using the ruling line data. Meanwhile the portion "0" of the bit pattern of the present pixel D.sub.5 is recorded by using the halftone dot data of the pixel P.sub.c1 output from the halftone dot generator 34 via the AND-gate 44.sub.-1.

In Mode VI, when the separation color designation signal .circle.H ( .circle.I , .circle.J or .circle.K ) becomes "0", the signal .circle.H ( .circle.I , .circle.J or .circle.K ) of logic "0" is inverted in an inverter 43 to open an AND-gate 44.sub.-4 of the output data selector 41.sub.-1 (41.sub.-2, 41.sub.-3 or 41.sub.-4). As a result, the entire pixel D.sub.5 is recorded by using the halftone dot data of the pixel P.sub.c1 output from the halftone dot generator 34 via the AND-gate 44.sub.-4.

Mode VII: When the present pixel D.sub.5 is a border pixel between a ruling line component and a pictorial component or a screen tint component, and the ruling line must be recovered in white (vacant); the bits d.sub.0, d.sub.1 and d.sub.2 indicate d.sub.0 =d.sub.1 =1 and d.sub.2 =0. Consequently, the decoder 35 outputs a signal .circle.C of logic "1" and the signals .circle.H , .circle.I , .circle.J and .circle.K of logic "1", which signals open an AND-gate 44.sub.-5 of respective output data selectors 41.sub.-1 to 41.sub.-4. As a result, nothing is recorded on the portion "1" of the bit pattern of the present pixel D.sub.5 output from the P/S converter 28 with regard to all the color separation factors. The portion "0" of the bit pattern of the present pixel D.sub.5 is recorded by using the halftone dot data of the pixel P.sub.c1 output from the halftone dot generator 34 via the AND-gate 44.sub.-5.

As is mentioned above, in the method of this invention, a border pixel between, e.g., a pictorial component and another pictorial component or a ruling line component is recorded by using image data of two of the surrounding pixels thereof according to the bit pattern data of the border pixel. In addition, when it is suspected that a vacant or blank portion might be produced on the border pixel owing to possible poor registration, the border pixel is recorded by using image data of one surrounding pixel. Therefore, the method of this invention is capable of suppressing the appearance of every type of vacant portions which might take place on a photosensitive film in reproducing images by using an image reproducing system such as a layout scanner.

In this disclosure, there is shown and described only the preferred embodiments of the invention, but, as aforementioned, it is to be understood that the invention is capable of use in various other combinations and environments and is capable of changes or modifications within the scope of the inventive concept as expressed herein.