Fluxoid Type Superconducting Logic Element

The present invention relates to a superconducting logic element, and particularly to a superconducting logic element which is capable of performing, on the basis of the quantum effect, various functions as required for instance in an electronic computer. Such logic element is hereinafter referred to as "fluxoid type superconducting logic element". The term, "fluxoid" is an abbreviation for "magnetic flux quantum unit", .phi..sub.o (=2.times.10.sup.-7 gauss cm.sup.-2).

The object of this invention is to provide a fluxoid type superconducting logic element using Josephson Junctions, and hence capable of operating at an increased speed.

To attain this object a fluxoid type superconducting logic element according to this invention comprises a pair of radio frequency superconducting quantum interference devices (hereinafter abbreviated "r-f SQUID") each essentially comprising a superconductor loop including a Josephson Junction; a drive means inductance-coupled with each r-f SQUID for applying a drive magnetic flux thereto; an input means inductance-coupled with each r-f SQUID for supplying thereto an input signal in the form of magnetic flux; and an output means inductance-coupled with each r-f SQUID for providing an output signal in the form of electric current or voltage, said r-f SQUIDs being inductance-coupled with each other so as to put one of the SQUIDs to its "firing" state and the other to its "extinction" state in response to the input signal

FIG. 1A is a schematic illustration of a superconductor loop including a Josephson Junction used in the logic element of the invention.

FIG. 1B is a graphical representation showing the internal to external magnetic field characteristics of the device schematically illustrated in FIG. 1A.

FIG. 1C is another schematic view showing the internal to external magnetic flux characteristics of the device of FIG. 1A under particular conditions.

FIG. 1D is a symbolic graphical representation of the relation between the internal and external magnetic flux values during operation of the device of FIG. 1A.

FIG. 2 is a schematic diagram illustrating the structure of a representative fluxoid type superconducting logic element according the invention.

FIG. 3 is a schematic diagram illustrating a modified form of superconducting logic element according to the invention.

FIG. 4 is a schematic diagram illustrating another embodiment of the invention.

FIG. 5 is a schematic diagram illustrating a logic circuit composed of a plurality of logic elements in accordance with the invention.

FIG. 6 is a graphical representation showing the relationship between clock signals used in connection with the embodiment of FIG. 5, and

FIG. 7 is a graphical representation illustrating another clock signal wave form arrangement.

FIG. 1A shows an r-f SQUID whereas FIG. 1B shows the internal-to-external magnetic flux characteristics of the r-f SQUID. The r-f SQUID is shown as comprising a superconductor loop including a Josephson Junction J and an inductance L. In operation, when an external magnetic flux .phi..sub.ext is applied to the loop, a persistent current I will flow in the loop to generate a counter magnetic flux (=L I) as much as the external magnetic flux. The persistent current I, and hence the counter magnetic flux will increase with the increase of the external magnetic flux until the persistent current reaches its critical value Jc, thus maintaining the inside of the loop magnetically quiescent. When the persistent current increases beyond its critical value the superconducting state of the loop will turn to the normal state at the weak link of the Josephson Junction, thereby allowing magnetic flux as strong as the magnetic flux quantum unit .phi..sub.o to enter the loop, which magnetic flux being referred to as "internal magnetic flux". The internal-to-external magnetic flux characteristics are shown for a (=2.pi.L.multidot.Jc/.phi..sub.o).ltoreq.1 and for a>1 in FIG. 1B. FIG. 1C shows the internal-to-external magnetic flux characteristics of an r-f SQUID for a=.pi.. As shown, when the external magnetic flux .phi..sub.ext reaches the upper critical value .phi..sub.p, the internal magnetic flux .phi..sub.int will appear as indicated at Q, and when the external magnetic flux .phi..sub.ext reaches the lower critical value .phi..sub.R, the internal magnetic flux .phi..sub.int will almost disappear. This rise-and-fall variation is symbolically represented in FIG. 1D. The state corresponding to NINT (.phi..sub.int /.phi..sub.o)=1 in the hysteresis 1ooP is herein called "firing state" whereas the state corresponding to NINT (.phi..sub.int /.phi..sub.o)=0 is called "extinction state".

FIG. 2 shows schematically the structure of a fluxoid type superconducting logic element according to this invention. It is shown as essentially comprising a pair of r-f SQUIDs SQ1 and SQ2 including Josephson Junctions J1 and J2 respectively. These r-f SQUIDs are inductance-coupled with each other so as to put one of the SQUIDs in its "firing state" and put the other in its "extinction state" in response to an input signal in the form of magnetic flux. As shown an inductance means DL is provided to apply a drive of external magnetic flux .phi..sub.d to each SQUID. The SQUIDs SQ1 and SQ2 are magnetically coupled with each other by a mutual inductance M with such a coupling polarity that development of one of the SQUIDs into its "firing state" may drive the other SQUID into its "extinction state". The strength of the drive magnetic flux is just below the upper critical value .phi..sub.p, and when a very small input magnetic flux .epsilon..phi. is applied to one of the SQUIDs in addition to the drive magnetic flux, the SQUID will be put in its "firing state", and as a counter action, the other SQUID will be put in its "extinction state". For the purpose of applying an input magnetic flux to the SQUIDs a superconducting inductance means IDL is used to carry an input current .epsilon.I thereby generating and applying input magnetic fluxes of opposite polarities to the SQUIDs SQ1 and SQ2 respectively to assure of the positive appearance of the opposite states in the two SQUIDs. It, however, should be noted that it suffices that a single superconducting inductance means is provided to magnetically couple with one of the SQUIDs. For the purpose of providing an output signal another superconducting inductance means AL is used to magnetically couple with the SQUIDs to detect the appearance of the "firing state" in one of the SQUIDs. In short, a fluxoid type superconducting logic element might be said to be a fluxoid type binary amplifier which is designed to be magnetically energized and to be responsive to a very small amount of input magnetic flux .epsilon..phi. for providing an amplified amount of output magnetic flux .+-..phi..

FIG. 3 shows a modification of the embodiment of FIG. 2. As shown, it is constructed so as to apply an external magnetic flux to each SQUID by supplying a dc electric current Id to the inductance L of each SQUID. Also, it includes an inductance M' and an associated output circuit AL in which electric currents from SQ1 and SQ2 flow, so as to put one of the SQUIDs in its "firing state" and the other in its "extinction state" in response to an input signal from IDL, thus attaining the same result as in FIG. 2.

FIG. 4 shows another modification of the embodiment of FIG. 2. As shown, it has the same configuation as FIG. 2 in applying an external magnetic flux to each SQUID. However, an inductance M" is used to couple the two SQUIDs with each other. In operation the logic element of FIG. 4 responds to an input magnetic flux from IDL for putting one of the SQUIDs to its "firing state" and the other to its "extinction state".

FIG. 5 shows a threshold logic circuit, specifically a three-input majority logic circuit, f=maj (x, y, z), composed of a plurality of logic elements FF1-FF4 according to the embodiment of FIG. 3. Three logic elements FF1-FF3 are coupled to a logic element FF4 as indicated at LL. Assume that a drive current Idl flows to apply an external magnetic flux to each of the logic elements FF1, FF2 ad FF3 and that these logic elements represent different binary variables x, y and z respectively. Then, a drive current Id2 is supplied to the logic element FF4 to represent the majority logic result at its output terminal AL.

A "NOT" circuit can be easily constructed simply by reversing the polarity of either of the primary or secondary windings of a superconducting flux transformer for applying an input magnetic flux to a logic element. The superconducting flux transformer may be used as an input inductance means IDL, and therefore no extra circuit element is required for constructing a "NOT" circuit.

A magnetically coupled configuration of logic elements as shown in FIG. 5 has no directionality in conveying pieces of information. To assure that pieces of information are conveyed in a predetermined direction three or more phase clock signal generator may be used to supply drive magnetic fluxes (on electric currents), as is the case with a parametron. FIG. 6 shows the waveforms of such three-phase clock signal. Phase 1 shows a drive magnetic flux (or current) .PHI.dl (Idl) to be applied to FF1 FF2 and FF3; phase 2 shows a drive magnetic flux (or current) .PHI.d2 (Id2) to be applied to FF4; and phase 3 shows a drive magnetic flux (or current) .PHI.d3 (Id3) to be applied to a subsequent circuit (not shown). As shown, every waveform varies sinusoidally with its maximum above the external upper threshold magnetic flux and its minimum below the external lower threshold magnetic flux. When the majority logic circuit of FIG. 5 is controlled with the clock signal of FIG. 6, a group of logic elements FFl to FF3 and the final logic element FF4 will be put in standby in the order named, but will never be put in standby in the opposite way, thus assuring of unidirectional transmission. As an actual example fluxoid type superconducting logic elements including "weak link" or bridge type Josephson Junctions made of a superconducting niobium were used at "a"=.pi., and then their switching time was below 1 picosecond (10.sup.-12 seconds). Therefore, these logic elements can operate with clock signal of ten or more gigahertz. Clock signals other than sinusoidal waves are difficult to use. In FIG. 6 each clock signal is formed by superposing a sinusoidal wave on a d c bias corresponding to the intermediate value between .PHI.P and .PHI.R.

FIG. 7 shows another clock signal waveform which, if applied to the majority logic circuit of FIG. 5, can assure that pieces of information are conveyed in a predetermined direction. Assume that the logic elements FF1, FF2 and FF3 have same upper and lower threshold fluxes .PHI.P1 and .PHI.R1 and that the logic element FF4 has upper and lower threshold fluxes .PHI.P2 and .PHI.R2, the absolute values of which are larger than .PHI.P1 and .PHI.R1 respectively. The clock flux .PHI.d is shown as varying sinusoidally with its maximum above .PHI.P2 and its minimum below .PHI.R2 in FIG. 7. As is apparent from the drawing, the majority logic circuit of FIG. 5 is controlled with the clock flux .PHI.d, the logic elements FF1, FF2 and FF3 are assured to establish their binary states before the logic element FF4, as indicated at FF1, 2, 3 and FF4.

As for the amplitude of the sinusoidal clock signals of FIGS. 6 and 7, the maximum of the sinusoidal wave must be determined so as to be above the upper threshold value .PHI.P of the external magnetic flux but below a certain upper limit, for instance, 7/3 times as much as the upper threshold value .PHI.P for a=.pi.. The allowance of amplitude is advantageously great, and this is attributable to the differential combination of two SQUIDs according to this invention.

Niobium may be preferably used in producing a fluxoid type superconducting logic element according to this invention, and a configuration of inductances and Josephson Junctions as required can be easily formed, for instance, according to the lithography or sputtering technique.

As for the energy required for driving a single logic element according to this invention, assume that the device has an inductance L of 10pH. (this much inductance can be easily produced by the photolithography technique in the form of a single circular loop about 10 .mu.m across or of a single square about 10 .mu.m side.) Then, the required energy E is given by:

If this logic element is driven by clock signal of 10GHz, the required energy is equal to 2.times.10.sup.-9 watts. This figure is very small compared with the energy (2.times.10.sup.-6 watts) required for a conventional dc SQUID circuit capable of representing a binary digit in the form of voltage state.

One tenth of reduction of the logic element in size will multiply the required energy ten times. This is because the inductance of the reduced logic element decreases ten times as a result of physical size reduction. The required energy, however, can be reduced N.sup.2 times by increasing the number of turns N times. Thus, the required energy can be reduced to a desired value.