Method for Clock Rate Conversion

1. Field of the Invention

The present invention relates to a method for clock rate conversion of digitized television signals for generating a television signal having a prescribed processing clock rate given a fixed scan clock rate of the coded television signal.

2. Description of the Prior Art

The clock rates for sampling an analog television signal and the clock rate for further processing or, respectively, transmission of the digitized television signal are rigidly prescribed in the transmission of black-and-white and color television signals. These clock rates frequently do not coincide and likewise do not have a rational relationship. A clock rate conversion by which television signals having prescribed processing clock rates are acquired must then occur. These television signals can be supplied to a corresponding coder for further data reduction by way of a DPCM method.

What is meant by television signals are both the luminance signals and the chrominance signals. At present, the method is of interest particularly for luminance signals.

Various methods for clock rate conversion are known. A data stream having a first clock frequency is thereby converted into a second data stream having a different clock frequency. Such a method is disclosed in the periodical "Frequenz", Vol. 36, No. 10, 1982, pp. 275-279. To this end, a time-invariant, linear filter is employed to which the digitized signal values are supplied with the first clock frequency and which emits the digitized signals with a second clock frequency at the output via a summer element. This conversion method is co-employed in the present invention. The method, however, presumes that the relationship of the second clock rate to the first clock rate yields a rational value. Given the processing clock rate that are currently standard, however, this is usually not the case.

It is therefore the object of the present invention to provide a clock rate conversion method for digitized television signals which enables the acquisition of the television signal with a prescribed processing clock rate, even given a non-rational clock ratio.

Proceeding from the art mentioned above, the object of the present invention is achieved in that the television signal is converted by way of clock rate conversion with a conversion factor representing a rational number, being converted into a second television signal having a second clock rate, in that the data words of the second television signal are written into a memory with the second clock rate, and in that, of the stored data words of each television line, a plurality of data words deviating therefrom is read with the processing clock rate.

The extremely difficult problem of clock rate conversion given non-rational clock relationships is resolved in a simple manner by way of the present invention by the emission or addition of a few (m) digital signal values (picture points). The luminance signal, or a chrominance signal as well, is generally referred to here as a television signal. This is achieved via a memory in which, for example, all picture points of a television line are written as data words, but a few picture points at the beginning and at the end of each television line are not transmitted. The writing into the memory occurs with the second clock frequency generated by the scan rate converted and the reading of the memory occurs with the prescribed processing clock rate.

The realization of such a method presents no difficulties and requires only a slight expense. The omission of a few picture points can, of course, occur upon writing into the memory, as well as upon reading from the memory. The slight distortion of the read television pictures can hardly be noticed. It can, further, be compensated by means of a corresponding adjustment of the receiving apparatus.

It is advantageous in that the second television signal is intermediately stored in a first-in/first-out memory.

In terms of expense, the method can be most favorably implemented by using a first-in/first-out (FIFO) memory.

It is expedient that 13.5 MHz be provided as the scan rate, 10.125 MHz as the second clock rate and 3/4 as the conversion factor.

The conversion of the digitized television signal having a clock rate of 13.5 MHz into a digital television signal having a second clock frequency of 10.125 MHz is expedient since only a simple conversion factor of 3/4 need be realized.

It is advantageous that the first three and the last three data words of respectively 526 data words of a television line of the second television signal not be read.

The television picture is only slightly changed due to the omission of these data words.

Other objects, features and advantages of the invention, its organization, construction and operation will be best understood from the following detailed description, taken on conjunction with the accompanying drawing, on which:

FIG. 1 is a basic block circuit diagram for clock rate conversion according to the present invention; and

FIG. 2 is a schematic representation of an excerpt from a television picture.

Referring to the drawing, an analog television signal AS is supplied to a separation circuit 1 via an input 1.sub.1. A first output 1.sub.2 of the separation circuit 1 is connected to the input of an analog/digital converter 2 which also contains a sample-and-hold circuit. A second output 1.sub.3 of the separation circuit 1 is connected to an input 5.sub.1 of a clock generator 5. The output of the analog/digital converter 2 is connected to an input 3.sub.1 of a digital low-pass filter 3 which has an output 3.sub.3 connected to the data input 4.sub.1 of a clock rate converter 4 which, in turn, has an output 4.sub.4 connected to the data input 6.sub.1 of a memory constructed as a first-in/first-out (FIFO) memory. The data output of the memory is referenced 6.sub.4. For example, the clock generator 5 contains a plurality of phase-locked loops (PLL) which serve for generating the working clocks with the frequencies f.sub.T1 , f.sub.T2 and f.sub.T3. At an output 5.sub.2, the sampling frequency f.sub.T1 is supplied to the analog/digital converter 2 and the digital low-pass filter 3 via its clock input 3.sub.2. The same frequency is supplied to the clock rate converter 4 via its clock input 4.sub.2. A second clock frequency f.sub.T2 is emitted at the output 5.sub.3 of the clock generator 5 and is supplied to the clock rate converter 4 as a read-out clock via a second clock input 4.sub.3, and to the memory 6 via its first clock input 6.sub.2. The processing clock rate f.sub.T3 is supplied from a third clock output 5.sub.4 of the clock generator to the second clock input 6.sub.3 of the memory 6. Synchronizing pulses SI are also output at the output 5.sub.5 of the clock generator.

In this exemplary embodiment, a luminance signal which is referred to generally as a television signal in the following text is acquired from a closed-coder color television signal FS.

A digitized color television signal FS is acquired from the analog television signal AS via the analog/digital converter 2. The television signal LU1 is filtered out of the color television signal by the low-pass filter 3 whose limit frequency lies at about 3.9 MHz. The clock rate converter 4 converts the television signal LU1 into a second television signal LU2 whose frequency lies close to the processing frequency f.sub.T3. When the sampling of the analog television signal AS occurred with 13.5 MHz, then the television signal LU1 at the output of the digital low-pass filter 3 has the same data word rate. The data word rate is converted to 10.125 MHz by way of the clock rate converter 4. The conversion factor C of the clock rate converter 4 thereby amounts to 3/4. The data words are written into the memory 6 with a clock having the same frequency f.sub.T2. The reading occurs with a prescribed processing clock 10 MHz. The first three (m/2) and the last three data words of the luminance signal LU2 are respectively not written given use of a FIFO memory and, therefore, are not read (FIG. 2). The second clock frequency f.sub.T2 is synchronized with the processing clock rate f.sub.T3 via a phase-locked loop. The line sync pulses that are contained in the synchronizing pulses SI are employed for this purpose. A simple suppression of the write operation is also possible by way thereof by inhibiting the clock used for writing.

The synchronizing pulses SI are generally output separately from the television signal 3 read from the memory 6.

Although we have described our invention by reference to particular illustrative embodiments thereof, many changes and modifications of the invention may become apparent to those skilled in the art without departing from the spirit and scope of the invention. We therefore intend to include within the patent warranted hereon all such changes and modifications as may reasonably and properly be included within the scope of our contribution to the art.