Drive Circuit for Driving a Transistor

This invention relates to a drive circuit having a transformer of which the secondary winding is connected to the base of a transistor to feed a base current and of which the primary winding is connected to a drive source driving the transistor in a switching operation.

An example, of such drive circuit is shown in FIG. 1 in which an output transistor in a horizontal deflection circuit of a television set is driven by the drive circuit. Referring to FIG. 1, there are shown capacitors 1, 4, 10 and 13, resistors 2 and 5, a drive transistor 3, a drive transformer 6, an output transistor 7, a damper diode 8, a deflection yoke 9, a flyback transformer 11, and a high-voltage rectifying diode 12.

FIG. 2 shows signal waveforms at respective portions in operation. The waveform at A is of the voltage (hereinafter referred to as drive pulse) at the collector of the drive transistor 3 in FIG. 1. The waveform at B is of the current flowing in the primary winding of the drive transformer 6. The waveform at C is of the base voltage (V.sub.BE) of the output transistor 7. The waveform at D is of the base current of the output transistor 7 (the forward base current of the output transistor 7 is assumed to be positive). The waveform at E is of the collector voltage of the output transistor 7. At the base current D of the output transistor 7, the forward base current and reverse base current are represented by i.sub.B1 and i.sub.B2, respectively.

The circuit operation will be described with reference to FIGS. 1 and 2. The drive transistor 3 is operated in switching operation by a horizontal oscillation pulse H.sub.osc as shown in FIG. 2A. Now, let us consider the state at t.sub.0. Since before time t.sub.0, the base current I.sub.B1 is flowed to the base of the output transistor 7, causing it to perform switching operation, the transistor 7 is conductive in overexcited state. In the drive transformer 6, primary-to-secondary turns ratio is 1:n, the beginning of each winding is indicated by the black dot ".", and when the drive transistor 3 becomes conductive at time t.sub.0, a voltage v.sub.2 is induced in the secondary winding of the transformer 6 in the direction shown in FIG. 1. The voltage, v.sub.BE between the base and emitter of the output transistor 7 is a positive value as shown in FIG. 2C until the accumulated minority carriers stop from recombination. This value is substantially the same as in the case in which the forward base current is flowed. In other words, during the storage time, T.sub.so (from time t.sub.0 to t.sub.1) of the output transistor 7, the electromotive force v.sub.2 is in the forward direction relative to the base-emitter junction and thus the peak current of I.sub.B2 is flowed as shown in FIG. 2D. At this time, current of about 1/n times that in the secondary is flowed in the primary of the drive transformer 6 chiefly from the charged capacitor 4 as shown in FIG. 2B. At time t.sub.1, the output transistor 7 ends its storage time and is reverse-biased between the base and emitter. Consequently, the base current thereof is sharply decreased. At the same time, the collector current of the output transistor 7 is decreased from the maximum value I.sub.cp to zero and thus cut off.

At this time, the primary current of the drive transformer 6 cannot be rapidly decreased, i.e., current is flowed in the primary from time t.sub.1 to t.sub.2 as shown in FIG. 2B so as to cancel out the magnetic flux due to the rapid change of secondary current of the transformer. The value of the primary current during the time t.sub.2 to t.sub.3 is determined by the impedance of the primary of the drive transformer and the resistance 5. When the drive transistor 3 is cut off at time t.sub.3, the secondary current of the drive transformer 6 is flowed and opposed to the change of magnetic flux due to the rapid decrease of the primary current, or in the forward direction between the base and emitter of the output transistor 7 as shown in FIG. 2D. Accordingly, during the period in which the forward base current is flowed, the electromotive force v.sub.2 is in the reverse direction to that in FIG. 1.

Here, it is assumed that for both cases when the output transistor 7 is cut off and conducting in saturation, the change of flux in the drive transformer 6 is substantially equal and the electromotive force is v.sub.1. In addition, it is assumed that the input impedance, Z.sub.TR of the output transistor 7 when viewing from the base, is about the same for the storage period and forward conducting period of the output transistor 7, and that the input impedance of the transformer 6 when viewing from the secondary of the transformer 6, is represented by Z.sub.T. Then, the base currents i.sub.B1 and i.sub.B2 are expressed as ##EQU1## Thus, i.sub.B1 <i.sub.B2. Generally, ##EQU2##

The maximum values I.sub.B1 and I.sub.B2 of the i.sub.B1 and i.sub.B2 are determined by the amount of charge stored in the limiting capacitor 4 (C.sub.s). The best condition is achieved when the period T.sub.DOFF in which the capacitor 4 is charged is nearly equal to C.sub.s R.sub.s.

Thus, the output transistor 7 carries out switching operation and the well known deflection circuit shown in FIG. 1 produces necessary deflection current and high voltage.

If, now, the deflection frequency is increased to enable high precision displaying and so on, the loss in the period of the fall time t.sub.f of the output transistor 7 become problem. The loss P.sub.s in period of the fall time t.sub.f is expressed by P.sub.s .varies.P.sub.H .multidot.t.sub.f.sup.2 .multidot.f.sub.H.sup.3 [here, it is assumed that the scanning line ratio (scanning period/horizontal period) is constant]. In the above expression, P.sub.H is the deflection power index and f.sub.H the horizontal deflection frequency.

From the above expression, it will be evident that when the deflection frequency f.sub.H is increased, the reduction of the loss P.sub.s can be expected only by decreasing the fall time t.sub.f because the deflection power index can hardly be expected to be decreased. The transistor of short t.sub.f has been developed by device reserchers; for example, an bipolar transistor of collecter current, 5A and breakdown voltage, 1,300 V (the maximum voltage between the collector and base with the emitter open) has 200 nsec or below of t.sub.f.

The transistors generally used in television sets and so on have about 1 .mu.sec of t.sub.f. In the case using transistor having the same P.sub.H as that used in the general television set, the deflection frequency at which substantially the same power loss P.sub.s is caused is about 46 kHz. When the deflection frequency exceeds 45 kHz, the power loss is increased in proportion to the cube of the frequency, or to ##EQU3## as compared with the temperature increase of the output transistor in the general television set. When the fall time of the output transistor is shortened, the temperature characteristic of the fall time tends to be degraded. For example, in the transistor with t.sub.f of 200 nsec, the t.sub.f at 150.degree. C. is three times or above larger than that at the normal temperature (in general, 1.5 to 2 times larger). In other words, the transistor designed to operate for high-speed switching at the normal temperature has poor temperature characteristic of t.sub.f. If temperature is increased by any cause, the t.sub.f is increased and then temperature-rise is accelerated, thereby to occure thermal runaway causing breakdown of the transistor. In a transistor designed not for a particular use, or designed to have somewhat short t.sub.f at the normal temperature, when the transistor is operated at high frequency, the temperature of the transistor is increased due to the loss in period of the fall time t.sub.f and then the transistor is developed into the breakdown by the thermal runaway.

It is an object of this invention to provide a high-reliability drive circuit with no drawbacks of the prior art, capable of reducing the fall time of the output transistor, thereby lowering the loss at the output transistor and preventing the output transistor from thermal runaway.

According to this invention, there is provided a drive circuit having a transformer provided with a tap on its secondary winding so that the ratio between the forward base current and reverse base current of a transistor to be driven by the drive circuit is arbitrarily selected by a diode switch, thereby reducing the fall time of the transistor.

The invention will become more readily understood from the following exemplary description taken with the accompanying drawing, wherein:

FIG. 1 is a circuit diagram of a conventional drive circuit;

FIG. 2 is a diagram of waveforms at respective operating portions in FIG. 1; and

FIGS. 3 and 4 are circuit diagrams of embodiments of this invention.

Embodiments of this invention will be described with reference to FIGS. 3 and 4. FIGS. 3 and 4 are circuit diagrams of different embodiments of the invention. In FIGS. 3 and 4, like parts corresponding to those of FIG. 1 are identified by the same reference numerals.

In FIG. 3, the drive transistor 3 and output transistor 7 operate in the same switching way as in the prior art, and thus will not be described in detail.

In the embodiment of FIG. 3, a drive transformer 1' has a tap at a desired mid position of its secondary winding, and a diode 15 is connected between the tap and ground as illustrated. A diode 14 is connected between the beginining end of the secondary winding of the transformer and ground. Let us find the forward base current i.sub.B1 and reverse base current i.sub.B2 of the output transistor 7 in this drive circuit similar to the prior art. Assuming that the impedance of the diode 14, 15 is represented by Z.sub.D, and the forward voltage drop thereof by v.sub.D, then ##EQU4##

From the above expressions, the ratio between the maximum values I.sub.B1 and I.sub.B2 of i.sub.B1 and i.sub.B2 can be changed arbitrarily by the number of turns to be made the tap of the drive transformer 6'. The rise time of the output transistor upon switching, t.sub.r ; the storage time thereof, t.sub.s ; and the fall time, t.sub.f can be expressed by using the charge control model method as ##EQU5## where .tau..sub.b is the base constant of the charge control, .tau..sub.s is the saturated region charge control parameter, and I.sub.BS is the base saturation current.

Thus, the rise time t.sub.r is short if I.sub.B1 is large, the storage time t.sub.s is short if ##EQU6## is large, and the fall time t.sub.f is short if I.sub.B2 is large. In other words, in order for the horizontal deflection output transistor to have short storage time t.sub.s and fall time t.sub.f and to operate properly, it is necessary to increase the ##EQU7## ratio.

According to this first embodiment of this invention as shown in FIG. 3, the ##EQU8## ratio can be selected to be an arbitrary value, and the fall time t.sub.f and storage time t.sub.s can be made short.

A second embodiment of the invention will be described with reference to FIG. 4. The second embodiment is different from the first embodiment in the number, positions and polarity, of diodes used. A diode 16 is connected between the tap and ground, with its anode connected to ground.

In FIG. 4, the operation of the drive transistor 3 and output transistor 7 is the same as in FIGS. 1 and 3, and thus will not be described. In the same way as in the first embodiment, i.sub.B1 and i.sub.B2 can be expressed as ##EQU9##

According to that the electromotive fource v.sub.22 is lessened by the voltage drop across an impedance of the winding at which i.sub.D and v.sub.22 are induced, the maximum values I.sub.B1 and I.sub.B2 of i.sub.B1 and i.sub.B2 can be arbitrarily selected corresponding to the position of the tap on the drive transformer 6'. Thus, the same effect as in the first embodiment can be achieved.

As mentioned above, if the ratio between the I.sub.B1 and I.sub.B2 can be arbitrarily selected by providing a tap on the drive transformer (or two or more windings) and a diode, the drive circuit can be used in the same manner as the first embodiment.

Moreover, while a horizontal deflection circuit is used in the above embodiments, this invention can be applied to other drive circuits for driving output transistor at high frequency.

According to the drive circuit of the invention, the fall time of the transistor to be driven can be 20 to 30% shorter, so as to reduce power loss, effect on prevention of thermal runaway and improve reliability. In addition since the storage time becomes short, it is effective to increase the switching speed of the switching circuit.