Temperature Compensated Logarithmic Circuit

1. Field of the Invention

This invention relates to electrical circuits for producing output signals according to a logarithmic function. More particularly, this invention relates to improved circuitry for developing a temperature-independent logarithmic output signal.

2. Description of the Prior Art

Various kinds of analog logarithmic circuits have been used industrially for many years. These have included log-amps (having only one variable input signal) and log-ratio circuits (having two variable input signals). Generally, the logarithmic function is established by a pair of opposed P-N junctions carrying respective currents I.sub.1, I.sub.2, with the differential voltage kT/q (ln I.sub.1 /I.sub.2) being used as the basic output signal. Since the output signal is proportional to absolute temperature, it is evident that some form of temperature compensation must be provided for any such circuitry which is required to function accurately at varying temperatures.

There has been a problem in providing temperature-compensated logarithmic circuits which are suitable for fabrication in monolithic form, i.e. integrated-circuit chips. Commonly, in prior circuits a resistor having a high temperature-coefficient (TC) is used to effect the required temperature compensation. However, providing such a resistor is difficult to do monolithically. As a consequence, an external high-TC resistor generally is employed. This is not satisfactory because the product must then be manufactured in module format rather than as a totally monolithic implementation.

In accordance with the invention, logarithmic circuits (either log-amp or log-ratio) are provided wherein the need for any special components, such as a temperature-compensation resistor, is eliminated by the use of compensation circuitry based on junction behavior alone.

In preferred embodiments of the invention, a pair of opposed P-N junctions are supplied with input currents I.sub.1, I.sub.2 to develop the basic logarithmic relationship. The resulting log-ratio signal is coupled to compensating circuitry including a second pair of P-N junctions with their common emitters supplied by a current source producing a current proportional-to-absolute-temperature (PTAT).

The PTAT current split between the second pair of junctions is modulated in accordance with the log ratio (ln I.sub.1 /I.sub.2); the temperature-induced variations introduced by the first pair of junctions are compensated for by equal and opposite temperature-induced variations introduced by the PTAT current source. A final output signal is developed proportional to the modulation factor in the second pair of junctions, and this output signal is independent of temperature.

Other objects, aspects and advantages of the invention will be pointed out in, or apparent from, the following detailed description of preferred embodiments of the drawings.

FIG. 1 is a schematic diagram of a relatively simple version of the basic circuit, illustrating the principles of the invention;

FIG. 2 is a modified embodiment using a balanced circuit configuration; and

FIG. 3 is a more detailed exposition of a circuit of the type shown in FIG. 2. FIG. 4 is a supplemental modification of the core portion of FIG. 2.

Referring now to FIG. 1, there is shown a relatively simple version of a logarithmic circuit comprising a pair of matched transistors Q.sub.1, Q.sub.2 having a common emitter connection to establish opposed P-N junctions. The base of Q.sub.1 is grounded, and its collector is connected to an input terminal 10 to receive a variable input current I.sub.1. This input terminal also is connected to the input of a high-gain inverting amplifier 12 the output of which drives the common emitter connection of Q.sub.1, Q.sub.2, forcing I.sub.1 through Q.sub.1.

The collector of Q.sub.2 receives a current from a source I.sub.2 which is a constant current in the case of a log-amp application, or a variable current for a log-ratio application. The amplifier 12 supplies the current I.sub.2 on demand.

The base of Q.sub.2 is connected through a resistor R to ground, and to the collector of a transistor Q.sub.3. The base of Q.sub.3 is grounded, and its emitter is connected to the emitter of a matched transistor Q.sub.4 having its collector grounded. The common emitters of Q.sub.3, Q.sub.4 are connected to a current source I.sub.T which produces a PTAT current (i.e. proportional-to-absolute temperature). Q.sub.3 carries a fraction of the PTAT current xI.sub.T while Q.sub.4 carries the remaining current (1-x) I.sub.T.

It will be seen that the collector current of Q.sub.3 also passes through the resistor R. Thus, the voltage at the upper end of the resistor will be -x I.sub.T R with respect to ground. Accordingly, the loop equation from the grounded base of Q.sub.1 to the grounded base of Q.sub.3 can be written as: ##EQU1## where I.sub.s is the junction saturation current simplify the analysis merely for the purpose of illustration, it will be assumed that the product I.sub.T R is set at the value kT/q. Substituting this in equation (1) gives: ##EQU2## Combining terms and dividing by kT/q produces: ##EQU3## Thus the modulation factor "x" is directly proportional to the desired logarithmic ratio, and is free from temperature effects. To obtain a corresponding output signal, it is only necessary to produce an output signal corresponding to "x".

This can be achieved, as illustrated in FIG. 1, by employing a third pair of matched P-N junctions Q.sub.5, Q.sub.6, coupled to the base of Q.sub.4 and arranged in a mirrorimage configuration. A constant-current source I.sub.R is connected to the common emitters of Q.sub.5, Q.sub.6. It will be seen that the current through Q.sub.6 is x I.sub.R, and thus serves as the output current I.sub.OUT. To develop a corresponding output voltage, the collector of Q.sub.6 may be connected to an inverting high-gain amplifier 20 having a feedback resistor R.sub.s. The ouput voltage then will be: ##EQU4## Thus it will be understood that the output voltage is independent of temperature, and is produced without any need for special components such as high-TC resistors. Accordingly, such a circuit can readily be implemented entirely in monolithic format.

In a log-amp application, where I.sub.2 is fixed, the error voltage at node N is not very important since it can be current-driven; the small base currents for Q.sub.4, Q.sub.5 may be negligibly small. I.sub.T is readily generated by an E.sub.go circuit, e.g. of the general type illustrated in FIG. 2 of U.S. Pat. No. 3,940,760 (Brokaw). It may also be noted that if I.sub.R and I.sub.T are nearly the same, the circuit does not even require good log-conformance from Q.sub.3 to Q.sub.6, since their ohmic errors are similar.

To provide a well-controlled virtual ground at node N, for example to implement a highly accurate log-ratio circuit, a low-gain, non-inverting amplifier could be inserted at the circuit point labelled A in FIG. 1. FIG. 2 shows another circuit arrangement in which node N is very close to ground for I.sub.1 =I.sub.2. Analysis of this balanced circuit is straight-forward, and shows that: ##EQU5##

Simply by way of example, FIG. 3 is provided to illustrate how some of the details of a practical circuit based on FIG. 2 might be implemented. The functioning of the circuit is straightforward in most respects. Q.sub.7 and Q.sub.8 serve a dual purpose by reducing the base currents from Q.sub.4 through Q.sub.6, and by providing some headroom for the collectors of the four transistors. I.sub.T and I.sub.R are set at relatively high values. This ensures that the resistor R can be sufficiently small so that base-current errors in Q.sub.1 at the high-input end of the signal range cause negligible error in the output.

Referring again to FIG. 2, it will be understood that finite beta in the "core" transistors Q.sub.1 and Q.sub.2 will have some adverse effect. More specifically, although base currents in Q.sub.1 and Q.sub.2 will not alter the voltage across the resistors R (since this is forced by the feedback system to always equal V.sub.T ln (I.sub.1 /I.sub.2), they do alter the value of the modulation index, x, required to set up this voltage, and hence introduce an error in the final output. FIG. 4 shows a supplemental modification to the core portion of the FIG. 2 arrangement which avoids this problem, in the following way. Q.sub.14 generates a base current equal to the total base currents of Q.sub.1 and Q.sub.2. Q.sub.12 and Q.sub.13 form an emitter-coupled pair which proportion this current in the same way as Q.sub.1 and Q.sub.2 proportion the total emitter current I.sub.1 +I.sub.2. Due to the crossed connections, and assuming that the base-current defect factor .delta.(.apprxeq.1/.beta.) is small, the collector current of Q.sub.12 is closely equal to the base current of Q.sub.2 ; likewise, the collector current of Q.sub.13 is closely equal to the base current of Q.sub.1. Thus, the base current in each resistor is .delta.(I.sub.1 +I.sub.2), and the net differential error is zero.

Although several preferred embodiments of the invention have been disclosed herein in detail it is to be understood that this is for the purpose of illustrating the invention, and should not be construed as necessarily limiting the scope of the invention, since it is apparent that many changes can be made by those skilled in the art while still practicing the invention claimed herein.