Power Supply Control Circuit

1. Field of the Invention

The present invention relates to a power supply control device including circuitry for holding the power supply from a battery to a battery-operated circuit for a certain time period after a power switch is turned off.

2. Description of the Prior Art

Conventionally, a camera exposure meter circuit, automatic exposure control circuit or the like is provided with circuitry for supplying power switch on in response to the shutter buttom operation at its half-depression position, which is shallower than the stroke where the shutter release takes place and for maintaining or holding the power supply operative to supply power for a certain time period even if an operator releases his finger from the shutter button to facilitate camera handling.

In a camera with such circuitry, an operator can view the exposing condition or exposure control status for a certain time period after releasing his finger from the shutter button. In such conventional power supply holding circuits, however, the power supply holding time is set as a constant value even where a battery is weak or depleted. This kind of circuit with a power supply holding function, which is directed only to the purpose of facilitating camera handling, and is not necessarily required to take a photograph, has a disadvantage in that consumption of a batter is hastened.

Accordingly, it is an object of the invention to provide an improved power supply control circuit in which the power supply holding time is reduced as the voltage of a power source decreases to prevent the battery from being wasted.

The foregoing object and other objects are accomplished according to the present invention in a power supply control circuit for controlling power supply to a battery-operated circuit, the control circuit comprising a circuit for starting time-measuring upon a manual operation and producing a time-measuring signal for a predetermined time period from the starting time, a circuit for holding the power supply operative to supply power while the time-measuring signal is being produced, and a circuit for detecting the battery voltage and reducing the predetermined time period to be time-measured in the time-measuring circuit as the battery voltage goes down.

The invention will be more fully understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a circuit diagram of a first embodiment of power supply control circuit according to the present invention.

FIG. 2 is a plot of power supply holding time versus battery voltage in the circuit of FIG. 1.

FIG. 3 is a circuit diagram of a second embodiment of power supply control circuit according to the present invention.

FIG. 4 is a plot of a power supply holding time versus battery voltage in the circuit of FIG. 3.

FIG. 5 is a circuit diagram of a third embodiment of power supply control circuit according to the present invention.

FIG. 6 is a plot of power supply holding time versus battery voltage in the circuit of FIG. 5.

A first embodiment of power supply control circuit in accordance with the invention is shown in FIG. 1. Battery E supplies exposure value arithmetic circuit 1 with power upon the closure of power switch SW.sub.1. In an exposure meter, power switch SW.sub.1 is closed through the depression operation on a push button provided therein and opened through the release from the push button. In a camera including an exposure metering circuit, the power switch is closed in response to the half-depression operation on a shutter button and opened through the release operation from the shutter button. Resistors R.sub.2, R.sub.3, R.sub.4 and R.sub.5, capacitor C.sub.1 and transistors Q.sub.1 and Q.sub.2 constitute a power supply holding circuit. Exposure arithmetic circuit 1 receives as input information a subject brightness detected through photodiode PD, film sensitivity, shutter speed and aperture value respectively determined by setting variable resistor R.sub.f and evaluates them as to whether they meet a proper exposure condition. The evaluation result is displayed on light emission diodes LED.sub.1 and LED.sub.2 in a predetermined mode. Transistor Q.sub.3 which serves to control the power supply to arithmetic circuit 1, is biased by means of resistors R.sub.6 and R.sub.7 so as to be turned off when a power supply voltage V to arithmetic circuit 1 falls to a lower limit voltage V.sub.1 for arithmetic circuit 1. And also, resistors R.sub.4 and R.sub.5 are arranged so that a voltage slightly higher than the lower limit voltage V.sub.1 becomes the critical voltage for ON or OFF state in transistor Q.sub.2. The working of the circuit will be explained in three cases of battery consumption condition. In the explanation, V is a voltage of the battery, V.sub.1 a lower limit voltage which assures the proper operation of arithmetic circuit 1 as a line voltage and V.sub.2 a voltage higher than V.sub.1 which does not fall to lower limit voltage V.sub.1 during the power supply holding time period (in other words, V.sub.2 is a voltage which assures that arithmetic circuit 1 can normally operate for the power supply holding time period.).

In this case of battery condition, battery E has a sufficient or adequate voltage. As power switch SW.sub.1 is closed, the voltage developed on resistors R.sub.2 and R.sub.3 biases transistor Q.sub.1 to its ON state. The collector current of transistor Q.sub.1 flows through resistors R.sub.4 and R.sub.5 and develops a bias voltage which causes transistors Q.sub.2 and Q.sub.3 to be turned ON. Transistors Q.sub.1 and Q.sub.2 constitute a positive feedback circuit. In this embodiment, during the period while the voltage across capacitor C.sub.1 remains small, after power switch SW.sub.1 has been opened, the above-mentioned positive feedback operation keeps transistor Q.sub.1 in its ON state. While power switch SW.sub.1 remains closed, the potential at one terminal a of capacitor C.sub.1 can not rise over the forward voltage of diode D.sub.2 because terminal a is clamped to ground through diode D.sub.2 and power switch SW.sub.1. Accordingly, the bias voltage which causes transistor Q.sub.1 to be turned ON is unchanged. The conduction path of transistor Q.sub.3 in its ON state forms a power supply line to arithmetic circuit 1 as long as power switch SW.sub.1 is closed. Thereafter, when power switch SW.sub.1 is opened, the clamping for terminal a is released. The collector current of transistor Q.sub.2 charges capacitor C.sub.1 and the potential of terminal a gradually rises to the level which can turn transistor Q.sub.1 off, after a predetermined time period. When transistor Q.sub.1 is turned OFF, the bias voltage which causes transistor Q.sub.3 to be turned on is lost and the power line to arithmetic circuit 1 is disconnected. The rising potential at terminal a is a function of time constant determined by capacitor C.sub.1 and resistors R.sub.2 and R.sub.3. During a time period from the opening of power switch SW.sub.1 to the time when the potential at terminal a rises to the level which turns transistor Q.sub.1 off, transistors Q.sub.1 and Q.sub.3 remain ON and continue supplying arithmetic circuit 1 with power to work an exposure meter. The time required to charge capacitor C.sub.1 determines the power supply holding time period. In this embodiment, holding time measurement starts with the opening of power switch SW.sub.1. Alternatively, it is possible to constitute a circuit in which the time measurement starts with the closure of switch SW.sub.1.

In this case of battery condition, the voltage V of battery E is nearly equal to the lower limit voltage V.sub.1. The closure of power switch SW.sub.1 turns transistor Q.sub.1 on. With transistor Q.sub.1 in its ON state, the collector current of transistor Q.sub.1 which flows through resistors R.sub.4 -R.sub.7 develops bias voltages for transistors Q.sub.2 and Q.sub.3. As battery voltage V is higher than V.sub.1 but lower than V.sub.2, transistor Q.sub.3 is turned on and supplies power to arithmetic circuit 1, while transistor Q.sub.2 can not be turned on. While transistor Q.sub.2 is in its OFF state, there is no potential difference between terminals a and b of capacitor C.sub.1 because both terminals are clamped through power switch SW.sub.1 to ground (through diodes D.sub.2 and D.sub.3, respectively). That is, capacitor C.sub.1 is not charged in a reverse polarity through discharging resistor R.sub.1 described later. Thus, polarized capacitors like tantalum electrolytic capaccitors and aluminum electrolytic capacitors are available for capacitor C.sub.1. Now, power switch SW.sub.1 is opened. At this time, capacitor C.sub.1 is not charged through transistor Q.sub.2 because transistor Q.sub.2 is in its OFF state. The potential at terminal a immediately rises to the level which turns transistor Q.sub.1 off and in turn transistor Q.sub.3 off to cut off the power supply to arithmetic circuit 1. Accordingly, a user notices through the off-light state of display elements LED.sub.1 and LED.sub.2 in arithmetic circuit 1 that the exposure meter has stopped its operation just after power switch SW.sub.1 was opened and is thus informed that the battery has been consumed to the condition where the battery voltage V will soon fall to lower limit voltage V.sub.1. Even in this situation, if the operator closes power switch SW.sub.1, the exposure metering circuit will be able to operate.

When power switch SW.sub.1 is closed, transistors Q.sub.2 and Q.sub.3 can not be turned ON, though transistor Q.sub.1 can be ON. That is, the power to arithmetic circuit 1 can not be supplied. At this status, display elements LED.sub.1 and LED.sub.2 remain unlighted and the operator learns that battery E has been consumed or exhausted to an un-usable condition. Naturally, even immediately after power switch SW.sub.1 has been opened, transistor Q.sub.3 is not turned on.

The operating characteristic of the circuit of FIG. 1 is shown in FIG. 2. The variable on the vertical axis is a power supply holding time t time-measured from the opening of power switch SW.sub.1 and the variable on the horizontal axis a battery voltage V. When V>V.sub.2, holding time t is continuously reduced as the battery voltage goes down. This is because the charging current through resistor R.sub.2 which biases transistor Q.sub.1 becomes small more rapidly in a lower battery voltage.

A second embodiment of power supply control circuit in accordance with the invention is presented in FIG. 3. In this embodiment, as compared with the circuit of FIG. 1, the change of holding time t when battery voltage V is higher than V.sub.2 is so emphasized that a user may learn the change of battery voltage in the range higher than V.sub.2 from the change of holding time. This embodiment is designed as an exposure control circuit in a magnetic release system. For clarity, those elements in this embodiment which are functionally the same as those of FIG. 1 are identified by the same reference characters. Power switch SW.sub.1 and switch SW.sub.2 operate serially. As a shutter button is depressed in a half stroke, power switch SW.sub.1 is closed. And further depression on the shutter button brings the closure of switch SW.sub.2 which causes the magnetic release mechanism to work for taking photograph. The operation of the second embodiment is as follows.

When battery E has a sufficient or adequate voltage, the closure of power switch SW.sub.1, which is brought by the half-depression on the shutter button, turns on transistor Q.sub.10 through reverse current blocking diode D.sub.10. Through the conduction path of transistor Q.sub.10 in its ON state, auto-exposure control circuit 2 is supplied with power. Auto-exposure control circuit 2 receives as input information a subject brightness detected by photodiode PD, film sensitivity value and aperture value respectively determined by setting variable resistor R.sub.f and arithmetically evaluate them to display a proper shutter speed value on meter M and also, when the magnetic release mechanism is operated, to control a shutter (not shown) at the proper shutter speed through shutter control magnet Mg.sub.2. The line voltage is divided in serially connected resistors R.sub.10, R.sub.11 and R.sub.12. An output voltage V.sub.A1 of voltage follow amplifier A.sub.1 is represented as ##EQU1## where K.sub.1 is constant. The closure of power switch SW.sub.1 also turns transistor Q.sub.11 on. With transistor Q.sub.11 in its ON state, capacitor C.sub.10 is shorted and thus not charged. Voltage source ES produces a constant voltage like a zener diode or band-gap regulator which works when transistor Q.sub.10 is in its ON state. Current source I.sub.1 is a current sink source which provides charge current i.sub.1 to capacitor C.sub.10 when transistor Q.sub.11 is in its OFF state, as described later. When transistor Q.sub.11 is turned on through the closure of switch SW.sub.1, the voltage at non-inverting input+ of comparator A.sub.2 is made equal to the output voltage V.sub.A1 of follower amplifier A.sub.1, that is V.K. In this context, the sufficient battery voltage means that the output voltage V.sub.A1 =V.K.sub.1 of follower amplifier A.sub.1 is higher than the voltage V.sub.ES of constant voltage sourse ES. Thus, comparator A.sub.2 produces its high level output which causes transistor Q.sub.12 to be turned on. As a result, the circuit has a positive feedback function which allows transistor Q.sub.10 to remain in its ON state even after power switch SW.sub.1 has been opened. A voltage V.sub.A3in which is derived by dividing the line voltage V through resistors R.sub.10, R.sub.11 and R.sub.12 is applied to non-inverting input+ of comparator A.sub.3. The voltage V.sub.A3in is represented as ##EQU2## where K.sub.2 is constant. It will be easily understood that K.sub.2 >K.sub.1. Thus, the input voltages of comparators A.sub.1 and A.sub.3 are in a relation of V.sub.A3in >V.sub.A1.

When the battery possesses a voltage sufficient to exhibit the relation of V.K.sub.2 >V.sub.ES, comparator A.sub.3 produces a high level which causes transistor Q.sub.13 to be turned on. Through the conduction path of transistor Q.sub.13 in its ON state, shutter speed meter M can indicate a controlled shutter speed value. At this state, further depression on the shutter button closes switch SW.sub.2. The high level output of comparator A.sub.3 turns transistor Q.sub.14 on. The charge in capacitor C.sub.11 which has been accumulated through a resistor by the line voltage discharges as a current for magnetizing magnet Mg.sub.1 to actuate a magnet release mechanism (not shown) which conducts a photograph taking sequence. Once the photograph taking sequence starts, transistors Q.sub.10 and Q.sub.11 are adapted to keep their ON state through line 3. That is, even if power switch SW.sub.1 is opened during the photograph taking sequence, the same condition as when the power switch is closed is secured until the completion of exposure. Thereafter, when power switch SW.sub.1 is opened, while transistor Q.sub.11 is turned off, transistor Q.sub.10 continues its ON state because of the positive feedback function through transistor Q.sub.12 in its ON state. As transistor Q.sub.11 is turned off, capacitor C.sub.10 which has so far been shorted by transistor Q.sub.11 in ON state is charged by constant current sink sourse I.sub.1. When a voltage at non-inverting input+ of comparator A.sub.2 drops below the voltage V.sub.ES of constant voltage source E.sub.S which is applied to inverting input-of comparator A.sub.2, the output of comparator A.sub.2 becomes a low level which places transistor Q.sub.12 in its OFF state. As a result, the positive feedback function is lost and then transistor Q.sub.10 is turned off so that the power supply line to exposure control circuit 2 is broken. That is, the power supply holding time is determined by the charging time in capacitor C.sub.10. The interval t from the opening of power switch SW.sub.1 to the time when transistor Q.sub.10 is turned off has the following relation with voltage V of battery E. ##EQU3##

Where battery voltage V goes down to the level in which V.K.sub.1 .ltoreq.V.sub.ES (that is V.ltoreq.V.sub.ES /K.sub.1), power supply holding time t becomes zero.

Where V.sub.ES /K.sub.2 <V<V.sub.ES /K.sub.1, the holding time t is zero, while the power supply to exposure control circuit 2 can be conducted as long as power switch SW.sub.1 is closed because the output voltage of comparator A.sub.3 is a high level in the relation of V.K.sub.2 >V.sub.ES. Accordingly, the user can learn that the battery is still usable but will be soon consumed to an unusable level.

Where V<V.sub.ES /V.sub.2, the output voltage of comparator A.sub.3 is a low level which places transistor Q.sub.13 in its OFF state and thus meter M does not work. The user knows from the status of meter M that battery E has been exhausted to an unusable condition. As another aspect, even if the user erroneously depresses the shutter button to a position where shutter release takes place and turns switch SW.sub.2 on, magnet Mg.sub.1 does not start the photograph taking sequence of the camera because transistor Q.sub.14 is in its OFF state.

FIG. 4 shows a solid line the relation between voltage V of battery E and power supply holding time t during which transistor Q.sub.10 maintains its ON state after power switch SW.sub.1 is opened. V.sub.12 is a voltage at a point of V=V.sub.ES /K.sub.1 where the holding time is zero. V.sub.11 is a voltage at a point of V=V.sub.ES /K.sub.2 where meter M does not work upon the closure of power switch SW.sub.1 because the output of comparator A.sub.3 is a low level, and the photographing sequence does not start even if switch SW.sub.2 is closed. With the resistance value of resistor R.sub.11 reduced to zero so that K.sub.1 =K.sub.2, it is possible to make the release function inoperative at a point where the holding time is zero. The characteristic in such an operation is shown as a dash line in FIG. 4.

FIG. 5 shows a third embodiment in which the holding time control is processed in a digital manner to obtain a holding time which changes in a step manner as the battery voltage varies. Those elements in this embodiment which are functionally the same as those of FIG. 3 are identified by the same reference characters. Digital aritmetic circuit 20 analog-digital converts the brightness information of a shooting-subject detected through photodiode PD and conducts a digital calculation for proper exposure by processing the converted digital brightness information, film speed, aperture value and other exposure parameters set by digital setting circuit 21. The calculation result is transferred to digital display circuit 22. When transistor Q.sub.13 is in its ON state, the calculation result is displayed in a predetermined mode on digital display 23. Digital arithmetic circuit 20 includes an oscillator circuit of a predetermined frequency. This oscillator circuit generates a clock pulse sequence required to conduct digital arithmetic calculation in circuit 20 and also provides, through clock line 6, display circuit 22 and power supply holding timer 24 with another clock pulse sequence synchronized with the former clock pulse sequence. Timer 24 can be constructed by conventional digital counter technology. When transistor Q.sub.10 is placed in its ON state, timer 24 receives the clock pulses forwarded from the oscillator circuit in digital arithmetic circuit 20. At the time when power switch SW.sub.1 is turned from its closed condition into an open condition, timer 24 starts the count and provides gates G.sub.1 and G.sub.2 with timing signals each of which has a transition from a high level to a low level at a different time from each other. The working is as follows.

When battery E has a sufficient voltage, the closure of power switch SW.sub.1 actuates the positive feedback circuit consisting of transistors Q.sub.10 and Q.sub.20 which effect a self-holding function so that the arithmetic circuit is supplied with power. Herein, the sufficient voltage means that anyone of three step-like voltages V.sub.A10, V.sub.A11 and V.sub.A12 applied to non-inverting input+ of comparators A.sub.10, A.sub.11 and A.sub.12 is higher than reference voltage V.sub.ES. In this situation, all the outputs of comparators A.sub.10, A.sub.11 and A.sub.12 are in a high level. Accordingly, the output of comparator A.sub.10 turns transistor Q.sub.13 on. Display circuit 22 operates so that display 23 may display the control value. And also, the output of comparator A.sub.10 places transistor Q.sub.14 in a condition where the charge on capacitor C.sub.11 is discharged through release magnet Mg.sub.1 if release switch SW.sub.2 is closed so that the release operation in a camera may be possible. While power switch SW.sub.1 is closed, a low level signal applied through line 5 to holding timer 24 puts timer 24 into a reset condition where timer 24 can not operate. At this time, the output transmitted from timer 24 to AND gates G.sub.1 and G.sub.2 is a high level. Accordingly, AND gates G.sub.1 and G.sub.2 produce high level outputs and in turn the output of OR gate G.sub.3 is a high level. Diode D.sub.21, capacitor C.sub.12, resistors and transistors Q.sub.21 and Q.sub.24 constitute a reset circuit for power supply holding. The high level output of OR gate G.sub.3 places transistor Q.sub.21 in its ON state which turns transistor Q.sub.24 into OFF state. Thus, the power supply holding operation in transistors Q.sub.10 and Q.sub.20 is not affected. When power switch SW.sub.1 is opened, timer 24 receives a high level signal through reverse current blocking diode D.sub.20 and pull-up resistor R.sub.20 and starts timing operation by counting clock pulses forwarded from digital arithmetic circuit 20. Te signal applied to gates G.sub.1 and G.sub.2 from timer 24 still remains high and the time required to change from a high level to a low level is longer in the signal applied to gate G.sub.1 than in the signal applied to gate G.sub.2. Accordingly, as the signal applied to gate G.sub.1 from timer 24 goes low, the output of OR gate G.sub.3 goes low and transistor Q.sub.21 is turned off. The accumulated charge of capacitor C.sub.12 in the reset circuit keeps transistor Q.sub.24 in its ON state for a predetermined time. Transistor Q.sub.24 in its ON state turns off transistor Q.sub.20 of the power supply holding circuit so that the positive feedback is cleared. Thus, transistor Q.sub.10 is securely turned off and the power supply is terminated. While the shutter is working after the camera has been actuated by the closure of switch SW.sub.2, an exposure operation signal of low level is transmitted from digital arithmetic circuit 20 through line 5 to timer 24. As long as this signal is transmitted, timer 24 does not start the time counting operation even if switch SW.sub.1 is opened. And also, since the ON condition of transistor Q.sub.10 is held through diode D.sub.20 and line 5 without regard to the situation of switch SW.sub.1 and transistor Q.sub.20, the power supply can not terminate while the shutter is being opened and the shutter control can not be disturbed. When the exposure is completed by the closure of the shutter, the exposure operation signal on line 5 becomes a high level and then timer 24 starts its operation. The power supply terminates after a corresponding time has elapsed. As a result of the battery voltage drop, when the relation of V.sub.A12 <V.sub.ES <V.sub.11 appears, the output of comparator A.sub.12 only is in a low level. Thus the output of gate G.sub.1 is a low level. The power supply holding time is controlled by a shorter time signal transmitted to the gates from timer 24, that is the output of gate G.sub.2, in the same manner as the above. A user can learn from the shorter power supply holding time that battery consumption is developing.

As the battery voltage further goes down and falls into the relation of V.sub.A11 <V.sub.ES <V.sub.A10, comparator A.sub.12 and A.sub.11 produce a low level output and comparator A.sub.10 a high level output. When power switch SW.sub.1 is closed in this situation, the outputs of gates G.sub.1 and G.sub.2 become low by receiving the outputs of comparators A.sub.11 and A.sub.12. Since transistor Q.sub.21 is in its OFF state and transistor Q.sub.24 in its ON state, transistor Q.sub.20 of the power supply holding circuit is turned off. Accordingly, the positive feedback does not function and thus the holding time becomes zero. That is, as power switch SW.sub.1 is opened, the display immediately goes out. From this fact, the user can find that the battery will be used up to the extent of an unusable condition soon.

Where the battery comsumption has developed still further so that the battery voltage falls below a lower limit value capable of ensuring the proper exposure control, that is V.sub.A10 <V.sub.ES, upon the closure of power switch SW.sub.1 the positive feedback does not function because all the outputs of comparators A.sub.10, A.sub.11 and A.sub.12 are low, though transistor Q.sub.10 is turned on. Accordingly, the power supply holding time is zero. Transistor Q.sub.13 is turned off because comparator A.sub.10 produces a low level output, and thus the display remains unlighted. Even if release switch SW.sub.2 is erroneously closed, the photographing sequence will not start because the release operation is locked, that is, transistor Q.sub.14 can not be turned on. The user will notice that the battery has been used up to an unusable condition.

FIG. 6 shows the relation between battery voltage V and holding time t after power switch SW.sub.1 is opened in the circuit of FIG. 5, where V.sub.22 is a battery voltage at V.sub.A12 <V.sub.ES <V.sub.A11, V.sub.21 a battery voltage at V.sub.A11 <V.sub.ES <V.sub.A10 and V.sub.20 a battery voltage at V.sub.A10 <V.sub.ES. The line of FIG. 6 shows that the holding time is set as t.sub.10 in the battery voltage range of V>V.sub.22, t.sub.11 shorter than t.sub.10 in the range of V.sub.21 <V<V.sub.22 and zero in the range of V.sub.20 <V<V.sub.21. And in the battery voltage range of V<V.sub.20, shutter release locking is in effect.

In the power supply control circuit according to the invention, the waste of a battery can be relieved because the power supply holding time is made shorter as battery consumption develops.

The present invention is not limited to the embodiment shown, but can be modified without deviating from the scope of the present invention.