Alarm Timepiece With Facilities of Providing Precausionary Alarm

The present invention relates to an alarm timepiece.

For alarm watches or other timepieces it is essential to provide an alarm when a preset time is reached. Nonetheless, the conventional alarm timepiece has the disadvantage in that the operator has to caculate back the length of time necessary for him to prepare or finish his work before he leaves the office at exactly the preset alarm time. He then sets the alarm time while taking such preparatory period of time into consideration.

Accordingly, it is an object of the present invention to provide an improved alarm timepiece which provides not only main alarms but also precausionary alarms a length of preparation time in advance of the main alarms.

To achieve this object, the present invention provides a timepiece comprising a first register storing preset points in time for the main alarm; a second register for storing a given length of preparatory time; and means for determining when to provide a precautionary alarm as well as the main alarm time through calculation on said preset points in time or an updated time of day and said preparatory period. Preferably, the length of the preparatory period is optionally selectable by the user because it varies according to intention; for example, announcement of when to start conferences, when to leave the office, when to telephone someone, when to get up.

The present invention is further applicable to an electronic diary which has registers for storing unique schedule messages associated with respective points in time to alarm. In this case, the present invention offers advantages: a reduced number of registers and simple key operation. In other words, in the prior art electronic diary as disclosed in U.S. Pat. No. 3,999,050 to Satyan G. Pitroda, there is the need to learn messages regarding scheduled events and set the time and dates of these events when the messages are to be served by an alarm. However, neither the setting of the alarm date and time nor the provision of an alarm register is necessary in the practice of the present invention by which precausionary alarms are delivered, for example, 10 minutes ahead of the time and dates of the scheduled events.

The foregoing as well as other objects, features and advantages of the present invention will become more readily appreciated upon the consideration of the following detailed description of the illustrated embodiments, together with the accompanying drawings, wherein:

FIG. 1 is a schematic block diagram of one preferred form of the present invention; and

FIG. 2 is a schematic block diagram of another preferred form of the present invention.

Referring now to FIG. 1, one embodiment of the present invention is provided with a clock generator CG, a divider DV.sub.1, a timekeeping counter CO, a register X storing points in time to deliver precausionary announcements, an adder/subtractor A, an alarm time register AL, a pair of agreement detectors J.sub.1 and J.sub.2, a display driver DR, a display panel DSP, an input keyboard K, a sequential control circuit CPU, flip flops F.sub.1 and F.sub.2, a pair of alarm sound generators ALM.sub.1 and ALM.sub.2, and a loud speaker SP. In this drawing, gate control signals are labeled .circle.1 and .circle.2 .

Clock signals from the clock generator CG are divided through the divider DV, while real time of day is updated with the timekeeping counter CO of which the count is visually displayed on the display panel DSP via the driver DR.

Upon actuation of the input keyboard K desired points in time in which generate an alarm are loaded into the alarm time register AL via the sequential control circuit CPU. The detector J.sub.2 decides whether the alarm time and updated time agree and, if so, provides its putput "1" which in turn sets the flip flop F.sub.2 to enable the alarm sound generator ALM.sub.2 and the loud speaker SP to thereby release an alarm sound. The sequence up to this operation is identical to the time-honored manner.

The storage register X stores preselected values indicative of elapsed times for precautionary announcements as introduced via the input keyboard K. The adder/subtractor A subtracts the contents of the precautionary announcement time register X (say, 5 minutes) from the contents of the alarm time register AL (say 11:00 a.m.). In the given example, 10:55 a.m. is evaluated from the adder/subtractor A and introduced into the agreement detector J.sub.1. As stated above, the first detector J.sub.1 decides whether the update time of day presented as the output of the timekeeping counter CO corresponds to the output of the adder/subtractor A and, if affirmative, provides its output "1", placing the flip flop F.sub.1 into the set state. The result is that the loud speaker SP is enabled via the alarm sound generator ALM.sub.1 to release an alarm sound. It is favorable that the alarm sounds from the alarm sound generators ALM.sub.1 and ALM.sub.2 be different in tone, loudness or melody to distinguish this precausionary alarm from the subject or later alarm. After the alarm sounds are delivered, the sequential control circuit CPU produces the gate control signal .circle.1 or .circle.2 to reset the flip flop F.sub.1 or F.sub.2 upon actuation of a stop key in the keyboard K, thereby discontinuing the generation of the alarm sounds.

By way of example, if 11:00 is preset as alarm time and a duration of 5 minutes is selected as the preparatory time, then the precautionary alarm is delivered at 10:55 a.m. and the subject alarm at sharply 11:00 a.m.

FIG. 2 shows another preferred embodiment of the present invention which includes a clock generator CG, a divider DV, a time-and-date timekeeping counter CO, an advance announcement time register X, adder/subtractors A.sub.1, A.sub.2 . . . A.sub.n, gate circuits G.sub.1, G.sub.2, . . . G.sub.n, schedule registers AL.sub.11, AL.sub.21, . . . AL.sub.n1, schedule message registers AL.sub.12, AL.sub.22, . . . AL.sub.n2, agreement detectors Y.sub.1, Y.sub.2 . . . Y.sub.n, agreement detectors J.sub.1, J.sub.2 . . . J.sub.n, a gate circuit H, a schedule display buffer register DSB, a display driver DR, a display panel DSP (typically, the dot matrix type), an input keyboard K, a sequential control circuit CPU, a flip flop F, an alarm sound generator ALM and a loud speaker SP. In this drawing, gate control signals are labeled .circle.1 and .circle.2 .

Clock signals from the clock generator CG are divided through the divider DV and the timekeeping circuit CO updates the current time and date. The contents of the timekeeping counter CO are visually displayed on the display panel DSP via the driver DR. Scheduled events are stored into the schedule registers by applying input signals thereto via the sequential control circuit CPU. The respective ones of the schedule registers mate as a pair with the respective ones of the schedule message registers, for example, AL.sub.11, and AL.sub.12, AL.sub.21 and AL.sub.22 . . . AL.sub.n1 and AL.sub.n2. Where a full message "Aug. 22, 1979, 2:30 p.m., sales conference", for example, is introduced through the input keyboard K, the schedule time and date register AL.sub.11 contains "Aug. 22, 1979, 2:30 p.m." and the schedule event register AL.sub.12 stores "sales conference". The agreement detector J.sub.1 constantly monitors whether the contents of the schedule time and date register AL.sub.1 are in agreement with those of the timekeeping counter CO. The adder/subtractor A.sub.1 calculates the contents of the schedule time and date register X minus those of the precausionary announcement time register X. The agreement detector Y.sub.1 always senses if the output of the adder/subtractor A.sub.1 as the precausionary alarm time and the contents of the timekeeping counter CO coincide. For example, where the value in the register X is 10 minutes, the adder/subtractor A provides an indication of "Aug. 22, 1979, 2:20 p.m." which is 10 minutes less than the contents of AL.sub.11.

Once the either the agreement detector Y.sub.1 or J.sub.1 has provided its affirmative answer, the gate control signal .circle.1 assumes a higher level "1" and sets the flip flop F, enabling the loud speaker SP via the alarm sound generator ALM to release the precausionary alarm which is an important part of the present invention. At the same time the contents of the two schedule registers AL.sub.11 and AL.sub.12 are unloaded into the schedule display buffer register DSB via the gate H to provide a visual display of "Aug. 22, 1979, 2:30 p.m., sales conference" on the display panel DSP via the driver DR. This visual display is provided twice: during the delivery of the subject alarm and during that of the precausionary alarm. The stop key when actuated ceases the delivery of the alarm sounds from the loud speaker SP by developing the gate control signal .circle.2 useful to reset the flip flop F. Simultaneously, the timekeeping counter CO is unloaded into the display driver DR to resume the update time display mode.

The other schedule registers AL.sub.21, AL.sub.22 . . . AL.sub.n1, AL.sub.n2 operate in the same manner as discussed with the registers AL.sub.11 and AL.sub.12. Different schedules and events are sequentially announced in the order of time. As noted earlier, the preparatory period may be optionally varied according to intention.

It is obvious to those skilled in the art that one way to calculate the precausionary alarm time is either to subtract the preparation period from the alarm time storing section or to add the preparation period to the updated time and sense if the both agree.

The invention being thus described, it will be obvious that the same may be varies in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications are intended to be included within the scope of the following claims.