Magnetic Disk Memory Power Supply

This invention relates generally to magnetic disk memories and in particular to self-contained power supplies for use in such memories.

DC power supplies incorporated in magnetic disk memories have been for the most part standardized at +5 and +12 volts. Thus, typically no provision is made for an onboard negative voltage source despite the frequent need therefor to power integrated circuit devices such as analog-to-digital converters, random access memories and operational amplifiers calling for bipolar supply voltages. Where negative voltages are required, switching power supplies external to the disk memory device are usually employed to convert an existing positive voltage. However, such supplies require components such as choppers, transformers and rectifiers as well as filter and regulator stages which tend to be both bulky and expensive. Moreover, they often generate electrical noise which can interfere with the operation of other components and adversely affect the data transfer function of the disk memory.

Pursuant to the broad aspects of the present invention, there is provided a magnetic disk memory having at least one magnetic disk driven by a DC spindle motor comprising a permanent magnet rotor and a pair of stator windings sharing a common ground connection point. The windings are alternately energized from an electrical power source by a switching circuit which produces positive voltage pulses of predetermined duration across the windings. The negative emf induced in the windings between energizing pulses is used as a source of regulated, negative DC voltage for powering various components requiring such a supply.

A better understanding of the present invention may be had from the detailed description below read in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic of a portion of a magnetic disk drive including a spindle motor-energizing circuit embodying the present invention; and

FIG. 2 shows a series of voltage waveforms appearing at various points in the circuit of FIG. 1.

FIG. 1 shows in diagrammatic form a magnetic disk 10 mounted for rotation on a spindle 12, electromagnetic transducer heads 14 for writing and reading data onto and off the opposite magnetic surfaces of the disk 10, and a movable head support mechanism 16 for radially positioning the read/write heads in relation to a series of concentric data tracks on the surfaces of the disk 10.

The disk 10 is rotated at constant speed by a DC motor 18 having a permanent magnetic rotor 19 connected to the spindle 12 and a pair of field or stator windings 20 and 22 having supply terminals 24 and 26, respectively, and a common ground connection 28.

The motor 18 is energized and its speed held constant by means of voltage pulses of controlled duration applied to the windings 20 and 22. Generally, a power switching circuit 30 alternately connects the motor terminals 24 and 26 to a power supply 32 (having a voltage +V.sub.1, typically +12 volts) in response to input signals which control the switching times or duty cycle of the circuit 30 and threby the average voltage across the motor windings. More particularly, the power switching circuit includes a pair of PNP power transistors 34 and 36, preferably of the Darlington type, having their collectors coupled to the motor winding terminals 24 and 25, respectively, and their emitters connected to the supply 32. Resistors 38 and protective diodes 40 couple the base terminals of transistors 34 and 36 to the supply 32.

The switching times of the transistors 34 and 36 and hence the timing and width of the voltage pulses applied to the motor windings are controlled by logic elements in the form of a pair of NAND gates 42 and 44 whose outputs, connected to the base terminals of the transistors 34 and 36 through current limiting resistors 46, provide sufficient base drive to operate the transistors in a switching mode. The inputs of the gates 42 and 44 are connected to appropriate motor enable command circuits 48 that may include a microprocessor which in turn is responsive to various inputs including, for example, signals representing actual motor speed and the instantaneous angular position of the rotor 19. Various command circuits for energizing the motor by way of pulse width modulated signals are known in the art and need no elaboration here. Suffice it to say that the outputs of the NAND gates 42 and 44 are alternately switched to their low states for predetermined durations thereby causing one or the other of the transistors 34 or 36 to go into saturation. The width or duration of these pulses may be varied in several ways to control the average voltage applied to the windings. For example, the position of the leading edge of the pulses may be held constant while that of the trailing edge varied in accordance with speed and rotor position information acquired during a preceding interval. A brief delay may be introduced between successive pulses to preclude simultaneous energization of both motor windings.

FIG. 2 shows the voltage waveforms e.sub.24 and e.sub.26, in idealized form, appearing at motor terminals 24 and 26, respectively, and it will be seen that positive pulses 60 applied across the winding 20 alternate with like, positive pulses 62 applied across the winding 22. During the interval that one or the other power transistor 34 or 36 is in the off state, a voltage is induced in the corresponding winding 20 or 22 by virtue of the combined generator action of the rotor 19 and the flux developed by the other, energized winding. The voltages thus induced, shown as portions 64 and 66 of the waveforms e.sub.24 and e.sub.26, respectively, have negative polarities and their magnitudes approximate that of the positive energizing pulses. In accordance with the invention, the negative voltages induced in the windings between energizing pulses are used as a source of negative DC potential. Thus, a pair of parallel diodes 68, poled as shown to conduct during those intervals that the motor terminals go negative, couple the motor terminals through a current limiting resistor 70 to an appropriately filtered voltage regulator 72 having a regulated output -V.sub.2, for example, -5 volts. The diodes 68 alternately conduct and a relatively constant, negative potential appears at the input of the regulator 72 as shown by the waveform e.sub. 72 in FIG. 2. The device 72 is a low cost, commercially available regulator (for example, type MC79L05) capable of precisely sensing and holding the output voltage.

A single embodiment of the invention has been described in detail and will suggest to those skilled in the art many applications as well as appropriate modifications and equivalent arrangements all of which are intended to be covered by the appended claims.