Microprocessor Controlled Tape Capstan

This invention relates to control of the capstan used to drive magnetic tape for the storage of data. More particularly, the invention relates to improved methods of control of the rotational motion of such capstans, whereby high rates of acceleration to a target tape speed can be achieved without excitation of torsional vibration.

The American National Standards Institute (ANSI) has defined certain standards for the performance of magnetic data storage tape drive apparatus. In particular, data to be recorded according to ANSI standards is recorded in blocks separated from one another by no less than 0.280 inches. This interblock gap is therefore that space in which a tape drive starting in the interblock gap must accelerate to its full design speed. Various tape velocities are standard, including up to 200 inches per second (ips). The goal of providing a tape drive which can accelerate to 125 ips within the 0.075 inch start distance (which is an acceleration of some 500 times the acceleration of gravity or 500 g's) is a requirement of a commercial tape drive.

The art has traditionally separated the mass of the tape carried on supply and take up reels from that portion of the tape in the vicinity of the read/write head (which is that portion of the tape which in fact must be accelerated to satisfy the requirements mentioned above) by decoupling that portion from the bulk of the tape, using vacuum columns in which loops of tape are carried. In this way, only the relatively small portion of the total tape in the vicinity of the head need be accelerated at very high rates, whereas the bulk of the tape carried on the reels can be accelerated relatively slowly. However, high acceleration of the portion of the tape in the vicinity of the heads is a significant engineering problem. To this end a vacuum capstan is typically used. Such a capstan is a hollow, cylindrical wheel having many holes in its periphery in contact with the tape. A vacuum is applied to the center of the hollow capstan so as to suck the tape into firm, non-sliding contact with the capstan. The capstan is made very light and of low inertia, so that it can be very quickly accelerated to speed, whereby the tape in contact with the capstan quickly reaches the design speed of the tape drive. See, for example, U.S. Pat. No. 4,065,044 to Painter et al for an example of such capstans.

The control of the acceleration of a capstan, even a relatively lightweight, low inertia one such as that disclosed in the Painter et al patent, remains a difficult problem. To this extent, numerous motion control schemes have been devised. According to the present invention, a microprocessor is used to continuously sample the actual speed of the tape drive and accelerate, decelerate or hold it at a steady angular velocity, as indicated by comparison of the actual velocity signal with a velocity command signal. The use of the microprocessor allows considerable versatility of the system to adapt to conditions encountered and allows long-term stability without regard to variations in, e.g., component tolerance and the like.

It is therefore an object of the invention to provide an improved drive for a magnetic tape system.

A further object of the invention is to provide a magnetic tape drive system in which a microprocessor controls the motion of a vacuum capstan used to move that portion of the tape juxtaposed to the head at any given time.

Still a further object of the invention is to achieve extremely high rates of acceleration of a tape to a steady, carefully controlled running speed without undue fluctuations in tape speed due to mechanical resonances in the device or to "hunting" of an analog servo loop.

The above needs of the art and objects of the invention are satisfied by the present invention in which a microprocessor utilizing look up tables for velocity profiles is used to control the motion of the tape capstan. The microprocessor examines each incoming command to determine whether it is likely to excite a vibration and, if so, modifies the capstan control so as to avoid the vibration.

The invention will be better understood if reference is made to the accompanying drawings, in which:

FIG. 1 shows an schematic elevation view of the face plate of a tape drive using the capstan control system of the invention;

FIG. 2 shows a schematic diagram of the layout of the capstan control system;

FIG. 3 shows a graph of motor current versus time in a normal start operation;

FIG. 4 shows velocity versus time for the start operation;

FIG. 5 shows current versus time for a normal stop operation;

FIG. 6 shows velocity versus time for a normal stop operation;

FIG. 7 shows the motor current versus time for two possible courses of action taken in a worst case short stop situation; and

FIG. 8 shows velocity versus time for the several possibilities of the worst case short stop operation.

As discussed above, the invention relates to control of the vacuum capstan used in a magnetic tape drive, in particular one for storage of data. Copending application Ser. No. 123,729, filed Feb. 22, 1980, in the name of Epina et al incorporated herein by reference shows a tape drive in detail in which the capstan and control circuitry of the invention has application. In particular, that copending application describes a tape drive which is capable of achieving 200 ips performance while remaining within the ANSI standards with respect to interblock gap as described above. The invention of that application involves the particular tape path along which the magnetic tape passes between the take-up and supply reels. The present invention relates to the capstan which is used to accelerate the tape up to speed upon, for example, a host computer command, and is accordingly not limited to the particular tape path shown in the copending application referred to above, but instead has applicability to many other forms of tape transport systems.

FIG. 1 shows a schematic layout of a tape drive. For example, a vertically extending face plate 8 carries a supply reel 10 from which tape 11 is supplied. The tape passes through a first vacuum column 12, past a read/write head 16, into and out of a second vacuum column 14, and is taken up upon the tape-up reel 18. The tape 11 is passed through the vacuum columns 12 and 14 so that the mass of tape carried on the reels 10 and 18 is decoupled from that in the vicinity of the read/write head 16. Thus, when it is desired that a stopped tape be accelerated to its design speed or stopped from that design speed, a capstan 20 can accelerate the relatively small portion of the tape 11 juxtaposed to the read/write head 16 while the columns allow this part of the total mass of tape to move at a different rate than that carried on the reels 10 and 18. When the reels come up to speed, the loops of tape within the vacuum columns 12 and 14 regain their original sizes, these having varied during the start operation, as is well understood in the art.

As noted, the present invention relates to microprocessor control of the motor driving the capstan. A schematic overview of the system used is shown in FIG. 2. The capstan motor 22, which drives the capstan 20 (FIG. 1) operates under the control of a power amplifier 24 which has both current 26 and voltage 69 feedback. Mounted on the motor shaft is a tachometer 28 providing two phase output signals .phi.A and .phi.B. The tachometer 28 is a 1000 line two-phase incremental encoder whose full period is 45.2 microseconds at running speed. It is these output signals which provide the computational workload for the system, which is based on a microprocessor 30 supplied with its operating program, and certain look-up tables discussed in detail below, by a 2K by 8-byte ROM 32. As noted, at 125 ips the tachometer period is 45.2 microseconds. To get 1/2% period measurement resolution requires a count rate of 4.4 mHz. This is supplied by a system clock 38 operating at 26 mHz, the output of which is divided by 6 in a divide-by-6 network 40, the output of which is supplied to a transistor-transistor-logic (TTL) counter 42, operating as a velocity decoder. The output of the decoder 42 is stored in registers 44 and 46 which feed the microprocessor bus, thus providing a signal of the instantaneous velocity once every tach period.

Direction detection and position counting are also implemented in logic outboard of the processor in order to minimize computation delay. FIG. 2 shows the two phase outputs of the tachometer 28, .phi.A and .phi.B, being supplied to a position decode network 48 which feeds an interblock counter 34 so as to keep an accurate register of the position of the tape in a non-running situation. The position output is supplied to the microprocessor via a position register 50, connected to the microprocessor bus 52. The output of the microprocessor 30 is supplied to a digital-to-analog (D/A) converter 54, supplying the analog signal which controls the power amplifier 24 which drives the capstan motor 22. The output of the D/A converter 54 is also supplied to a null detect network which supplies a D/A zero-adjust signal, including a polarity signal supplied to a command register 58, in which are also stored operator or host initiated commands supplied to the microprocessor 30.

Thus, the microprocessor 30 is provided with digital velocity and position signals so that it requires very few program steps to determine the next current command to be supplied to the D/A converter 54 and thence to the power amp 24 to control the further motions of the motor 22. In a preferred embodiment, a Zilog Z80B microprocessor was chosen because it has enough speed to complete the required program steps safely within less than 1 tachometer period. Its internal registers are sufficient to implement the design without use of external RAM which satisfies the goal of the invention of simplicity. A single 2K by 8-byte ROM 32 is used to store both the program instructions and certain look-up tables discussed in detail below. The rewind command is supplied to the Z80B through a rewind command register 64. Also supplied as an output of the Z80B is a "NMI enable" signal, which is stored in an output port register 66 and gates the NMI input of the Z80B. It is combined with the GO signal in an inverted-output AND gate to generate the NMI input. A test LED appearing on the card is lit as indicated at 68 as an aid in diagnostics.

As discussed above, the capstan control arrangement of the invention was originally designed to be incorporated within the pre-existing drive which is the subject matter of copending application Ser. No. 123,729, filed Feb. 22, 1980. That particular drive, as do all drives, has certain mechanical components and tape path geometries which have resonant frequencies which can be excited by motor current profiles and program commands executed at the appropriate frequencies. For example, the motor used to drive the capstan has a torsional resonance at 4500 Hz, the vacuum columns have resonant frequencies of 35 and 55 Hz, and the tape stretched between the capstan and vacuum column has a resonance frequency between 1.2 and 1.6 KHz. Clearly it is desirable to control the capstan motor in such a way that all these resonances and the attendant physical instabilities are eliminated. Careful control by the microprocessor of the capstan motor, as will be discussed in detail below, allows all these resonances to be avoided, and smooth operation achieved. Similarly, the other objects of the invention, achieving 1 millisecond starts, that is, within the 0.075 inch start distance and settling within ANSI standards for velocity within about 1.2 milliseconds, are achieved with this design. Microprocessor use also permits better velocity control and simpler design, yielding a lower chip count and reduced hardware costs.

FIGS. 3 through 8 show current and velocity profiles for several of the more usual operations undergone by the system according to the invention. FIGS. 3 and 4 show current and velocity profiles, respectively, for a normal start; FIGS. 5 and 6 show current and velocity profiles for a normal stop; and FIGS. 7 and 8 current velocity profiles, respectively, for the worst case short stop situation in which the 1.2 KHz resonance mentioned above can be encountered if the appropriate steps are not taken.

FIG. 3 shows motor current during a conventional start operation from zero velocity and FIG. 4 shows the accompanying velocity profile. The current supplied is, as noted, divided into five phases. During phase 1, current is increased at a constant rate to a limit which is maintained during phase 2. The programmed current build up in phase 1 reduces the excitation of the motor's torsional resonance at 4500 Hz. Transition from phase 2 to phase 3, in which reduction of current begins, occurs at approximately 60% of full speed. However, capstan speed is changing too fast, approximately a 15% change occurring per tach period, to accurately determine when 60% of full speed occurs. The solution chosen was to watch the tach period during phase 2 and, knowing that acceleration is proportional to current, compute the time remains until 60% of full speed is reached. When that time is reached, the timed ramp-down of phase 3 is initiated without having to wait for another whole tach period to be consumed. In a preferred embodiment, the computation of time remaining is actually done by table look-up. In phase 4, the velocity is high enough to use simple proportional control with current proportional to velocity error. That is to say, full design velocity would be compared with that in the two actual velocity registers 44 and 46. In this operation, the use of the microprocessor 30 provides another important advantage. Speed in this phase is still changing by as much as 10% per tach period making measured speed lag actual speed at sampling times. This effect is eliminated by using another look up table stored in ROM 32 to contain the current values modified by the known sampling lag.

Integral action is added to proportional action during phase 5 when the capstan is at nearly full speed. Two integrators are used, both implemented by registers within the processor 30. The first integrator starts with zero initial condition at the beginning of phase 5 and responds fast enough to correct for the varying tape tension load imposed by the two vacuum columns 12 and 14 (in FIG. 1) whose resonant frequencies are 35 to 55 Hz. Whenever the "GO" command to the tape drive is dropped and the motor stops, the contents of the first integrator register are used to increment the second by a fixed amount. The second integrator has a slower response time than the first, but is not reset when "GO" is dropped. It is, therefore, capable of compensating for variations in drag, torque constant and analog circuit offsets. The switching and memory capabilities of the microprocessor 30 thus make the advantages of error integration possible, without the usual overshoot problems that one would expect with an analog integrator.

It will be observed by those skilled in the art that there is a relatively smooth transition between phases 4 and 5. This is done in order to eliminate the errors caused by shaft wind up between the motor and the tachometer disk as suggested in the prior art, for example, see U.S. Pat. No. 3,904,943 to Klang.

FIGS. 5 and 6 show, respectively, motor current and velocity versus time for a normal stop operation. When the "GO" command to the drive drops, the microprocessor initiates the "STOP" routine. The power amplifier which is in the current mode for the "START" and "RUN" operations is switched 70 to voltage mode 69 for "STOP". As will be observed, the motor stop current is increased to approximately 20 amps in the case of a particular motor chosen, which draws a like figure, typically 24 amps at 30 volts for a one millisecond start operation as described above. The current is gradually decreased during the "STOP" operation in the area marked Ramp 1, in a preferred embodiment beginning when the motor velocity is expected to have dropped to 44% of full speed. The higher initial current is used to insure that position overshoot is avoided. This wave shape minimizes shaft windup towards the end of a "STOP" operation when another "GO" command may occur. This situation will be discussed below in connection with FIGS. 7 and 8. "Ramp 1" is continued until the motor has slowed to approximately 10% of full speed, as shown. This speed is maintained by a small positive current until the desired stop position, in the preferred embodiment 0.075 inches, is approached. At this point a stop pulse reduces the speed of the capstan to nearly zero. Thereafter, the "STOP LOCK" phase is entered. It will be appreciated that the two-phase tachometer described above measures position error with a resolution of 0.0014 inches. Use of the "STOP LOCK" algorithm resulting in the "STOP LOCK" current shape shown in FIG. 5 avoids the need for lead lag compensation as practiced by the prior art, by applying motor current correction for only a short pulse followed by dynamic braking until the next tach transition is sensed.

As was discussed above, the low rate of change of current in START is very effective in avoiding excitation of the 4.5 KHz torsional resonance of the motor/capstan combination. In the particular tape drive design shown in the copending application referred to and incorporated by reference above, another broader, less peaked resonance exists between 1.2 and 1.6 KHz, attributable to the stretch between capstan and vacuum column. This resonance can be excited, for example, if the "GO" signal is dropped for approximately 200 microseconds, causing "STOP" to begin, and "GO" is then reapplied. Without detection of and compensation for this sequence, the capstan control will respond with the usual Ramp 1 current increase upon "STOP", and will continue it into the positive current region as shown in the dashed line of FIG. 7. Since the resultant current profile required to return to full speed has a shape which has almost all its energy at 1.2 KHz, resonance would occur. However, up to 300 microseconds into the stop routine, the motor speed is still above 50% and can be recovered to 100% within the alloted time while using a slower rate of change of current and a reduced start current limit (for example, 14 amps instead of 24) resulting in the shape shown as Ramp 2. Accordingly, the microprocessor is programmed to detect the possibility of excitation of this resonance, and applies Ramp 2 when it does so.

FIG. 8 shows velocity as a function of time for the several possibilities shown. The solid line indicates the current profile which is followed when it is detected by the microprocessor that the possibility of excitation of the 1.2 KHz resonance exists and Ramp 2 is used instead. The several dotted lines are possible velocity profiles which can occur if Ramp 2 is not followed that is, if Ramp 1 is used. Those skilled in the art will recognize the problems inherent in the velocity fluctuations shown.

In the case when "GO" comes back up after 300 microseconds into the "STOP" operation and before Ramp 1 is completed, the speed has been reduced so that Ramp 2 can no longer be used. The microprocessor therefore simply delays responding to such commands until Ramp 1 has reached the near zero current value. This avoids putting too much energy into the system near the resonant frequency and makes up for any theoretical increase in access time by reducing settling time, i.e., the time required for the tape velocity to settle within the ANSI standards.

It will be appreciated that there has been described a microprocessor system which allows extremely low access times, that is, very fast start or stop operations, while simultaneously meeting ANSI velocity standards. Torsional vibrations are substantially reduced by adaptively adjusting the motor current profile to avoid possible resonances, while use of the look-up tables in ROM to determine the particular current profile to be used at any given time allows versatility in the tape drive of the invention. In particular, it can easily be converted from 125 to 75 or 50 ips. The control circuitry is substantially simplified over that which had previously been used; further reductions would be made possible by large-scale integration. Use of the microprocessor also allows several automatic calibration routines and diagnostic aides, e.g. the test LED indication, and the automatic nulling of the D/A converter, to be built in to the extent that no manual adjustments are required in the commercial embodiment of the capstan servo control system of the invention.

Attached hereto is a document marked appendix A entitled, "Capstan Digital Servo System". This document will be recognized by those skilled in the art as a complete microcode version of the control programming of the capstan servo control of the invention. Those skilled in the art provided with this document and the above disclosure, including the control system schematic diagram of FIG. 2 would have no difficulty in implementing the invention.

It will be appreciated that there are additional modifications and improvements which can be made to the invention without departing from its essential spirit and scope which should therefore not be limited by the above disclosure, but only by the following claims. ##SPC1## ##SPC2## ##SPC3## ##SPC4## ##SPC5## ##SPC6##