System for Checking an Electrical Connection Between a Computer and a Printer

1. Field of the Invention

The present invention relates to an electronic computer, and more particularly to a checking mechanism in an electronic computer, having a main frame and a separable printer unit, for checking if the printer unit is correctly connected to the main frame of the electronic computer.

2. Description of the Prior Art

In a prior art electronic computer having a separable printer unit, a checking mechanism is not provided for checking if the printer unit is correctly connected to the main frame of the electronic computer and is operating correctly. Accordingly, abnormal conditions of the connection of the printer unit to the main frame of the computer such as misconnection of the printer unit or loosening of a connector by vibrations during the operation of the computer cannot be readily checked. As a result, if the computer is operated with an abnormal condition in the connection, the printing operation is carried out incorrectly.

In order to overcome the difficulty encountered with abnormal state of the connection, the connection can be checked by providing a checking mechanism at each connecting terminal to the printer unit. However, in this method, as many checking mechanisms as there are terminals to be checked for the connection are required and hence the cost is substantially increased as the number of connection terminals increases.

It is an object of the present invention to provide a checking system for the connection between an electronic computer and a printer unit connected via a plurality of signal lines. This system checks signals of the same category with a single checking mechanism.

FIG. 1 shows one embodiment of the present invention.

FIGS. 2 and 3 show timing charts for explaining the operation of the present invention, and

FIG. 4 shows another embodiment of the present invention.

FIG. 1 shows one embodiment of the present invention. A printer unit PT and an electronic computer main frame CUL are connected via connecting terminals CN. The printer unit PT may be a conventional line printer which comprises hammer solenoids SH.sub.1, SH.sub.2 and SH.sub.3, a paper feed solenoid SF, drive circuits DR for the solenoids, a type drum P, a type drum drive motor M, a type drum position sensing switch SW linked to the type drum P, and a drive circuit MD for the motor M. A circuit comprising resistors R.sub.1, R.sub.2, R.sub.3, R.sub.4 and r.sub.1 detects an abnormal state of the connection of the printer PT to the main frame CUL. The electronic computer main frame CUL comprises a keyboard KB, a central processing unit CPU and a display unit DISP. A compare/detection circuit DT and resistors R.sub.11, R.sub.12, R.sub.13, R.sub.14 and r.sub.10 also detect the abnormal state of the connection.

FIGS. 2 and 3 show timing charts for explaining the operation of FIG. 1. FIG. 2 shows the timing chart where the printer unit PT and the electronic computer main frame CUL are correctly connected by the connecting terminals CN.

Referring to FIGS. 1 and 2, after the central processing unit CPU has processed in accordance with input data from the keyboard KB, it starts the print operation. The central processing unit CPU sends a drive signal SM to the type drum drive motor M to rotate it, and the type drum position sensing switch SW linked thereto is actuated to send a timing signal S.sub.s to the central processing unit CPU. The central processing unit CPU generates hammer solenoid drive signals and a paper feed solenoid drive signal in synchronism with the timing signal S.sub.s. As the hammer solenoid drive signals are generated, currents i.sub.11, i.sub.12 and i.sub.13 flow through the resistors R.sub.11, R.sub.12 and R.sub.13, respectively, and as the paper feed solenoid drive signal is generated, a current i.sub.14 flows through the resistor R.sub.14. The resistor r.sub.10 is selected to be sufficiently smaller than the resistors R.sub.11, R.sub.12, R.sub.13 and R.sub.14 and the input impedance of the compare/detection circuit DT so that the mutual effects among the currents i.sub.11, i.sub.12, i.sub.13 and i.sub.14 can be neglected. Accordingly, the current i.sub.r10 is expressed by a sum of mutually independent currents i.sub.11, i.sub.12, i.sub.13 and i.sub.14. That is, i.sub.r10 =i.sub.11 +i.sub.12 +i.sub.13 +i.sub.14. An input voltage e.sub.c to the compare/detection circuit DT is expressed by e.sub.c =i.sub.r10 .multidot.r.sub.10. The resistor r.sub.1 is also selected to be sufficiently smaller than the resistors R.sub.1, R.sub.2, R.sub.3 and R.sub.4 and the input impedance of the compare/detection circuit DT so that a current i.sub.r1 flowing through the resistor r.sub.1 is expressed by a sum of the mutually independent currents i.sub.1, i.sub.2, i.sub.3 and i.sub.4 flowing through the resistors R.sub.1, R.sub.2, R.sub.3 and R.sub.4, respectively. That is, i.sub.r1 =i.sub.1 +i.sub.2 +i.sub.3 +i.sub.4. An input voltage e.sub.p to the compare/detection circuit DT is expressed by e.sub.p =i.sub.r1 .multidot.r.sub.1. Since the current i.sub.1 and the current i.sub.11 are of the same waveform, they are expressed as i.sub.1 =k.multidot.i.sub.11, where k is a proportional constant between the resistor R.sub.1 and the resistor R.sub.11. The currents i.sub.2 and i.sub.12, i.sub.3 and i.sub.13, and i.sub.4 and i.sub.14 are also of the same waveforms, respectively, and they are expressed as i.sub.2 =k.multidot.i.sub.12, i.sub.3 =k.multidot.i.sub.13 and i.sub.4 =k.multidot.i.sub.14, where k is the proportional constant between the resistors R.sub.2 and R.sub.12, R.sub.3 and R.sub.13, and R.sub.4 and R.sub.14, respectively.

As a result, the current i.sub.r1 is expressed as i.sub.r1 =k.multidot.i.sub.r10 and hence the input voltage e.sub.p is expressed as e.sub.p =k.multidot.r.sub.1 /r.sub.10 .multidot.e.sub.c. Accordingly, e.sub.p =K.multidot.e.sub.c, where K is a proportional constant.

Accordingly, by checking if the voltage e.sub.p is equal to K.multidot.e.sub.c with the compare/detection circuit DT, the normal state of the connection of the connecting terminals CN.sub.0 -CN.sub.4 can be checked. If it is normal, an output voltage Sdt of the compare/detection circuit DT is at a low level.

FIG. 3 shows the timing chart when the connection between the printer unit PT and the electronic computer main frame CUL is abnormal. Specifically, the connecting terminal CN.sub.2 is in abnormal condition. As a result, the drive signal to the hammer solenoid SH.sub.2 is not transmitted and the current i.sub.2 remains at a low level. As a result, the relation of e.sub.p =K.multidot.e.sub.c is not met and the compare/detection circuit DT produces a high level output voltage Sdt at the timing of the current i.sub.2 to inform the central progressing unit CPU of the abnormal condition of the connection between the printer unit PT and the electronic computer main frame CUL. The central processing unit CPU in turn stops the print operation and displays the abnormal condition of the connection on the display unit DISP as required. In FIG. 3, when the output voltage Sdt is high, the print operation is conducted for one print cycle (in which the motor drive signal S.sub.M changes to a high level and then to a low level) and the next print cycle is inhibited. Alternatively, the print operation can be inhibited as soon as the output voltage Sdt assumes the high level.

In FIG. 1, the connecting terminals CN.sub.5 -CN.sub.8 have no abnormal condition detecting circuit, but the condition of the connection of the connecting terminals CN.sub.5 -CN.sub.8 can be checked by monitoring the timing signal S.sub.s which is periodically sent as long as the motor drive signal S.sub.M is high. In the present embodiment, the condition of the connection of the three hammer solenoids and the one paper feed solenoid is checked by the single compare/detection circuit DT. Thus, not only signals of the same category (e.g. hammer solenoid signals) but also a signal of a different category (e.g. paper feed solenoid signal) can be checked by the single compare/detection circuit DT. Any number of terminals can be checked by the single compare/detection circuit DT, and more than one compare/detection circuit may be provided. The compare/detection circuit DT may be constructed by a resistor voltage divider circuit and a differential amplifier.

FIG. 4 shows another embodiment of the present invention in which the present invention is applied to a thermal printer head driver. The resistor r.sub.1 is selected to be sufficiently smaller than resistors R.sub.s of heat generating elements of the thermal print head of the printer unit PT. DR denotes drive circuits for the heat generating elements. The resistor r.sub.10 in the computer main frame CUL is selected to be sufficiently smaller than resistors R. Accordingly, as in the embodiment of FIG. 1, the input voltages e.sub.p and e.sub.c to the compare/detection circuit DT are expressed by e.sub.p =i.sub.r1 .multidot.r.sub.1 and e.sub.c =i.sub.r10 .multidot.r.sub.10. If the connecting terminals CN are in the normal condition, the current i.sub.r1 is proportional to the current i.sub.r10 and hence e.sub.p =K.multidot.e.sub.c, where K is a proportional constant. Accordingly, by checking the relationship of e.sub.p =K.multidot.e.sub.c by the compare/detection circuit DT, the condition of the connection of the connecting terminals CN can be checked, and the print operation is stopped if an abnormal condition is detected.