Method of Selected Area Doping of Compound Semiconductors

This invention relates to the field of integrated circuit fabrication and particularly to the doping of compound semiconductors.

Conventional integrated circuit technologies have been successful in producing a wide variety of circuits and devices. Recently, integrated circuits and devices also have been developed using GaAs and other III-V compound semiconductors because of their speed advantage over comparable Si devices, because of the wide range of bandgaps available for optical signal processing, and because of the possibilities for high temperature operation. In the compound semiconductors, however, the limits of existing fabrication technologies are being reached, and new techniques are needed to fully exploit their potential. In particular, exploitation of techniques to fabricate truly three-dimensional device and circuit structures has the potential to dramatically lessen the constraints of conventional processing and device design. Further advantages in device yield and process control can be expected by integrating device processing with epilayer growth, using the controlled environment of the growth apparatus. This would lead to an in situ 3-D device capability with enhanced design freedom and device yield.

Presentlly, compound seimconductors are selectively doped using ion implantation. The surface to be doped is either a polished GaAs wafer cut from GaAs boule, or is first formed epitaxially by a process such as molecular beam epitaxy (MBE). In the latter case the semiconductor material is then removed from the high vacuum MBE-chamber and a mask of photoresist or other ion-blocking materials such as Si.sub.3 N.sub.4 formed on its surface. The masked semiconductor is placed in an ion implantation chamber and bombarded with dopant ions. Those areas of the semiconductor's surface which are not covered by the mask receive the dopant.

If uniform (non-selective) doping of the entire surface is desired, the surface can be doped in situ in the same chamber used to grow the surface. If the dopant impinges on the growing layer, the doping density will be proportional to the dopant flux divided by the growth rate of the epitaxial material. Dopant variations in the direction of growth (perpendicular to the epitaxial surface) may be caused by varying the dopant flux with time. In extreme cases, the dopant atoms may be deposited in a single plane. For example MBE growth of GaAs can be suspended, and dopants such as Si, Ge, Be, and Sn introduced into the MBE chamber. A submonolayer of the dopant is deposited in situ, and when MBE growth of the GaAs is resumed the dopant is incorporated into the growing layer. The doping is accomplished without removing the semiconuctor from the high vacuum chamber. However, the entire surface is doped in a non-selective manner.

It is an object of the invention to provide a method for doping selective areas of a compound semiconductor in situ within a molecular beam epitaxy (MBE) chamber.

According to the invention, the MBE growth of a compound semiconductor such as GaAs is interrupted to allow the substrate to cool while exposing the surface to a flux of arsenic (As). This causes a thin layer of As to condense on the GaAs epilayer. The As is then patterned using a beam such as a laser beam or electron beam to desorb the As in selected areas. The in situ patterning of the As layer forms a mask which covers and exposes selected regions of the GaAs surface.

In the next step, submonolayer amounts of dopant are deposited uniformly across the masked surface. Then the surface is warmed, and the As mask with its dopant is desorbed, thus preferentially removing some or all of the dopant from selected areas of the surface where the As had masked it.

After desorbing the mask, GaAs epilayer growth is resumed and the dopant is incorporated into selected areas of the epilayer. The use of an As mask and the in situ processing within the ultra high vacuum of the MBE growth chamber leads to a planar surface with improved interface properties compared to prior art processes which require that the wafer be removed from MBE growth chamber in order to obtain selective doping of the surface.

These and other objects and features of the invention will be apparent from the following detailed description taken with reference to the accompanying drawing.

The drawing is an illustration of six steps FIGS. 1A-1F, in the selective doping of a GaAs epilayer.

The attached drawing illustrates the invention as applied using molecular beam epitaxy (MBE). MBE is a well-known and useful technique for the fabrication of epilayers and abrupt heterojunctions of compound semiconductors. It is an attractive epitaxial growth technique for the preparation of single crystal semiconductor surfaces because of the ultrahigh vacuum ambients (less than 10.sup.-10 torr).

FIG. 1A in the drawing shows a GaAs substrate 2 mounted to a standard MBE substrate holder 4 with heater 5. A GaAs epilayer 6 is being grown on substrate 2 using a Ga flux 8 and an As.sub.4 or As.sub.2 flux 10 generated in the conventional manner in an MBE apparatus.

After growth of the desired epilayer 6, a mask layer 12 of elemental As is deposited shown in FIG. 1B. The As comes from the arsenic flux 10 used during the growth of epilayer 6 and consists of As.sub.4 or As.sub.2 derived from the sublimation of elemental arsenic. The gallium flux 8 is abruptly shuttered to terminate the growth of layer 6, while arsenic flux 10 remains impinging on the surface of epilayer 6. At typical MBE growth temperatures, (550 degrees to 650 degrees C), no condensation of As ocurs (arsenic has a very low sticking coefficient to itself at these temperatures) but the As.sub.4 or As.sub.2 flux prevents surface decomposiion. After terminating epilayer growth, the substrate heater 5 is turned off and the substrate holder 4 is allowed to cool by radiation and/or conduction of heat to the MBE system's liquid nitrogen cooled internal shroud. Epilayer 6 remains within the central portion of the As flux. The epilayer is cooled to below room temperature in order to condense a sufficiently thick arsenic mask layer 12.

In FIG. 1C of the drawing, a pattern is developed in mask 10 by desorbing the arsenic from selected areas 14 of epilayer 6 using a pulsed CO.sub.2 laser beam 16. The As may be easily removed by thermal desorption in the ultra high vacuum of the MBE chamber. After desorbing, area 14 is a clean, ordered, stoichiometric GaAs surface.

A fraction of a monolayer of dopant 18 is deposited over the entire surface of mask 12 and selected areas 14 as illustrated in FIG. 1D. The dopant used in a preferred embodiment is tin (Sn), and it is deposited while the substrate is at a temperature slightly below room temperature. Tin is a particularly attractive dopant for this process because it is incorporated from a surface concentration which "rides along" with the growth surface. Therefore, deposition of tin atoms on a GaAs surface and subsequent overgrowth with GaAs results in the dopant being distributed through several thousand angstroms of material.

The entire wafer is then heated to about 350 degrees C (FIG. 1) to thermally desorb the remaining AS, as well as the dopant deposited over it. The dopant deposited on the As-free areas 14 remains behind because the temperature required to desorb As is far too low to desorb most dopants (including Sn) from a clean GaAs surface.

In the final FIG. 1F, an epilayer of GaAs 20 is grown over the surface of the wafer with its selective deposit of dopant. When Sn is used as the dopant, the well-known surface segregation pehnomenon provides n-type Sn doping for several thousand angstroms past the surface upon when the Sn was deposited.

All steps of the process are accomplished without removing the wafer from the ultra high vacuum of the MBE system. Thus, the initial epilayer 6, the dopant 18, and the final epilayer 20 which incorporates the dopant are all deposited under conditions which avoid any contamination or reaction of the wafer.

The invention has been described above for an embodiment utilizing tin for doping GaAs in a MBE system. However the invention can be used with other dopants, compound semiconductors, and ultra high vacuum systems. For example, other dopants such as Si, Ge, and Be may be used provided that they have a sufficiently large sticking coefficient to remain on the semiconductor surface during desorbtion of the mask, and low enough surface mobility to stay put in the selected area.

The method is applicable to other compund semiconductors such as group III-V and group II-VI binary, ternary, and quaternary compounds. It appears particularly useful for binary and ternary compounds of Al.sub.x Ga.sub.1-x As where x may be in the range of 0 to 1, and may be different for different layers in the wafer. The masking overlayer comprises the most volatile (higher vapor-pressure), nonmetallic constituent element of the semiconductor such as the As, Sb, S, Se, and Te in arsenide, antimonide, sulfide, selenide, and telluride compound semiconductor. Other volatile elements can be used to form the masking overlayer provided that they are from the same group (III-V or II-VI) in the periodic table as the compound semiconductor being treated, and provided that they do not react with or otherwise contaminate the compound semiconductor.

Desorption of selected areas of the masking overlayer can be accomplished by any beam which is capable of heating or sputtering selective areas of the wafer surface without contaminating the high vacuum system or damaging the substrate material. Such beams may include laser beams, non-laser photon beams, electron beams, and ion beams.

In addition to the exemplary MBE system, other systems which are used to form epilayers can be used to practice the invention, provided that the system provides a high vacuum atmosphere. Such systems include vapor phase epitaxy (VPE), and metallorganic chemical vapor deposition (MO-CVD).

Thus, numerous variations and modifications can be made without departing from the invention. Accordingly, it should be understood that the form of the invention described above is illustrative and is not intended to limit the scope of the invention.