Encoding Apparatus

This invention relates to apparatus for providing coded representations of position.

Electromechanical devices in many different forms have been proposed which provide a coded representation of position, most commonly the angular position of a shaft. In general, such devices incorporate a patterned element and at least as many sensors as there are bits in the code. At least one encoder is known that enters pulses into a counter for representing the angular position of a shaft (Poole, U.S. Pat. No. 2,901,170 issued Aug. 25, 1959) but that device depends upon an elaborate electromechanical structure. The art of shaft-position encoders is highly developed, and yet each known position encoder has its set of limitations, usually entailing complexity, high cost, and unreliability.

The present invention represents a departure in principle from known position encoders. As will be seen in the illustrative embodiments, plural pulse-transfer stages are equipped with respective pulse-control devices which, in turn, are responsive to and selectively controlled by a selector carried by a physical element, a selector, whose position is to be encoded. Pulse-transfers along the sequence of stages are counted between a reference stage and a stage selected by the physical element, the count in the counter being in the form of a combination code. It may be a binary counter, for example, but if that form of code is not the form of position-representation desired, a code converter can be used. However, a binary numerical code that is here provided directly by an encoder has the advantage over others, in that a code converter is not needed to produce a numerical code used in processing the value represented by the encoder for machine control.

The pulse-transfer stages operate electronically, at a high speed that is entirely independent of a mechanical motion to control counting of pulses by the counter, as by generating position-signifying trains of pulses or controlling the transmission of separately generated pulses. The cycle duration from the first to the last stage can be so short that many encoding cycles per second can be executed. The whole device is amenable to being formed as an integrated circuit. Thus the unit cost of an encoder can be relatively low and the encoder can be quite compact.

The values present in the counter at the start and end of an accurate time interval are utilized, as a further feature of the invention, to represent speed and direction of a shaft or other moving element.

The nature of the invention, including the foregoing and other novel features and advantages, will be better appreciated from the following detailed description of several illustrative embodiments, in which reference is made to the accompanying drawings.

FIGS. 1 through 4 of the drawings are schematic representations of four different embodiments illustrating features of the invention.

Referring now to FIG. 1, a sequence of pulse-transfer stages 10 is shown, from initial stage 10a to final stage 10z. These stages are, for example, monostable multivibrators triggered into their "on" or unstable states for an extremely small time interval by an input pulse. Each such stage 10 produces an output pulse of very short duration to output bus 12 when the stage turns "on", or is activated the pulse lasting until the stage turns "off". Each stage 10 also produces a triggering pulse to the input of the next pulse-transfer stage in the sequence when lapsing into its "off" or stable state. The timing of the triggering pulse and the response of the next stage that is to be triggered "on" is such as to allow a short time interval between the output pulse of each stage 10 to bus 12 and the output pulse of the next stage 10. Consequently stages 10 produce a train of pulses on bus 12.

Each stage 10 has a pulse-control device or element 14, for controlling the operation of its related stage. This may be a metal contact in an example, or it may be a magnetic detector such as a Hall-effect device, or an ionized-discharge detector. Selector 24 (see below) in other examples can take the form of a charged plate of a capacitor, in which case pulse-control device 14 includes a companion capacitor plate; and similarly selector 24 can be an exciting loop for coupling control excitation to a companion loop, perhaps only a single-turn loop. Device 14 would then include such a loop together with an appropriate means for maintaining the related pulse-transfer stage "on" in response to high-frequency excitation from selector 24.

In the preferred embodiment, pulse-control device or element 14 is a photo-diode or a photo-transistor. Indeed, such photo-detector may form part of its respective pulse-transfer stage 10. It is so arranged that, when pulse-control device 14 of FIG. 1 is actuated, it disables its respective stage 10 against responding to an input pulse from the next-preceding stage 10, as by providing sustained bias to maintain stage 10 in its "on" state and in that way to prevent the stage from either responding to an input pulse or to produce an output pulse.

Pulse-control devices 14 are ordinarily distributed in a circular array at uniform intervals from reference stage 10a to stage 10z. Where it is unnecessary to encode more than one rotation of shaft 22, there may be a gap between the devices 14 of stages 10z and 10a. In some cases, as where the code of shaft 10 is combined with that of a slower shaft geared to it, devices 14 of stages 10z and 10a have the same spacing as that of the devices 14 of all the other stages.

"Start" control 16 provides a single brief triggering pulse to the first stage 10a. If none of the pulse-control devices 14 were "actuated", then stages 10 would become triggered in rapid sequence from 10a to 10z. Each stage produces an output pulse to bus 12, the connection to bus 12 optionally including isolation element 18 such as a diode for preventing reverse pulses from bus 12 from affecting any of the other stages 10.

Bus 12 is connected to deliver a train of pulses at the input of counter 20 which, most commonly, is a multistage binary counter. In an example, if there are 2.sup.13 or 8,192 stages 10 in the sequence, binary counter 20 comprises thirteen stages. In any case, the counter provides a combination-code output uniquely representing each one of any possible number of input pulses from bus 12 in one rotation of shaft 22.

Elements 10, 14 and 18 and their connections may all be formed as an integrated, so-called solid-state circuit, which in use is ordinarily fixed in position. The integrated circuit optionally includes counter 20 and other associated circuits. Shaft 22 carries selective control or actuating means or selector 24 such as a narrow-beam light source where pulse-control devices 14 are photo-electric or photo-resistive devices. Actuator 24 is a companion device to actuate device 14 in any case, such as a moving contact where devices 14 are contacts, etc.

Selector 24 spans more than one of the devices 14, preferably two devices 14, where it is important to insure against the possibility of selector 24 being located between two devices 14. In case of a light selector, a light source (not shown) may be arranged to illuminate all devices 14 and a mask having a slit of appropriate width may be disposed opposite devices 14, the mask being carried by shaft 22. When a pulse from "start" control unit 16 starts generation of a train of pulses by transfer stages 10, the train of pulses is interrupted when the first stage is reached having its device 14 illuminated or otherwise actuated by selector 24. Triggering of any pulse transfer stage 10 tests whether its element 14 is in cooperation with selector 24 and, if so, generation of the pulse train is interrupted. Accordingly selector or actuator 24 is a selective control means to which pulse-control devices 14 are responsive. The pulses produced enter counter 20, whose combination-code output represents the position of shaft 22.

It is not essential for selector 24 to be confined to a single device 14. The effect of selector 24 on the sequence of stages 10 is realized with respect to the first stage 10 that is affected. Some slight ambiguity might occur, as when the devices 14a and 14z of two stages 10a and 10z are affected; but such ambiguity may be acceptable in some applications of the encoder or, if not, suitable refinements can be introduced. Where devices 14 of stages 10a and 10z are spaced far apart, there is no such problem for stage 10z.

A cycle clock 26 provides coordinating pulses for operating "start" control unit 16, transfer-pulse unit 28 and reset-pulse unit 30. The count in counter 20 is transferred to temporary store 32 via gate 34, and then reset unit 30 returns counter 20 to zero. After any desired time interval, "start" control unit 16 is again activated for initiating stages 10 in operation for producing a new representation in counter 20, to show where selector 24 is positioned relative to pulse-control devices 14. In this example, cycle clock 26, gate 34, transfer unit 26, reset unit 30 and temporary storage unit 32 are shown as being part of the illustrative encoding apparatus, but of course all of these devices could be part of the external equipment with which the encoder is to be used.

To special advantage, cycle clock 26 has a short but definite time cycle longer than the total time interval required for pulses to be transferred all the way from stage 10a to stage 10z. By adding a gate 36 and a subtraction device 38, it becomes possible to subtract the value in counter 20 from the value in store 32 that was entered during the preceding cycle of cycle clock 26. The count difference is the output of subtractor 38, available at terminal(s) 38a, provides a measure of the speed of shaft 22. The numerical difference representing the angular displacement that occurred during the consistent time interval of cycle clock 26 represents speed. This may be converted to an analog value, if desired, and it may be stored as in a capacitor. The sign of the subtracted result represents the direction of rotation. After transfer of the count to storage unit 32, the combination code provided by the counter becomes available at terminal(s) 32a.

Depending on the number of stages 10 and the circuit design, and particularly in the case of an integrated-circuit device 10 12, 14, 18, the entire pulse sequence from 10a to 10z may require a time interval of ten microseconds or less. The time interval of cycle clock 26 is then made slightly longer than 10 microseconds.

FIG. 2 shows a modification in that (unlike the embodiment of FIG. 1) the selector for the pulse-control devices does not interrupt the continued transfer of pulses from stage to stage all along the sequence of stages illustrated.

In FIG. 2, primed numbers are used to designate parts corresponding to like parts in FIG. 1, and the description of FIG. 1 in large measure applies to FIG. 2. it will be noted that stage 10z of FIG. 1 does not emit a triggering pulse to another stage, and it will be recalled that each pulse-control device or element 14 which is responsive to selector 24 maintains its related pulse-transfer stage 10 in a disabled state, non-responsive to input pulses. Further, in FIG. 1, pulses from stage 10 to succeeding stages simply stop when the transfer of pulses from stage to stage is halted at selector 24. Such interruption of pulse transmission is not a basic limitation of the presently contemplated encoders.

In FIG. 2, once a triggering pulse is applied to stage 10a', the sequence of stages produce triggering pulses to cause successive triggering of all of the stages from stage 10a' to stage 10z'. Pulses from bus 12' reach counter 20' via gate 102. Before a triggering pulse reaches initial or reference stage 10a', a reset pulse from unit 30' resets flip-flop 104, that controls gate 102, just as the counter is reset. When flip-flop 104 is reset, gate 102 is conditioned to pass pulses to counter 20' from bus 12'.

The circuit of each stage 10' in FIG. 2 is such that it is not controlled by its related pulse-control device or element 14', and therefore as many pulses appear on bus 12' in response to an initial triggering pulse to stage 10a' as there are stages in the sequence. Devices 14' in FIG. 2 become selectively enabled by selector 24' to transmit pulses from any stage 10' to bus 106. Each stage thus tests its control element 14' as to whether selector 24' has activated the control element 14' of that stage. For example, devices 14' may be photodiodes that normally do not conduct and selector 24' is then a light source that selectively renders devices 14' conductive. Other suitable devices may replace the photodiodes, as indicated above. So long as devices 14' are not exposed to actuator 24', bus 106 remains passive. When a pulse-transfer stage 10' is turned "on", if its device 14' is exposed to selector 24', a setting pulse is transmitted from stage 10' via device 14' and bus 106 to flip-flop 104. The latter becomes set and thereafter blocks subsequent transmission of pulses from bus 12' to counter 20'. Pulse-shift stages 10' continue to apply pulses to bus 12' until stage 10z' is triggered, but those pulses are blocked by gate 102.

If desired, the sequence of pulse-transfer stages 10' can be utilized as a cycle clock, to replace "start" control unit 16 and cycle clock 26 of FIG. 1. If this is desired, two more pulse-transfer stages 108 and 110 can be interposed between stages 10z' and 10a'. Stage 108 produces a pulse that actuates gate 34' to transfer the value in counter 20' to store 32'. Thereafter stage 110 activates reset pulse generator 30', and indeed stage 110 could be used as the reset pulse source. An operation monitor 112, activated by a steady sequence of pulses as from stage 110 can be included. A charge builds up on capacitor 112c via rectifier 112a, but the voltage at terminal 112d fades by virtue of discharge resistor 112b in case the circulation of pulses is interrupted.

It should be understood that, in lieu of stages 108 and 110, the circuit of FIG. 2 can utilize a cycle clock as in FIG. 1. Additionally, elements corresponding to a second gate 36 and subtractor 38 of FIG. 1 are implicitly part of the embodiment of FIG. 2. Furthermore, if desired, the pulse-transfer stages in the circuit of FIG. 2 can be of a type to be caused to advance by a clock-pulse generator, like the action that is present in usual circulating shift registers. In that event (FIG. 3) the pulse-transfer stages 10" step an input pulse along, stage by stage, so as to act as a commutator for successively testing devices or elements 14" for their response to selector or selector 24". In that case the system is not dependent on stages 10" to generate pulses on bus 12' as in FIG. 2 because such pulses are available from the clock-pulse generator 120 for input to gate 102" and counter 20". Instead, pulses from clock-pulse generator 120 are applied to bus 122 to advance an input pulse from reference stage 10a" to stages 10" in succession; and the clock pulses are also applied to gate 102". Cycle clock 26" in FIG. 3 produces an input pulse via gate 124 to initial stage 10a" of the sequence and, a moment earlier, cycle clock 26" resets counter 20" and flip-flop 104" which is then in condition to cause gate 102" to pass input pulses to counter 20". As in FIG. 2, selector or selector 24" enables a selected pulse control device 14" that responds to selector 24 to pass a pulse from the related stage 10" to bus 106" and to the "set" input of flip-flop 104" for terminating the count.

In another embodiment shown in FIG. 4, being a modification of FIG. 2, the signal for resetting flip-flop 104' is taken from bus 106'. In doing so, the setting signal for flip-flop 104' is taken from stage 108'. The same numerals in FIG. 4 are used as in FIG. 2, except that numerals 102' through 110' replace numerals 102 through 110.

The starting pulse to initial pulse-shift stage 10a' comes from stage 110' in FIG. 4. When pulses advance to the first stage 10' where pulse-control device 14' is exposed to, and responds to, selector or selector 24', that stage impresses a pulse on bus 106'. This pulse resets flip-flop 104'. Stages 10' continue to deliver pulses to bus 12'. These pulses enter counter 20' since flip-flop 104' is reset and has enabled gate 102' to pass pulses from bus 12' to counter 20'. These pulses continue, until final or reference pulse-shift stage 10z' has delivered a trigger pulse to pulse-transfer stage 108'. This action sets flip-flop 104' and disables gate 102'. Thereafter no pulses appearing on bus 12' can enter the counter until such time in the next operating cycle as selector or selector 24' again enables a pulse-control device 14' to reset flip-flop 104. In contrast to FIG. 2, where the pulses entered into counter 20' are developed on bus 12' by the pulse-shift stages starting with stage 10a' and ending at the stage affected by selector or selector 24', in the circuit of FIG. 4 the pulses from bus 12' that start to enter the counter are the pulses provided by the first stage 10' whose device 14' responds to the selector or selector 24', counting of the pulses continuing thereafter until the final pulse is applied to bus 12' by stage 10z'.

An operation monitor like monitor 112 of FIG. 2 and devices for evidencing rate-of-rotation and direction-of-rotation of shaft 22' like gate 36 and unit 38 of FIG. 1 are implicitly included in each of the other embodiments.

In each of FIGS. 1-4, the value entering the counter is determined by the number of stages in the sequence of stages between a reference stage and the stage whose pulse-control device 14, 14' or 14" responds to the selector or actuator 24, 24' or 24". The reference stage is the initial stage 10a in FIG. 1 as well as in FIG. 2 and FIG. 3, while in FIG. 4 the reference stage is the final stage 10z.

It is evident that a wide range of modification may be made in the circuit apparatus of FIG. 104, and that varied application of such apparatus may be made by those skilled in the art. Therefore the invention should be construed broadly in accordance with its full spirit and scope.